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drm/nouveau/ltc: namespace + nvidia gpu names (no binary change) 

The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2015-01-14 15:06:26 +10:00
parent 78b2b4e76b
commit 2799bba69a
7 changed files with 88 additions and 97 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

39
drivers/gpu/drm/nouveau/include/nvkm/subdev/ltc.h
View File

@ -1,35 +1,32 @@
#ifndef __NOUVEAU_LTC_H__
#define __NOUVEAU_LTC_H__
#ifndef __NVKM_LTC_H__
#define __NVKM_LTC_H__
#include <core/subdev.h>
#include <core/device.h>
struct nvkm_mm_node;
#define NOUVEAU_LTC_MAX_ZBC_CNT 16
#define NVKM_LTC_MAX_ZBC_CNT 16
struct nouveau_mm_node;
struct nvkm_ltc {
struct nvkm_subdev base;
struct nouveau_ltc {
struct nouveau_subdev base;
int (*tags_alloc)(struct nouveau_ltc *, u32 count,
struct nouveau_mm_node **);
void (*tags_free)(struct nouveau_ltc *, struct nouveau_mm_node **);
void (*tags_clear)(struct nouveau_ltc *, u32 first, u32 count);
int (*tags_alloc)(struct nvkm_ltc *, u32 count,
struct nvkm_mm_node **);
void (*tags_free)(struct nvkm_ltc *, struct nvkm_mm_node **);
void (*tags_clear)(struct nvkm_ltc *, u32 first, u32 count);
int zbc_min;
int zbc_max;
int (*zbc_color_get)(struct nouveau_ltc *, int index, const u32[4]);
int (*zbc_depth_get)(struct nouveau_ltc *, int index, const u32);
int (*zbc_color_get)(struct nvkm_ltc *, int index, const u32[4]);
int (*zbc_depth_get)(struct nvkm_ltc *, int index, const u32);
};
static inline struct nouveau_ltc *
nouveau_ltc(void *obj)
static inline struct nvkm_ltc *
nvkm_ltc(void *obj)
{
return (void *)nouveau_subdev(obj, NVDEV_SUBDEV_LTC);
return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_LTC);
}
extern struct nouveau_oclass *gf100_ltc_oclass;
extern struct nouveau_oclass *gk104_ltc_oclass;
extern struct nouveau_oclass *gm107_ltc_oclass;
extern struct nvkm_oclass *gf100_ltc_oclass;
extern struct nvkm_oclass *gk104_ltc_oclass;
extern struct nvkm_oclass *gm107_ltc_oclass;
#endif

4
drivers/gpu/drm/nouveau/nvkm/engine/gr/nvc0.h
View File

@ -94,8 +94,8 @@ struct nvc0_gr_priv {
struct nvc0_gr_fuc fuc41ad;
bool firmware;
struct nvc0_gr_zbc_color zbc_color[NOUVEAU_LTC_MAX_ZBC_CNT];
struct nvc0_gr_zbc_depth zbc_depth[NOUVEAU_LTC_MAX_ZBC_CNT];
struct nvc0_gr_zbc_color zbc_color[NVKM_LTC_MAX_ZBC_CNT];
struct nvc0_gr_zbc_depth zbc_depth[NVKM_LTC_MAX_ZBC_CNT];
u8 rop_nr;
u8 gpc_nr;

30
drivers/gpu/drm/nouveau/nvkm/subdev/ltc/base.c
View File

@ -21,17 +21,15 @@
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "priv.h"
static int
nvkm_ltc_tags_alloc(struct nouveau_ltc *ltc, u32 n,
struct nouveau_mm_node **pnode)
nvkm_ltc_tags_alloc(struct nvkm_ltc *ltc, u32 n, struct nvkm_mm_node **pnode)
{
struct nvkm_ltc_priv *priv = (void *)ltc;
int ret;
ret = nouveau_mm_head(&priv->tags, 0, 1, n, n, 1, pnode);
ret = nvkm_mm_head(&priv->tags, 0, 1, n, n, 1, pnode);
if (ret)
*pnode = NULL;
@ -39,14 +37,14 @@ nvkm_ltc_tags_alloc(struct nouveau_ltc *ltc, u32 n,
}
static void
nvkm_ltc_tags_free(struct nouveau_ltc *ltc, struct nouveau_mm_node **pnode)
nvkm_ltc_tags_free(struct nvkm_ltc *ltc, struct nvkm_mm_node **pnode)
{
struct nvkm_ltc_priv *priv = (void *)ltc;
nouveau_mm_free(&priv->tags, pnode);
nvkm_mm_free(&priv->tags, pnode);
}
static void
nvkm_ltc_tags_clear(struct nouveau_ltc *ltc, u32 first, u32 count)
nvkm_ltc_tags_clear(struct nvkm_ltc *ltc, u32 first, u32 count)
{
const struct nvkm_ltc_impl *impl = (void *)nv_oclass(ltc);
struct nvkm_ltc_priv *priv = (void *)ltc;
@ -59,7 +57,7 @@ nvkm_ltc_tags_clear(struct nouveau_ltc *ltc, u32 first, u32 count)
}
static int
nvkm_ltc_zbc_color_get(struct nouveau_ltc *ltc, int index, const u32 color[4])
nvkm_ltc_zbc_color_get(struct nvkm_ltc *ltc, int index, const u32 color[4])
{
const struct nvkm_ltc_impl *impl = (void *)nv_oclass(ltc);
struct nvkm_ltc_priv *priv = (void *)ltc;
@ -69,7 +67,7 @@ nvkm_ltc_zbc_color_get(struct nouveau_ltc *ltc, int index, const u32 color[4])
}
static int
nvkm_ltc_zbc_depth_get(struct nouveau_ltc *ltc, int index, const u32 depth)
nvkm_ltc_zbc_depth_get(struct nvkm_ltc *ltc, int index, const u32 depth)
{
const struct nvkm_ltc_impl *impl = (void *)nv_oclass(ltc);
struct nvkm_ltc_priv *priv = (void *)ltc;
@ -79,13 +77,13 @@ nvkm_ltc_zbc_depth_get(struct nouveau_ltc *ltc, int index, const u32 depth)
}
int
_nvkm_ltc_init(struct nouveau_object *object)
_nvkm_ltc_init(struct nvkm_object *object)
{
const struct nvkm_ltc_impl *impl = (void *)nv_oclass(object);
struct nvkm_ltc_priv *priv = (void *)object;
int ret, i;
ret = nouveau_subdev_init(&priv->base.base);
ret = nvkm_subdev_init(&priv->base.base);
if (ret)
return ret;
@ -98,15 +96,15 @@ _nvkm_ltc_init(struct nouveau_object *object)
}
int
nvkm_ltc_create_(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, int length, void **pobject)
nvkm_ltc_create_(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, int length, void **pobject)
{
const struct nvkm_ltc_impl *impl = (void *)oclass;
struct nvkm_ltc_priv *priv;
int ret;
ret = nouveau_subdev_create_(parent, engine, oclass, 0, "PLTCG",
"l2c", length, pobject);
ret = nvkm_subdev_create_(parent, engine, oclass, 0, "PLTCG",
"l2c", length, pobject);
priv = *pobject;
if (ret)
return ret;
@ -119,7 +117,7 @@ nvkm_ltc_create_(struct nouveau_object *parent, struct nouveau_object *engine,
priv->base.tags_free = nvkm_ltc_tags_free;
priv->base.tags_clear = nvkm_ltc_tags_clear;
priv->base.zbc_min = 1; /* reserve 0 for disabled */
priv->base.zbc_max = min(impl->zbc, NOUVEAU_LTC_MAX_ZBC_CNT) - 1;
priv->base.zbc_max = min(impl->zbc, NVKM_LTC_MAX_ZBC_CNT) - 1;
priv->base.zbc_color_get = nvkm_ltc_zbc_color_get;
priv->base.zbc_depth_get = nvkm_ltc_zbc_depth_get;
return 0;

40
drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.c
View File

@ -21,12 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include "priv.h"
#include <core/enum.h>
#include <subdev/fb.h>
#include <subdev/timer.h>
#include "priv.h"
void
gf100_ltc_cbc_clear(struct nvkm_ltc_priv *priv, u32 start, u32 limit)
{
@ -62,7 +62,7 @@ gf100_ltc_zbc_clear_depth(struct nvkm_ltc_priv *priv, int i, const u32 depth)
nv_wr32(priv, 0x17ea58, depth);
}
static const struct nouveau_bitfield
static const struct nvkm_bitfield
gf100_ltc_lts_intr_name[] = {
{ 0x00000001, "IDLE_ERROR_IQ" },
{ 0x00000002, "IDLE_ERROR_CBC" },
@ -89,7 +89,7 @@ gf100_ltc_lts_intr(struct nvkm_ltc_priv *priv, int ltc, int lts)
if (stat) {
nv_info(priv, "LTC%d_LTS%d:", ltc, lts);
nouveau_bitfield_print(gf100_ltc_lts_intr_name, stat);
nvkm_bitfield_print(gf100_ltc_lts_intr_name, stat);
pr_cont("\n");
}
@ -97,7 +97,7 @@ gf100_ltc_lts_intr(struct nvkm_ltc_priv *priv, int ltc, int lts)
}
void
gf100_ltc_intr(struct nouveau_subdev *subdev)
gf100_ltc_intr(struct nvkm_subdev *subdev)
{
struct nvkm_ltc_priv *priv = (void *)subdev;
u32 mask;
@ -112,7 +112,7 @@ gf100_ltc_intr(struct nouveau_subdev *subdev)
}
static int
gf100_ltc_init(struct nouveau_object *object)
gf100_ltc_init(struct nvkm_object *object)
{
struct nvkm_ltc_priv *priv = (void *)object;
u32 lpg128 = !(nv_rd32(priv, 0x100c80) & 0x00000001);
@ -130,13 +130,13 @@ gf100_ltc_init(struct nouveau_object *object)
}
void
gf100_ltc_dtor(struct nouveau_object *object)
gf100_ltc_dtor(struct nvkm_object *object)
{
struct nouveau_fb *pfb = nouveau_fb(object);
struct nvkm_fb *pfb = nvkm_fb(object);
struct nvkm_ltc_priv *priv = (void *)object;
nouveau_mm_fini(&priv->tags);
nouveau_mm_free(&pfb->vram, &priv->tag_ram);
nvkm_mm_fini(&priv->tags);
nvkm_mm_free(&pfb->vram, &priv->tag_ram);
nvkm_ltc_destroy(priv);
}
@ -144,7 +144,7 @@ gf100_ltc_dtor(struct nouveau_object *object)
/* TODO: Figure out tag memory details and drop the over-cautious allocation.
*/
int
gf100_ltc_init_tag_ram(struct nouveau_fb *pfb, struct nvkm_ltc_priv *priv)
gf100_ltc_init_tag_ram(struct nvkm_fb *pfb, struct nvkm_ltc_priv *priv)
{
u32 tag_size, tag_margin, tag_align;
int ret;
@ -170,8 +170,8 @@ gf100_ltc_init_tag_ram(struct nouveau_fb *pfb, struct nvkm_ltc_priv *priv)
tag_size += tag_align;
tag_size = (tag_size + 0xfff) >> 12; /* round up */
ret = nouveau_mm_tail(&pfb->vram, 1, 1, tag_size, tag_size, 1,
&priv->tag_ram);
ret = nvkm_mm_tail(&pfb->vram, 1, 1, tag_size, tag_size, 1,
&priv->tag_ram);
if (ret) {
priv->num_tags = 0;
} else {
@ -183,16 +183,16 @@ gf100_ltc_init_tag_ram(struct nouveau_fb *pfb, struct nvkm_ltc_priv *priv)
priv->tag_base = tag_base;
}
ret = nouveau_mm_init(&priv->tags, 0, priv->num_tags, 1);
ret = nvkm_mm_init(&priv->tags, 0, priv->num_tags, 1);
return ret;
}
int
gf100_ltc_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject)
gf100_ltc_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct nouveau_fb *pfb = nouveau_fb(parent);
struct nvkm_fb *pfb = nvkm_fb(parent);
struct nvkm_ltc_priv *priv;
u32 parts, mask;
int ret, i;
@ -218,10 +218,10 @@ gf100_ltc_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
return 0;
}
struct nouveau_oclass *
struct nvkm_oclass *
gf100_ltc_oclass = &(struct nvkm_ltc_impl) {
.base.handle = NV_SUBDEV(LTC, 0xc0),
.base.ofuncs = &(struct nouveau_ofuncs) {
.base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = gf100_ltc_ctor,
.dtor = gf100_ltc_dtor,
.init = gf100_ltc_init,

7
drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gk104.c
View File

@ -21,11 +21,10 @@
*
* Authors: Ben Skeggs
*/
#include "priv.h"
static int
gk104_ltc_init(struct nouveau_object *object)
gk104_ltc_init(struct nvkm_object *object)
{
struct nvkm_ltc_priv *priv = (void *)object;
u32 lpg128 = !(nv_rd32(priv, 0x100c80) & 0x00000001);
@ -42,10 +41,10 @@ gk104_ltc_init(struct nouveau_object *object)
return 0;
}
struct nouveau_oclass *
struct nvkm_oclass *
gk104_ltc_oclass = &(struct nvkm_ltc_impl) {
.base.handle = NV_SUBDEV(LTC, 0xe4),
.base.ofuncs = &(struct nouveau_ofuncs) {
.base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = gf100_ltc_ctor,
.dtor = gf100_ltc_dtor,
.init = gk104_ltc_init,

19
drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c
View File

@ -21,12 +21,11 @@
*
* Authors: Ben Skeggs
*/
#include "priv.h"
#include <subdev/fb.h>
#include <subdev/timer.h>
#include "priv.h"
static void
gm107_ltc_cbc_clear(struct nvkm_ltc_priv *priv, u32 start, u32 limit)
{
@ -75,7 +74,7 @@ gm107_ltc_lts_isr(struct nvkm_ltc_priv *priv, int ltc, int lts)
}
static void
gm107_ltc_intr(struct nouveau_subdev *subdev)
gm107_ltc_intr(struct nvkm_subdev *subdev)
{
struct nvkm_ltc_priv *priv = (void *)subdev;
u32 mask;
@ -90,7 +89,7 @@ gm107_ltc_intr(struct nouveau_subdev *subdev)
}
static int
gm107_ltc_init(struct nouveau_object *object)
gm107_ltc_init(struct nvkm_object *object)
{
struct nvkm_ltc_priv *priv = (void *)object;
u32 lpg128 = !(nv_rd32(priv, 0x100c80) & 0x00000001);
@ -107,11 +106,11 @@ gm107_ltc_init(struct nouveau_object *object)
}
static int
gm107_ltc_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject)
gm107_ltc_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct nouveau_fb *pfb = nouveau_fb(parent);
struct nvkm_fb *pfb = nvkm_fb(parent);
struct nvkm_ltc_priv *priv;
u32 parts, mask;
int ret, i;
@ -136,10 +135,10 @@ gm107_ltc_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
return 0;
}
struct nouveau_oclass *
struct nvkm_oclass *
gm107_ltc_oclass = &(struct nvkm_ltc_impl) {
.base.handle = NV_SUBDEV(LTC, 0xff),
.base.ofuncs = &(struct nouveau_ofuncs) {
.base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = gm107_ltc_ctor,
.dtor = gf100_ltc_dtor,
.init = gm107_ltc_init,

46
drivers/gpu/drm/nouveau/nvkm/subdev/ltc/priv.h
View File

@ -1,23 +1,22 @@
#ifndef __NVKM_LTC_PRIV_H__
#define __NVKM_LTC_PRIV_H__
#include <subdev/ltc.h>
#include <subdev/fb.h>
#include <core/enum.h>
#include <core/mm.h>
struct nvkm_fb;
struct nvkm_ltc_priv {
struct nouveau_ltc base;
struct nvkm_ltc base;
u32 ltc_nr;
u32 lts_nr;
u32 num_tags;
u32 tag_base;
struct nouveau_mm tags;
struct nouveau_mm_node *tag_ram;
struct nvkm_mm tags;
struct nvkm_mm_node *tag_ram;
u32 zbc_color[NOUVEAU_LTC_MAX_ZBC_CNT][4];
u32 zbc_depth[NOUVEAU_LTC_MAX_ZBC_CNT];
u32 zbc_color[NVKM_LTC_MAX_ZBC_CNT][4];
u32 zbc_depth[NVKM_LTC_MAX_ZBC_CNT];
};
#define nvkm_ltc_create(p,e,o,d) \
@ -35,24 +34,24 @@ struct nvkm_ltc_priv {
_nvkm_ltc_fini(nv_object(_priv), (s)); \
})
int nvkm_ltc_create_(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *, int, void **);
int nvkm_ltc_create_(struct nvkm_object *, struct nvkm_object *,
struct nvkm_oclass *, int, void **);
#define _nvkm_ltc_dtor _nouveau_subdev_dtor
int _nvkm_ltc_init(struct nouveau_object *);
#define _nvkm_ltc_fini _nouveau_subdev_fini
#define _nvkm_ltc_dtor _nvkm_subdev_dtor
int _nvkm_ltc_init(struct nvkm_object *);
#define _nvkm_ltc_fini _nvkm_subdev_fini
int gf100_ltc_ctor(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *, void *, u32,
struct nouveau_object **);
void gf100_ltc_dtor(struct nouveau_object *);
int gf100_ltc_init_tag_ram(struct nouveau_fb *, struct nvkm_ltc_priv *);
int gf100_ltc_tags_alloc(struct nouveau_ltc *, u32, struct nouveau_mm_node **);
void gf100_ltc_tags_free(struct nouveau_ltc *, struct nouveau_mm_node **);
int gf100_ltc_ctor(struct nvkm_object *, struct nvkm_object *,
struct nvkm_oclass *, void *, u32,
struct nvkm_object **);
void gf100_ltc_dtor(struct nvkm_object *);
int gf100_ltc_init_tag_ram(struct nvkm_fb *, struct nvkm_ltc_priv *);
int gf100_ltc_tags_alloc(struct nvkm_ltc *, u32, struct nvkm_mm_node **);
void gf100_ltc_tags_free(struct nvkm_ltc *, struct nvkm_mm_node **);
struct nvkm_ltc_impl {
struct nouveau_oclass base;
void (*intr)(struct nouveau_subdev *);
struct nvkm_oclass base;
void (*intr)(struct nvkm_subdev *);
void (*cbc_clear)(struct nvkm_ltc_priv *, u32 start, u32 limit);
void (*cbc_wait)(struct nvkm_ltc_priv *);
@ -62,10 +61,9 @@ struct nvkm_ltc_impl {
void (*zbc_clear_depth)(struct nvkm_ltc_priv *, int, const u32);
};
void gf100_ltc_intr(struct nouveau_subdev *);
void gf100_ltc_intr(struct nvkm_subdev *);
void gf100_ltc_cbc_clear(struct nvkm_ltc_priv *, u32, u32);
void gf100_ltc_cbc_wait(struct nvkm_ltc_priv *);
void gf100_ltc_zbc_clear_color(struct nvkm_ltc_priv *, int, const u32[4]);
void gf100_ltc_zbc_clear_depth(struct nvkm_ltc_priv *, int, const u32);
#endif