ARM: dts: remove STiH416.dtsi
Since v4.8, STiH415/416 clock support has been removed [1], these platform doesn't boot. We can remove DTS files related to these socs. [1] https://patchwork.kernel.org/patch/9157571/ Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This commit is contained in:
Patrice Chotard
parent
5e7f8d1619
commit
2735650981
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@ -1,517 +0,0 @@
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/*
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* Copyright (C) 2012 STMicroelectronics Limited.
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* Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* publishhed by the Free Software Foundation.
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*/
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#include "stih41x.dtsi"
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#include "stih416-clock.dtsi"
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#include "stih416-pinctrl.dtsi"
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/reset/stih416-resets.h>
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#include <dt-bindings/interrupt-controller/irq-st.h>
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/ {
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L2: cache-controller {
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compatible = "arm,pl310-cache";
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reg = <0xfffe2000 0x1000>;
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arm,data-latency = <3 3 3>;
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arm,tag-latency = <2 2 2>;
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cache-unified;
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cache-level = <2>;
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};
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arm-pmu {
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compatible = "arm,cortex-a9-pmu";
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interrupt-parent = <&intc>;
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interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&intc>;
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ranges;
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compatible = "simple-bus";
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restart {
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compatible = "st,stih416-restart";
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st,syscfg = <&syscfg_sbc>;
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status = "okay";
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};
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powerdown: powerdown-controller {
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#reset-cells = <1>;
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compatible = "st,stih416-powerdown";
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};
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softreset: softreset-controller {
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#reset-cells = <1>;
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compatible = "st,stih416-softreset";
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};
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syscfg_sbc:sbc-syscfg@fe600000{
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compatible = "st,stih416-sbc-syscfg", "syscon";
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reg = <0xfe600000 0x1000>;
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};
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syscfg_front:front-syscfg@fee10000{
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compatible = "st,stih416-front-syscfg", "syscon";
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reg = <0xfee10000 0x1000>;
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};
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syscfg_rear:rear-syscfg@fe830000{
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compatible = "st,stih416-rear-syscfg", "syscon";
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reg = <0xfe830000 0x1000>;
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};
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/* MPE */
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syscfg_fvdp_fe:fvdp-fe-syscfg@fddf0000{
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compatible = "st,stih416-fvdp-fe-syscfg", "syscon";
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reg = <0xfddf0000 0x1000>;
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};
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syscfg_fvdp_lite:fvdp-lite-syscfg@fd6a0000{
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compatible = "st,stih416-fvdp-lite-syscfg", "syscon";
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reg = <0xfd6a0000 0x1000>;
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};
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syscfg_cpu:cpu-syscfg@fdde0000{
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compatible = "st,stih416-cpu-syscfg", "syscon";
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reg = <0xfdde0000 0x1000>;
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};
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syscfg_compo:compo-syscfg@fd320000{
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compatible = "st,stih416-compo-syscfg", "syscon";
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reg = <0xfd320000 0x1000>;
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};
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syscfg_transport:transport-syscfg@fd690000{
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compatible = "st,stih416-transport-syscfg", "syscon";
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reg = <0xfd690000 0x1000>;
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};
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syscfg_lpm:lpm-syscfg@fe4b5100{
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compatible = "st,stih416-lpm-syscfg", "syscon";
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reg = <0xfe4b5100 0x8>;
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};
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irq-syscfg {
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compatible = "st,stih416-irq-syscfg";
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st,syscfg = <&syscfg_cpu>;
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st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
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<ST_IRQ_SYSCFG_PMU_1>;
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st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
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<ST_IRQ_SYSCFG_DISABLED>;
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};
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serial2: serial@fed32000{
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compatible = "st,asc";
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status = "disabled";
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reg = <0xfed32000 0x2c>;
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interrupts = <0 197 0>;
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clocks = <&clk_s_a0_ls CLK_ICN_REG>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>;
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};
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/* SBC_UART1 */
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sbc_serial1: serial@fe531000 {
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compatible = "st,asc";
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status = "disabled";
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reg = <0xfe531000 0x2c>;
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interrupts = <0 210 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sbc_serial1>;
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clocks = <&clk_sysin>;
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};
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i2c@fed40000 {
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compatible = "st,comms-ssc4-i2c";
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reg = <0xfed40000 0x110>;
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interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_s_a0_ls CLK_ICN_REG>;
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clock-names = "ssc";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c0_default>;
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status = "disabled";
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};
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i2c@fed41000 {
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compatible = "st,comms-ssc4-i2c";
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reg = <0xfed41000 0x110>;
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interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_s_a0_ls CLK_ICN_REG>;
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clock-names = "ssc";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1_default>;
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status = "disabled";
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};
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i2c@fe540000 {
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compatible = "st,comms-ssc4-i2c";
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reg = <0xfe540000 0x110>;
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interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_sysin>;
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clock-names = "ssc";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sbc_i2c0_default>;
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status = "disabled";
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};
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i2c@fe541000 {
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compatible = "st,comms-ssc4-i2c";
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reg = <0xfe541000 0x110>;
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interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_sysin>;
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clock-names = "ssc";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sbc_i2c1_default>;
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status = "disabled";
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};
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ethernet0: dwmac@fe810000 {
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device_type = "network";
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compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710";
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status = "disabled";
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reg = <0xfe810000 0x8000>;
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reg-names = "stmmaceth";
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interrupts = <0 133 0>, <0 134 0>, <0 135 0>;
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interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
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snps,pbl = <32>;
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snps,mixed-burst;
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st,syscon = <&syscfg_rear 0x8bc>;
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resets = <&softreset STIH416_ETH0_SOFTRESET>;
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reset-names = "stmmaceth";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_mii0>;
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clock-names = "stmmaceth", "sti-ethclk";
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clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
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};
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ethernet1: dwmac@fef08000 {
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device_type = "network";
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compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710";
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status = "disabled";
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reg = <0xfef08000 0x8000>;
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reg-names = "stmmaceth";
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interrupts = <0 136 0>, <0 137 0>, <0 138 0>;
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interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
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snps,pbl = <32>;
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snps,mixed-burst;
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st,syscon = <&syscfg_sbc 0x7f0>;
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resets = <&softreset STIH416_ETH1_SOFTRESET>;
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reset-names = "stmmaceth";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_mii1>;
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clock-names = "stmmaceth", "sti-ethclk";
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clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
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};
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rc: rc@fe518000 {
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compatible = "st,comms-irb";
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reg = <0xfe518000 0x234>;
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interrupts = <0 203 0>;
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rx-mode = "infrared";
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clocks = <&clk_sysin>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ir>;
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resets = <&softreset STIH416_IRB_SOFTRESET>;
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};
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/* FSM */
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spifsm: spifsm@fe902000 {
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compatible = "st,spi-fsm";
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reg = <0xfe902000 0x1000>;
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pinctrl-0 = <&pinctrl_fsm>;
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st,syscfg = <&syscfg_rear>;
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st,boot-device-reg = <0x958>;
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st,boot-device-spi = <0x1a>;
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status = "disabled";
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};
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keyscan: keyscan@fe4b0000 {
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compatible = "st,sti-keyscan";
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status = "disabled";
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reg = <0xfe4b0000 0x2000>;
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interrupts = <GIC_SPI 212 IRQ_TYPE_NONE>;
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clocks = <&clk_sysin>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_keyscan>;
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resets = <&powerdown STIH416_KEYSCAN_POWERDOWN>,
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<&softreset STIH416_KEYSCAN_SOFTRESET>;
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};
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temp0 {
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compatible = "st,stih416-sas-thermal";
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clock-names = "thermal";
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clocks = <&clockgen_c_vcc 14>;
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status = "okay";
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};
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temp1@fdfe8000 {
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compatible = "st,stih416-mpe-thermal";
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reg = <0xfdfe8000 0x10>;
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clocks = <&clockgen_e 3>;
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clock-names = "thermal";
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interrupts = <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
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status = "okay";
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};
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mmc0: sdhci@fe81e000 {
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compatible = "st,sdhci";
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status = "disabled";
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reg = <0xfe81e000 0x1000>;
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interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>;
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interrupt-names = "mmcirq";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_mmc0>;
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clock-names = "mmc";
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clocks = <&clk_s_a1_ls 1>;
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};
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mmc1: sdhci@fe81f000 {
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compatible = "st,sdhci";
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status = "disabled";
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reg = <0xfe81f000 0x1000>;
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interrupts = <GIC_SPI 128 IRQ_TYPE_NONE>;
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interrupt-names = "mmcirq";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_mmc1>;
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clock-names = "mmc";
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clocks = <&clk_s_a1_ls 8>;
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};
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miphy365x_phy: phy@fe382000 {
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compatible = "st,miphy365x-phy";
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st,syscfg = <&syscfg_rear 0x824 0x828>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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phy_port0: port@fe382000 {
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#phy-cells = <1>;
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reg = <0xfe382000 0x100>, <0xfe394000 0x100>;
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reg-names = "sata", "pcie";
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};
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phy_port1: port@fe38a000 {
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#phy-cells = <1>;
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reg = <0xfe38a000 0x100>, <0xfe804000 0x100>;
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reg-names = "sata", "pcie";
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};
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};
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sata0: sata@fe380000 {
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compatible = "st,sti-ahci";
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reg = <0xfe380000 0x1000>;
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interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
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interrupt-names = "hostc";
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phys = <&phy_port0 PHY_TYPE_SATA>;
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phy-names = "sata-phy";
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resets = <&powerdown STIH416_SATA0_POWERDOWN>,
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<&softreset STIH416_SATA0_SOFTRESET>;
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reset-names = "pwr-dwn", "sw-rst";
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clock-names = "ahci_clk";
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clocks = <&clk_s_a0_ls CLK_ICN_REG>;
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status = "disabled";
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};
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usb2_phy: phy@0 {
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compatible = "st,stih416-usb-phy";
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#phy-cells = <0>;
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st,syscfg = <&syscfg_rear>;
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clocks = <&clk_sysin>;
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clock-names = "osc_phy";
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};
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ehci0: usb@fe1ffe00 {
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compatible = "st,st-ehci-300x";
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reg = <0xfe1ffe00 0x100>;
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interrupts = <GIC_SPI 148 IRQ_TYPE_NONE>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb0>;
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clocks = <&clk_s_a1_ls 0>,
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<&clockgen_b0 0>;
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clock-names = "ic", "clk48";
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phys = <&usb2_phy>;
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phy-names = "usb";
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resets = <&powerdown STIH416_USB0_POWERDOWN>,
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<&softreset STIH416_USB0_SOFTRESET>;
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reset-names = "power", "softreset";
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};
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ohci0: usb@fe1ffc00 {
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compatible = "st,st-ohci-300x";
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reg = <0xfe1ffc00 0x100>;
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interrupts = <GIC_SPI 149 IRQ_TYPE_NONE>;
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clocks = <&clk_s_a1_ls 0>,
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<&clockgen_b0 0>;
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clock-names = "ic", "clk48";
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phys = <&usb2_phy>;
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phy-names = "usb";
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status = "okay";
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resets = <&powerdown STIH416_USB0_POWERDOWN>,
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<&softreset STIH416_USB0_SOFTRESET>;
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reset-names = "power", "softreset";
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};
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ehci1: usb@fe203e00 {
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compatible = "st,st-ehci-300x";
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reg = <0xfe203e00 0x100>;
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interrupts = <GIC_SPI 150 IRQ_TYPE_NONE>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb1>;
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clocks = <&clk_s_a1_ls 0>,
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<&clockgen_b0 0>;
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clock-names = "ic", "clk48";
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phys = <&usb2_phy>;
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phy-names = "usb";
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resets = <&powerdown STIH416_USB1_POWERDOWN>,
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<&softreset STIH416_USB1_SOFTRESET>;
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reset-names = "power", "softreset";
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};
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ohci1: usb@fe203c00 {
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compatible = "st,st-ohci-300x";
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reg = <0xfe203c00 0x100>;
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interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
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clocks = <&clk_s_a1_ls 0>,
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<&clockgen_b0 0>;
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clock-names = "ic", "clk48";
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phys = <&usb2_phy>;
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phy-names = "usb";
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resets = <&powerdown STIH416_USB1_POWERDOWN>,
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<&softreset STIH416_USB1_SOFTRESET>;
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reset-names = "power", "softreset";
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};
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ehci2: usb@fe303e00 {
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compatible = "st,st-ehci-300x";
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reg = <0xfe303e00 0x100>;
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interrupts = <GIC_SPI 152 IRQ_TYPE_NONE>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb2>;
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clocks = <&clk_s_a1_ls 0>,
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<&clockgen_b0 0>;
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clock-names = "ic", "clk48";
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phys = <&usb2_phy>;
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phy-names = "usb";
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resets = <&powerdown STIH416_USB2_POWERDOWN>,
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<&softreset STIH416_USB2_SOFTRESET>;
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reset-names = "power", "softreset";
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};
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ohci2: usb@fe303c00 {
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compatible = "st,st-ohci-300x";
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reg = <0xfe303c00 0x100>;
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interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>;
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clocks = <&clk_s_a1_ls 0>,
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<&clockgen_b0 0>;
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clock-names = "ic", "clk48";
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phys = <&usb2_phy>;
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phy-names = "usb";
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resets = <&powerdown STIH416_USB2_POWERDOWN>,
|
||||
<&softreset STIH416_USB2_SOFTRESET>;
|
||||
reset-names = "power", "softreset";
|
||||
};
|
||||
|
||||
ehci3: usb@fe343e00 {
|
||||
compatible = "st,st-ehci-300x";
|
||||
reg = <0xfe343e00 0x100>;
|
||||
interrupts = <GIC_SPI 154 IRQ_TYPE_NONE>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usb3>;
|
||||
clocks = <&clk_s_a1_ls 0>,
|
||||
<&clockgen_b0 0>;
|
||||
clock-names = "ic", "clk48";
|
||||
phys = <&usb2_phy>;
|
||||
phy-names = "usb";
|
||||
resets = <&powerdown STIH416_USB3_POWERDOWN>,
|
||||
<&softreset STIH416_USB3_SOFTRESET>;
|
||||
reset-names = "power", "softreset";
|
||||
};
|
||||
|
||||
ohci3: usb@fe343c00 {
|
||||
compatible = "st,st-ohci-300x";
|
||||
reg = <0xfe343c00 0x100>;
|
||||
interrupts = <GIC_SPI 155 IRQ_TYPE_NONE>;
|
||||
clocks = <&clk_s_a1_ls 0>,
|
||||
<&clockgen_b0 0>;
|
||||
clock-names = "ic", "clk48";
|
||||
phys = <&usb2_phy>;
|
||||
phy-names = "usb";
|
||||
resets = <&powerdown STIH416_USB3_POWERDOWN>,
|
||||
<&softreset STIH416_USB3_SOFTRESET>;
|
||||
reset-names = "power", "softreset";
|
||||
};
|
||||
|
||||
/* SAS PWM Module */
|
||||
pwm0: pwm@fed10000 {
|
||||
compatible = "st,sti-pwm";
|
||||
status = "disabled";
|
||||
#pwm-cells = <2>;
|
||||
reg = <0xfed10000 0x68>;
|
||||
interrupts = <GIC_SPI 200 IRQ_TYPE_NONE>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm0_chan0_default
|
||||
&pinctrl_pwm0_chan1_default
|
||||
&pinctrl_pwm0_chan2_default
|
||||
&pinctrl_pwm0_chan3_default>;
|
||||
|
||||
clock-names = "pwm", "capture";
|
||||
clocks = <&clk_sysin>, <&clk_s_a0_ls CLK_ICN_REG>;
|
||||
|
||||
st,pwm-num-chan = <4>;
|
||||
st,capture-num-chan = <2>;
|
||||
};
|
||||
|
||||
/* SBC PWM Module */
|
||||
pwm1: pwm@fe510000 {
|
||||
compatible = "st,sti-pwm";
|
||||
status = "disabled";
|
||||
#pwm-cells = <2>;
|
||||
reg = <0xfe510000 0x68>;
|
||||
interrupts = <GIC_SPI 202 IRQ_TYPE_NONE>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm1_chan0_default
|
||||
/*
|
||||
* Shared with SBC_OBS_NOTRST. Don't
|
||||
* enable unless you really know what
|
||||
* you're doing.
|
||||
*
|
||||
* &pinctrl_pwm1_chan1_default
|
||||
*/
|
||||
&pinctrl_pwm1_chan2_default
|
||||
&pinctrl_pwm1_chan3_default>;
|
||||
|
||||
clock-names = "pwm";
|
||||
clocks = <&clk_sysin>;
|
||||
st,pwm-num-chan = <3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue