sfc: Properly distinguish RX buffer and DMA lengths
Replace efx_nic::rx_buffer_len with efx_nic::rx_dma_len, the maximum RX DMA length. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
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80c2e716d5
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272baeeb6a
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@ -639,12 +639,11 @@ static void efx_start_datapath(struct efx_nic *efx)
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* support the current MTU, including padding for header
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* alignment and overruns.
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*/
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efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
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EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
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efx->type->rx_buffer_hash_size +
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efx->type->rx_buffer_padding);
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efx->rx_buffer_order = get_order(efx->rx_buffer_len +
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sizeof(struct efx_rx_page_state));
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efx->rx_dma_len = (efx->type->rx_buffer_hash_size +
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EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
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efx->type->rx_buffer_padding);
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efx->rx_buffer_order = get_order(sizeof(struct efx_rx_page_state) +
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EFX_PAGE_IP_ALIGN + efx->rx_dma_len);
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/* We must keep at least one descriptor in a TX ring empty.
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* We could avoid this when the queue size does not exactly
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@ -669,8 +669,7 @@ struct vfdi_status;
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* @n_channels: Number of channels in use
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* @n_rx_channels: Number of channels used for RX (= number of RX queues)
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* @n_tx_channels: Number of channels used for TX
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* @rx_buffer_len: RX buffer length, including start alignment but excluding
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* any metadata
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* @rx_dma_len: Current maximum RX DMA length
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* @rx_buffer_order: Order (log2) of number of pages for each RX buffer
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* @rx_hash_key: Toeplitz hash key for RSS
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* @rx_indir_table: Indirection table for RSS
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@ -786,7 +785,7 @@ struct efx_nic {
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unsigned rss_spread;
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unsigned tx_channel_offset;
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unsigned n_tx_channels;
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unsigned int rx_buffer_len;
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unsigned int rx_dma_len;
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unsigned int rx_buffer_order;
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u8 rx_hash_key[40];
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u32 rx_indir_table[128];
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@ -27,8 +27,9 @@
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/* Number of RX descriptors pushed at once. */
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#define EFX_RX_BATCH 8
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/* Maximum size of a buffer sharing a page */
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#define EFX_RX_HALF_PAGE ((PAGE_SIZE >> 1) - sizeof(struct efx_rx_page_state))
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/* Maximum length for an RX descriptor sharing a page */
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#define EFX_RX_HALF_PAGE ((PAGE_SIZE >> 1) - sizeof(struct efx_rx_page_state) \
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- EFX_PAGE_IP_ALIGN)
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/* Size of buffer allocated for skb header area. */
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#define EFX_SKB_HEADERS 64u
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@ -52,10 +53,6 @@ static inline unsigned int efx_rx_buf_offset(struct efx_nic *efx,
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{
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return buf->page_offset + efx->type->rx_buffer_hash_size;
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}
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static inline unsigned int efx_rx_buf_size(struct efx_nic *efx)
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{
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return PAGE_SIZE << efx->rx_buffer_order;
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}
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static u8 *efx_rx_buf_eh(struct efx_nic *efx, struct efx_rx_buffer *buf)
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{
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@ -105,7 +102,7 @@ static int efx_init_rx_buffers(struct efx_rx_queue *rx_queue)
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if (unlikely(page == NULL))
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return -ENOMEM;
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dma_addr = dma_map_page(&efx->pci_dev->dev, page, 0,
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efx_rx_buf_size(efx),
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PAGE_SIZE << efx->rx_buffer_order,
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DMA_FROM_DEVICE);
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if (unlikely(dma_mapping_error(&efx->pci_dev->dev, dma_addr))) {
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__free_pages(page, efx->rx_buffer_order);
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@ -124,12 +121,12 @@ static int efx_init_rx_buffers(struct efx_rx_queue *rx_queue)
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rx_buf->dma_addr = dma_addr + EFX_PAGE_IP_ALIGN;
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rx_buf->page = page;
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rx_buf->page_offset = page_offset + EFX_PAGE_IP_ALIGN;
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rx_buf->len = efx->rx_buffer_len - EFX_PAGE_IP_ALIGN;
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rx_buf->len = efx->rx_dma_len;
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rx_buf->flags = 0;
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++rx_queue->added_count;
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++state->refcnt;
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if ((~count & 1) && (efx->rx_buffer_len <= EFX_RX_HALF_PAGE)) {
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if ((~count & 1) && (efx->rx_dma_len <= EFX_RX_HALF_PAGE)) {
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/* Use the second half of the page */
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get_page(page);
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dma_addr += (PAGE_SIZE >> 1);
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@ -153,7 +150,7 @@ static void efx_unmap_rx_buffer(struct efx_nic *efx,
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if (--state->refcnt == 0) {
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dma_unmap_page(&efx->pci_dev->dev,
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state->dma_addr,
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efx_rx_buf_size(efx),
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PAGE_SIZE << efx->rx_buffer_order,
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DMA_FROM_DEVICE);
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} else if (used_len) {
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dma_sync_single_for_cpu(&efx->pci_dev->dev,
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@ -221,7 +218,7 @@ static void efx_recycle_rx_buffer(struct efx_channel *channel,
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rx_buf->flags = 0;
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if (efx->rx_buffer_len <= EFX_RX_HALF_PAGE &&
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if (efx->rx_dma_len <= EFX_RX_HALF_PAGE &&
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page_count(rx_buf->page) == 1)
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efx_resurrect_rx_buffer(rx_queue, rx_buf);
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