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Merge tag 'stm32-dt-for-v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt 

STM32 DT for v6.2, round 1

Highlights:
----------

- MPU:
  - ST boards:
    - Add MCP23017 IO expander support on stm32mp135f-dk board.
    - Add stm32g0 support for USB typeC on stm32mp135f-dk
    - Add USB (EHCI / OTG) on stm32mp135f-dk
    - Add ADC support on stm32mp135f-dk
    - Add USB2514B onboard hub on stm32mp157c-ev1

  - DH:
    - Fix severals Yaml DT validation issues

* tag 'stm32-dt-for-v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (28 commits)
  ARM: dts: stm32: Rename mdio0 to mdio on DHCOR Testbench board
  ARM: dts: stm32: add mcp23017 IO expander on I2C1 on stm32mp135f-dk
  ARM: dts: stm32: add mcp23017 pinctrl entry for stm32mp13
  ARM: dts: stm32: enable USB OTG in dual role mode on stm32mp135f-dk
  ARM: dts: stm32: add pins for stm32g0 typec controller on stm32mp13
  ARM: dts: stm32: enable USB Host EHCI on stm32mp135f-dk
  ARM: dts: stm32: enable USB HS phys on stm32mp135f-dk
  ARM: dts: stm32: add fixed regulators to support usb on stm32mp135f-dk
  ARM: dts: stm32: add USB OTG HS support on stm32mp131
  ARM: dts: stm32: add UBSH EHCI and OHCI support on stm32mp131
  ARM: dts: stm32: add USBPHYC and dual USB HS PHY support on stm32mp131
  ARM: dts: stm32: add PWR fixed regulators on stm32mp131
  ARM: dts: stm32: Fix AV96 WLAN regulator gpio property
  ARM: dts: stm32: add adc support on stm32mp135f-dk
  ARM: dts: stm32: add dummy vdd_adc regulator on stm32mp135f-dk
  ARM: dts: stm32: add adc pins muxing on stm32mp135f-dk
  ARM: dts: stm32: add adc support to stm32mp13
  ARM: dts: stm32: Drop MMCI interrupt-names
  ARM: dts: stm32: update vbus-supply of usbphyc_port0 on stm32mp157c-ev1
  ARM: dts: stm32: add support for USB2514B onboard hub on stm32mp157c-ev1
  ...

Link: https://lore.kernel.org/r/3235e5be-d89f-f76c-5e25-5d1210feb857@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-11-21 11:44:13 +01:00
parent 4614161b06 d8515330a6
commit 27269ac4f6
No known key found for this signature in database
GPG Key ID: 9A6C79EFE60018D9
20 changed files with 543 additions and 24 deletions
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6
Documentation/devicetree/bindings/arm/stm32/stm32.yaml
View File

@ -59,6 +59,12 @@ properties:
- prt,prtt1s # Protonic PRTT1S
- const: st,stm32mp151
- description: DH STM32MP151 DHCOR SoM based Boards
items:
- const: dh,stm32mp151a-dhcor-testbench
- const: dh,stm32mp151a-dhcor-som
- const: st,stm32mp151
- description: DH STM32MP153 DHCOM SoM based Boards
items:
- const: dh,stm32mp153c-dhcom-drc02

1
arch/arm/boot/dts/Makefile
View File

@ -1215,6 +1215,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
stm32mp151a-prtt1a.dtb \
stm32mp151a-prtt1c.dtb \
stm32mp151a-prtt1s.dtb \
stm32mp151a-dhcor-testbench.dtb \
stm32mp153c-dhcom-drc02.dtb \
stm32mp153c-dhcor-drc-compact.dtb \
stm32mp157a-avenger96.dtb \

2
arch/arm/boot/dts/stm32h743.dtsi
View File

@ -375,7 +375,6 @@
arm,primecell-periphid = <0x10153180>;
reg = <0x52007000 0x1000>;
interrupts = <49>;
interrupt-names = "cmd_irq";
clocks = <&rcc SDMMC1_CK>;
clock-names = "apb_pclk";
resets = <&rcc STM32H7_AHB3_RESET(SDMMC1)>;
@ -389,7 +388,6 @@
arm,primecell-periphid = <0x10153180>;
reg = <0x48022400 0x400>;
interrupts = <124>;
interrupt-names = "cmd_irq";
clocks = <&rcc SDMMC2_CK>;
clock-names = "apb_pclk";
resets = <&rcc STM32H7_AHB2_RESET(SDMMC2)>;

21
arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
View File

@ -6,6 +6,13 @@
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
&pinctrl {
adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 {
pins {
pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
<STM32_PINMUX('A', 3, ANALOG)>; /* ADC1 in12 */
};
};
i2c1_pins_a: i2c1-0 {
pins {
pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
@ -40,6 +47,13 @@
};
};
mcp23017_pins_a: mcp23017-0 {
pins {
pinmux = <STM32_PINMUX('G', 12, GPIO)>;
bias-pull-up;
};
};
sdmmc1_b4_pins_a: sdmmc1-b4-0 {
pins {
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
@ -165,6 +179,13 @@
};
};
stm32g0_intn_pins_a: stm32g0-intn-0 {
pins {
pinmux = <STM32_PINMUX('I', 2, GPIO)>;
bias-pull-up;
};
};
uart4_pins_a: uart4-0 {
pins1 {
pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */

128
arch/arm/boot/dts/stm32mp131.dtsi
View File

@ -33,6 +33,8 @@
optee {
method = "smc";
compatible = "linaro,optee-tz";
interrupt-parent = <&intc>;
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
};
scmi: scmi {
@ -77,6 +79,28 @@
always-on;
};
/* PWR 1v1, 1v8 and 3v3 regulators defined as fixed, waiting for SCMI */
reg11: reg11 {
compatible = "regulator-fixed";
regulator-name = "reg11";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
};
reg18: reg18 {
compatible = "regulator-fixed";
regulator-name = "reg18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
usb33: usb33 {
compatible = "regulator-fixed";
regulator-name = "usb33";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
@ -231,6 +255,66 @@
dma-channels = <16>;
};
adc_2: adc@48004000 {
compatible = "st,stm32mp13-adc-core";
reg = <0x48004000 0x400>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc ADC2>, <&rcc ADC2_K>;
clock-names = "bus", "adc";
interrupt-controller;
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
adc2: adc@0 {
compatible = "st,stm32mp13-adc";
#io-channel-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0>;
interrupt-parent = <&adc_2>;
interrupts = <0>;
dmas = <&dmamux1 10 0x400 0x80000001>;
dma-names = "rx";
status = "disabled";
channel@13 {
reg = <13>;
label = "vrefint";
};
channel@14 {
reg = <14>;
label = "vddcore";
};
channel@16 {
reg = <16>;
label = "vddcpu";
};
channel@17 {
reg = <17>;
label = "vddq_ddr";
};
};
};
usbotg_hs: usb@49000000 {
compatible = "st,stm32mp15-hsotg", "snps,dwc2";
reg = <0x49000000 0x40000>;
clocks = <&rcc USBO_K>;
clock-names = "otg";
resets = <&rcc USBO_R>;
reset-names = "dwc2";
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
g-rx-fifo-size = <512>;
g-np-tx-fifo-size = <32>;
g-tx-fifo-size = <256 16 16 16 16 16 16 16>;
dr_mode = "otg";
otg-rev = <0x200>;
usb33d-supply = <&usb33>;
status = "disabled";
};
spi4: spi@4c002000 {
compatible = "st,stm32h7-spi";
reg = <0x4c002000 0x400>;
@ -354,7 +438,6 @@
arm,primecell-periphid = <0x20253180>;
reg = <0x58005000 0x1000>, <0x58006000 0x1000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cmd_irq";
clocks = <&rcc SDMMC1_K>;
clock-names = "apb_pclk";
resets = <&rcc SDMMC1_R>;
@ -369,7 +452,6 @@
arm,primecell-periphid = <0x20253180>;
reg = <0x58007000 0x1000>, <0x58008000 0x1000>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cmd_irq";
clocks = <&rcc SDMMC2_K>;
clock-names = "apb_pclk";
resets = <&rcc SDMMC2_R>;
@ -379,6 +461,25 @@
status = "disabled";
};
usbh_ohci: usb@5800c000 {
compatible = "generic-ohci";
reg = <0x5800c000 0x1000>;
clocks = <&usbphyc>, <&rcc USBH>;
resets = <&rcc USBH_R>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
usbh_ehci: usb@5800d000 {
compatible = "generic-ehci";
reg = <0x5800d000 0x1000>;
clocks = <&usbphyc>, <&rcc USBH>;
resets = <&rcc USBH_R>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
companion = <&usbh_ohci>;
status = "disabled";
};
iwdg2: watchdog@5a002000 {
compatible = "st,stm32mp1-iwdg";
reg = <0x5a002000 0x400>;
@ -387,6 +488,29 @@
status = "disabled";
};
usbphyc: usbphyc@5a006000 {
#address-cells = <1>;
#size-cells = <0>;
#clock-cells = <0>;
compatible = "st,stm32mp1-usbphyc";
reg = <0x5a006000 0x1000>;
clocks = <&rcc USBPHY_K>;
resets = <&rcc USBPHY_R>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
status = "disabled";
usbphyc_port0: usb-phy@0 {
#phy-cells = <0>;
reg = <0>;
};
usbphyc_port1: usb-phy@1 {
#phy-cells = <1>;
reg = <1>;
};
};
rtc: rtc@5c004000 {
compatible = "st,stm32mp1-rtc";
reg = <0x5c004000 0x400>;

31
arch/arm/boot/dts/stm32mp133.dtsi
View File

@ -33,5 +33,36 @@
bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
status = "disabled";
};
adc_1: adc@48003000 {
compatible = "st,stm32mp13-adc-core";
reg = <0x48003000 0x400>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc ADC1>, <&rcc ADC1_K>;
clock-names = "bus", "adc";
interrupt-controller;
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
adc1: adc@0 {
compatible = "st,stm32mp13-adc";
#io-channel-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0>;
interrupt-parent = <&adc_1>;
interrupts = <0>;
dmas = <&dmamux1 9 0x400 0x80000001>;
dma-names = "rx";
status = "disabled";
channel@18 {
reg = <18>;
label = "vrefint";
};
};
};
};
};

144
arch/arm/boot/dts/stm32mp135f-dk.dts
View File

@ -59,6 +59,22 @@
};
};
v3v3_sw: v3v3-sw {
compatible = "regulator-fixed";
regulator-name = "v3v3_sw";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd_adc: vdd-adc {
compatible = "regulator-fixed";
regulator-name = "vdd_adc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd_sd: vdd-sd {
compatible = "regulator-fixed";
regulator-name = "vdd_sd";
@ -66,6 +82,39 @@
regulator-max-microvolt = <2900000>;
regulator-always-on;
};
vdd_usb: vdd-usb {
compatible = "regulator-fixed";
regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
&adc_1 {
pinctrl-names = "default";
pinctrl-0 = <&adc1_usb_cc_pins_a>;
vdda-supply = <&vdd_adc>;
vref-supply = <&vdd_adc>;
status = "okay";
adc1: adc@0 {
status = "okay";
/*
* Type-C USB_PWR_CC1 & USB_PWR_CC2 on in6 & in12.
* Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
* 5 * (5.1 + 47kOhms) * 5pF => 1.3us.
* Use arbitrary margin here (e.g. 5us).
*/
channel@6 {
reg = <6>;
st,min-sample-time-ns = <5000>;
};
channel@12 {
reg = <12>;
st,min-sample-time-ns = <5000>;
};
};
};
&i2c1 {
@ -79,6 +128,42 @@
/* spare dmas for other usage */
/delete-property/dmas;
/delete-property/dma-names;
mcp23017: pinctrl@21 {
compatible = "microchip,mcp23017";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpiog>;
pinctrl-names = "default";
pinctrl-0 = <&mcp23017_pins_a>;
interrupt-controller;
#interrupt-cells = <2>;
microchip,irq-mirror;
};
typec@53 {
compatible = "st,stm32g0-typec";
reg = <0x53>;
/* Alert pin on PI2 */
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&gpioi>;
/* Internal pull-up on PI2 */
pinctrl-names = "default";
pinctrl-0 = <&stm32g0_intn_pins_a>;
firmware-name = "stm32g0-ucsi.mp135f-dk.fw";
connector {
compatible = "usb-c-connector";
label = "USB-C";
port {
con_usb_c_g0_ep: endpoint {
remote-endpoint = <&usbotg_hs_ep>;
};
};
};
};
};
&i2c5 {
@ -108,7 +193,7 @@
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
broken-cd;
cd-gpios = <&gpioh 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
disable-wp;
st,neg-edge;
bus-width = <4>;
@ -128,3 +213,60 @@
pinctrl-0 = <&uart4_pins_a>;
status = "okay";
};
&usbh_ehci {
phys = <&usbphyc_port0>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
/* onboard HUB */
hub@1 {
compatible = "usb424,2514";
reg = <1>;
vdd-supply = <&v3v3_sw>;
};
};
&usbotg_hs {
phys = <&usbphyc_port1 0>;
phy-names = "usb2-phy";
usb-role-switch;
status = "okay";
port {
usbotg_hs_ep: endpoint {
remote-endpoint = <&con_usb_c_g0_ep>;
};
};
};
&usbphyc {
status = "okay";
};
&usbphyc_port0 {
phy-supply = <&vdd_usb>;
st,current-boost-microamp = <1000>;
st,decrease-hs-slew-rate;
st,tune-hs-dc-level = <2>;
st,enable-hs-rftime-reduction;
st,trim-hs-current = <11>;
st,trim-hs-impedance = <2>;
st,tune-squelch-level = <1>;
st,enable-hs-rx-gain-eq;
st,no-hs-ftime-ctrl;
st,no-lsfs-sc;
};
&usbphyc_port1 {
phy-supply = <&vdd_usb>;
st,current-boost-microamp = <1000>;
st,decrease-hs-slew-rate;
st,tune-hs-dc-level = <2>;
st,enable-hs-rftime-reduction;
st,trim-hs-current = <11>;
st,trim-hs-impedance = <2>;
st,tune-squelch-level = <1>;
st,enable-hs-rx-gain-eq;
st,no-hs-ftime-ctrl;
st,no-lsfs-sc;
};

3
arch/arm/boot/dts/stm32mp151.dtsi
View File

@ -1118,7 +1118,6 @@
arm,primecell-periphid = <0x00253180>;
reg = <0x48004000 0x400>;
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cmd_irq";
clocks = <&rcc SDMMC3_K>;
clock-names = "apb_pclk";
resets = <&rcc SDMMC3_R>;
@ -1439,7 +1438,6 @@
arm,primecell-periphid = <0x00253180>;
reg = <0x58005000 0x1000>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cmd_irq";
clocks = <&rcc SDMMC1_K>;
clock-names = "apb_pclk";
resets = <&rcc SDMMC1_R>;
@ -1454,7 +1452,6 @@
arm,primecell-periphid = <0x00253180>;
reg = <0x58007000 0x1000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "cmd_irq";
clocks = <&rcc SDMMC2_K>;
clock-names = "apb_pclk";
resets = <&rcc SDMMC2_R>;

17
arch/arm/boot/dts/stm32mp151a-dhcor-testbench.dts Normal file
View File

@ -0,0 +1,17 @@
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/*
* Copyright (C) 2022 Marek Vasut <marex@denx.de>
*/
/dts-v1/;
#include "stm32mp151.dtsi"
#include "stm32mp15xx-dhcor-som.dtsi"
#include "stm32mp15xx-dhcor-testbench.dtsi"
/ {
model = "DH electronics STM32MP151A DHCOR Testbench";
compatible = "dh,stm32mp151a-dhcor-testbench",
"dh,stm32mp151a-dhcor-som",
"st,stm32mp151";
};

1
arch/arm/boot/dts/stm32mp157a-dhcor-avenger96.dts
View File

@ -13,7 +13,6 @@
/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp15xc.dtsi"
#include "stm32mp15xx-dhcor-som.dtsi"
#include "stm32mp15xx-dhcor-avenger96.dtsi"

2
arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi
View File

@ -173,7 +173,7 @@
phy-handle = <&phy0>;
st,eth-ref-clk-sel;
mdio0 {
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";

15
arch/arm/boot/dts/stm32mp157c-ev1.dts
View File

@ -144,7 +144,7 @@
max-speed = <1000>;
phy-handle = <&phy0>;
mdio0 {
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
@ -370,6 +370,14 @@
&usbh_ehci {
phys = <&usbphyc_port0>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
/* onboard HUB */
hub@1 {
compatible = "usb424,2514";
reg = <1>;
vdd-supply = <&v3v3>;
};
};
&usbotg_hs {
@ -393,6 +401,11 @@
st,tune-squelch-level = <3>;
st,tune-hs-rx-offset = <2>;
st,no-lsfs-sc;
connector {
compatible = "usb-a-connector";
vbus-supply = <&vbus_sw>;
};
};
&usbphyc_port1 {

2
arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts
View File

@ -112,7 +112,7 @@
phy-handle = <&ethphy>;
status = "okay";
mdio0 {
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;

2
arch/arm/boot/dts/stm32mp157c-odyssey.dts
View File

@ -41,7 +41,7 @@
assigned-clock-rates = <125000000>; /* Clock PLL4 to 750Mhz in ATF/U-Boot */
st,eth-clk-sel;
mdio0 {
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";

4
arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi
View File

@ -242,7 +242,7 @@
sai2a_port: port {
sai2a_endpoint: endpoint {
remote-endpoint = <&sgtl5000_tx_endpoint>;
format = "i2s";
dai-format = "i2s";
mclk-fs = <512>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <16>;
@ -260,7 +260,7 @@
sai2b_port: port {
sai2b_endpoint: endpoint {
remote-endpoint = <&sgtl5000_rx_endpoint>;
format = "i2s";
dai-format = "i2s";
mclk-fs = <512>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <16>;

2
arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
View File

@ -125,7 +125,7 @@
max-speed = <100>;
phy-handle = <&phy0>;
mdio0 {
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";

7
arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi
View File

@ -66,7 +66,6 @@
led4 {
label = "green:user3";
gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "none";
default-state = "off";
panic-indicator;
};
@ -100,7 +99,7 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpioz 3 GPIO_ACTIVE_HIGH>;
gpio = <&gpioz 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
@ -151,7 +150,7 @@
max-speed = <1000>;
phy-handle = <&phy0>;
mdio0 {
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
@ -359,7 +358,7 @@
sai2a_port: port {
sai2a_endpoint: endpoint {
remote-endpoint = <&adv7513_i2s0>;
format = "i2s";
dai-format = "i2s";
mclk-fs = <256>;
};
};

2
arch/arm/boot/dts/stm32mp15xx-dhcor-drc-compact.dtsi
View File

@ -78,7 +78,7 @@
max-speed = <1000>;
phy-handle = <&phy0>;
mdio0 {
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";

171
arch/arm/boot/dts/stm32mp15xx-dhcor-testbench.dtsi Normal file
View File

@ -0,0 +1,171 @@
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/*
* Copyright (C) 2022 Marek Vasut <marex@denx.de>
*/
/ {
aliases {
ethernet0 = &ethernet0;
mmc0 = &sdmmc1;
mmc1 = &sdmmc2;
serial0 = &uart4;
serial1 = &uart7;
spi0 = &qspi;
};
chosen {
stdout-path = "serial0:115200n8";
};
sd_switch: regulator-sd_switch {
compatible = "regulator-gpio";
regulator-name = "sd_switch";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2900000>;
regulator-type = "voltage";
regulator-always-on;
gpios = <&gpioi 5 GPIO_ACTIVE_HIGH>;
gpios-states = <0>;
states = <1800000 0x1>,
<2900000 0x0>;
};
};
&adc {
pinctrl-names = "default";
pinctrl-0 = <&adc12_ain_pins_b>;
vdd-supply = <&vdd>;
vdda-supply = <&vdda>;
vref-supply = <&vdda>;
status = "okay";
adc1: adc@0 {
st,adc-channels = <0 1 6>;
st,min-sample-time-nsecs = <5000>;
status = "okay";
};
adc2: adc@100 {
st,adc-channels = <0 1 2>;
st,min-sample-time-nsecs = <5000>;
status = "okay";
};
};
&ethernet0 {
status = "okay";
pinctrl-0 = <&ethernet0_rgmii_pins_c>;
pinctrl-1 = <&ethernet0_rgmii_sleep_pins_c>;
pinctrl-names = "default", "sleep";
phy-mode = "rgmii";
max-speed = <1000>;
phy-handle = <&phy0>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
reset-delay-us = <1000>;
reset-post-delay-us = <1000>;
phy0: ethernet-phy@7 {
reg = <7>;
rxc-skew-ps = <1500>;
rxdv-skew-ps = <540>;
rxd0-skew-ps = <420>;
rxd1-skew-ps = <420>;
rxd2-skew-ps = <420>;
rxd3-skew-ps = <420>;
txc-skew-ps = <1440>;
txen-skew-ps = <540>;
txd0-skew-ps = <420>;
txd1-skew-ps = <420>;
txd2-skew-ps = <420>;
txd3-skew-ps = <420>;
};
};
};
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_b>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_b>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_b>;
cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
disable-wp;
st,sig-dir;
st,neg-edge;
st,use-ckin;
bus-width = <4>;
vmmc-supply = <&vdd_sd>;
vqmmc-supply = <&sd_switch>;
status = "okay";
};
&sdmmc2 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_c>;
pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_c>;
pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_c>;
bus-width = <8>;
mmc-ddr-1_8v;
no-sd;
no-sdio;
non-removable;
st,neg-edge;
vmmc-supply = <&v3v3>;
vqmmc-supply = <&v3v3>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_b>;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
&uart7 {
pinctrl-names = "default";
pinctrl-0 = <&uart7_pins_a>;
uart-has-rtscts;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
&usbh_ehci {
phys = <&usbphyc_port0>;
status = "okay";
};
&usbh_ohci {
phys = <&usbphyc_port0>;
status = "okay";
};
&usbotg_hs {
pinctrl-0 = <&usbotg_hs_pins_a>;
pinctrl-names = "default";
phy-names = "usb2-phy";
phys = <&usbphyc_port1 0>;
status = "okay";
vbus-supply = <&vbus_otg>;
};
&usbphyc {
status = "okay";
};
&usbphyc_port0 {
phy-supply = <&vdd_usb>;
};
&usbphyc_port1 {
phy-supply = <&vdd_usb>;
};

6
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
View File

@ -141,7 +141,7 @@
max-speed = <1000>;
phy-handle = <&phy0>;
mdio0 {
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
@ -508,7 +508,7 @@
sai2a_port: port {
sai2a_endpoint: endpoint {
remote-endpoint = <&cs42l51_tx_endpoint>;
format = "i2s";
dai-format = "i2s";
mclk-fs = <256>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <32>;
@ -526,7 +526,7 @@
sai2b_port: port {
sai2b_endpoint: endpoint {
remote-endpoint = <&cs42l51_rx_endpoint>;
format = "i2s";
dai-format = "i2s";
mclk-fs = <256>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <32>;