mmc: sdhci: Disable ADMA on some O2Micro SD/MMC parts.
This patch disables the broken ADMA on selected O2Micro devices. Signed-off-by: Jennifer Li <Jennifer.li@o2micro.com> Reviewed-by: Chris Ball <cjb@laptop.org> Signed-off-by: Chris Ball <cjb@laptop.org>
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@ -176,6 +176,74 @@ static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc_sdio = {
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.quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
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};
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/* O2Micro extra registers */
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#define O2_SD_LOCK_WP 0xD3
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#define O2_SD_MULTI_VCC3V 0xEE
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#define O2_SD_CLKREQ 0xEC
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#define O2_SD_CAPS 0xE0
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#define O2_SD_ADMA1 0xE2
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#define O2_SD_ADMA2 0xE7
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#define O2_SD_INF_MOD 0xF1
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static int o2_probe(struct sdhci_pci_chip *chip)
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{
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int ret;
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u8 scratch;
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switch (chip->pdev->device) {
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case PCI_DEVICE_ID_O2_8220:
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case PCI_DEVICE_ID_O2_8221:
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case PCI_DEVICE_ID_O2_8320:
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case PCI_DEVICE_ID_O2_8321:
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/* This extra setup is required due to broken ADMA. */
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ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
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if (ret)
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return ret;
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scratch &= 0x7f;
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pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
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/* Set Multi 3 to VCC3V# */
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pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08);
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/* Disable CLK_REQ# support after media DET */
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ret = pci_read_config_byte(chip->pdev, O2_SD_CLKREQ, &scratch);
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if (ret)
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return ret;
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scratch |= 0x20;
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pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch);
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/* Choose capabilities, enable SDMA. We have to write 0x01
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* to the capabilities register first to unlock it.
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*/
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ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch);
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if (ret)
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return ret;
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scratch |= 0x01;
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pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch);
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pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73);
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/* Disable ADMA1/2 */
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pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39);
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pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08);
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/* Disable the infinite transfer mode */
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ret = pci_read_config_byte(chip->pdev, O2_SD_INF_MOD, &scratch);
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if (ret)
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return ret;
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scratch |= 0x08;
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pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch);
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/* Lock WP */
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ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
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if (ret)
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return ret;
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scratch |= 0x80;
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pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
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}
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return 0;
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}
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static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
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{
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u8 scratch;
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@ -339,6 +407,10 @@ static int jmicron_resume(struct sdhci_pci_chip *chip)
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return 0;
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}
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static const struct sdhci_pci_fixes sdhci_o2 = {
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.probe = o2_probe,
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};
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static const struct sdhci_pci_fixes sdhci_jmicron = {
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.probe = jmicron_probe,
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@ -589,6 +661,46 @@ static const struct pci_device_id pci_ids[] __devinitdata = {
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.driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
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},
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{
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.vendor = PCI_VENDOR_ID_O2,
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.device = PCI_DEVICE_ID_O2_8120,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = (kernel_ulong_t)&sdhci_o2,
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},
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{
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.vendor = PCI_VENDOR_ID_O2,
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.device = PCI_DEVICE_ID_O2_8220,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = (kernel_ulong_t)&sdhci_o2,
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},
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{
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.vendor = PCI_VENDOR_ID_O2,
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.device = PCI_DEVICE_ID_O2_8221,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = (kernel_ulong_t)&sdhci_o2,
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},
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{
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.vendor = PCI_VENDOR_ID_O2,
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.device = PCI_DEVICE_ID_O2_8320,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = (kernel_ulong_t)&sdhci_o2,
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},
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{
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.vendor = PCI_VENDOR_ID_O2,
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.device = PCI_DEVICE_ID_O2_8321,
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.subvendor = PCI_ANY_ID,
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.subdevice = PCI_ANY_ID,
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.driver_data = (kernel_ulong_t)&sdhci_o2,
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},
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{ /* Generic SD host controller */
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PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
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},
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@ -1650,6 +1650,11 @@
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#define PCI_DEVICE_ID_O2_6836 0x6836
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#define PCI_DEVICE_ID_O2_6812 0x6872
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#define PCI_DEVICE_ID_O2_6933 0x6933
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#define PCI_DEVICE_ID_O2_8120 0x8120
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#define PCI_DEVICE_ID_O2_8220 0x8220
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#define PCI_DEVICE_ID_O2_8221 0x8221
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#define PCI_DEVICE_ID_O2_8320 0x8320
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#define PCI_DEVICE_ID_O2_8321 0x8321
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#define PCI_VENDOR_ID_3DFX 0x121a
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#define PCI_DEVICE_ID_3DFX_VOODOO 0x0001
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