ASoC: sh: rz-ssi: Add SSI DMAC support
Add SSI DMAC support to RZ/G2L SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20210813091156.10700-4-biju.das.jz@bp.renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
bed0b1c1e8
commit
26ac471c53
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@ -7,6 +7,7 @@
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//
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//
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#include <linux/clk.h>
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#include <linux/clk.h>
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#include <linux/dmaengine.h>
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#include <linux/io.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/of_device.h>
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@ -86,6 +87,7 @@ struct rz_ssi_stream {
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struct rz_ssi_priv *priv;
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struct rz_ssi_priv *priv;
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struct snd_pcm_substream *substream;
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struct snd_pcm_substream *substream;
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int fifo_sample_size; /* sample capacity of SSI FIFO */
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int fifo_sample_size; /* sample capacity of SSI FIFO */
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int dma_buffer_pos; /* The address for the next DMA descriptor */
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int period_counter; /* for keeping track of periods transferred */
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int period_counter; /* for keeping track of periods transferred */
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int sample_width;
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int sample_width;
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int buffer_pos; /* current frame position in the buffer */
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int buffer_pos; /* current frame position in the buffer */
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@ -94,6 +96,8 @@ struct rz_ssi_stream {
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int uerr_num;
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int uerr_num;
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int oerr_num;
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int oerr_num;
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struct dma_chan *dma_ch;
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int (*transfer)(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm);
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int (*transfer)(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm);
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};
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};
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@ -105,6 +109,7 @@ struct rz_ssi_priv {
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struct clk *sfr_clk;
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struct clk *sfr_clk;
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struct clk *clk;
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struct clk *clk;
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phys_addr_t phys;
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int irq_int;
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int irq_int;
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int irq_tx;
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int irq_tx;
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int irq_rx;
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int irq_rx;
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@ -128,8 +133,11 @@ struct rz_ssi_priv {
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bool lrckp_fsync_fall; /* LR clock polarity (SSICR.LRCKP) */
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bool lrckp_fsync_fall; /* LR clock polarity (SSICR.LRCKP) */
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bool bckp_rise; /* Bit clock polarity (SSICR.BCKP) */
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bool bckp_rise; /* Bit clock polarity (SSICR.BCKP) */
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bool dma_rt;
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};
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};
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static void rz_ssi_dma_complete(void *data);
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static void rz_ssi_reg_writel(struct rz_ssi_priv *priv, uint reg, u32 data)
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static void rz_ssi_reg_writel(struct rz_ssi_priv *priv, uint reg, u32 data)
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{
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{
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writel(data, (priv->base + reg));
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writel(data, (priv->base + reg));
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@ -175,6 +183,11 @@ rz_ssi_stream_get(struct rz_ssi_priv *ssi, struct snd_pcm_substream *substream)
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return stream;
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return stream;
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}
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}
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static inline bool rz_ssi_is_dma_enabled(struct rz_ssi_priv *ssi)
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{
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return (ssi->playback.dma_ch || ssi->capture.dma_ch);
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}
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static int rz_ssi_stream_is_valid(struct rz_ssi_priv *ssi,
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static int rz_ssi_stream_is_valid(struct rz_ssi_priv *ssi,
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struct rz_ssi_stream *strm)
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struct rz_ssi_stream *strm)
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{
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{
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@ -196,6 +209,7 @@ static int rz_ssi_stream_init(struct rz_ssi_priv *ssi,
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strm->substream = substream;
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strm->substream = substream;
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strm->sample_width = samples_to_bytes(runtime, 1);
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strm->sample_width = samples_to_bytes(runtime, 1);
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strm->dma_buffer_pos = 0;
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strm->period_counter = 0;
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strm->period_counter = 0;
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strm->buffer_pos = 0;
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strm->buffer_pos = 0;
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@ -297,9 +311,12 @@ static int rz_ssi_start(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm)
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ssifcr = rz_ssi_reg_readl(ssi, SSIFCR) & ~0xF;
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ssifcr = rz_ssi_reg_readl(ssi, SSIFCR) & ~0xF;
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/* FIFO interrupt thresholds */
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/* FIFO interrupt thresholds */
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rz_ssi_reg_writel(ssi, SSISCR,
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if (rz_ssi_is_dma_enabled(ssi))
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SSISCR_TDES(strm->fifo_sample_size / 2 - 1) |
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rz_ssi_reg_writel(ssi, SSISCR, 0);
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SSISCR_RDFS(0));
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else
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rz_ssi_reg_writel(ssi, SSISCR,
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SSISCR_TDES(strm->fifo_sample_size / 2 - 1) |
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SSISCR_RDFS(0));
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/* enable IRQ */
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/* enable IRQ */
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if (is_play) {
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if (is_play) {
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@ -334,6 +351,10 @@ static int rz_ssi_stop(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm)
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/* Disable TX/RX */
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/* Disable TX/RX */
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rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TEN | SSICR_REN, 0);
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rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TEN | SSICR_REN, 0);
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/* Cancel all remaining DMA transactions */
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if (rz_ssi_is_dma_enabled(ssi))
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dmaengine_terminate_async(strm->dma_ch);
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/* Disable irqs */
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/* Disable irqs */
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rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TUIEN | SSICR_TOIEN |
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rz_ssi_reg_mask_setl(ssi, SSICR, SSICR_TUIEN | SSICR_TOIEN |
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SSICR_RUIEN | SSICR_ROIEN, 0);
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SSICR_RUIEN | SSICR_ROIEN, 0);
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@ -549,12 +570,143 @@ static irqreturn_t rz_ssi_interrupt(int irq, void *data)
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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static int rz_ssi_dma_slave_config(struct rz_ssi_priv *ssi,
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struct dma_chan *dma_ch, bool is_play)
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{
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struct dma_slave_config cfg;
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memset(&cfg, 0, sizeof(cfg));
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cfg.direction = is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
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cfg.dst_addr = ssi->phys + SSIFTDR;
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cfg.src_addr = ssi->phys + SSIFRDR;
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cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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return dmaengine_slave_config(dma_ch, &cfg);
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}
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static int rz_ssi_dma_transfer(struct rz_ssi_priv *ssi,
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struct rz_ssi_stream *strm)
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{
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struct snd_pcm_substream *substream = strm->substream;
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struct dma_async_tx_descriptor *desc;
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struct snd_pcm_runtime *runtime;
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enum dma_transfer_direction dir;
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u32 dma_paddr, dma_size;
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int amount;
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if (!rz_ssi_stream_is_valid(ssi, strm))
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return -EINVAL;
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runtime = substream->runtime;
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if (runtime->status->state == SNDRV_PCM_STATE_DRAINING)
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/*
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* Stream is ending, so do not queue up any more DMA
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* transfers otherwise we play partial sound clips
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* because we can't shut off the DMA quick enough.
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*/
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return 0;
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dir = rz_ssi_stream_is_play(ssi, substream) ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
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/* Always transfer 1 period */
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amount = runtime->period_size;
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/* DMA physical address and size */
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dma_paddr = runtime->dma_addr + frames_to_bytes(runtime,
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strm->dma_buffer_pos);
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dma_size = frames_to_bytes(runtime, amount);
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desc = dmaengine_prep_slave_single(strm->dma_ch, dma_paddr, dma_size,
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dir,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!desc) {
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dev_err(ssi->dev, "dmaengine_prep_slave_single() fail\n");
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return -ENOMEM;
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}
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desc->callback = rz_ssi_dma_complete;
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desc->callback_param = strm;
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if (dmaengine_submit(desc) < 0) {
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dev_err(ssi->dev, "dmaengine_submit() fail\n");
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return -EIO;
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}
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/* Update DMA pointer */
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strm->dma_buffer_pos += amount;
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if (strm->dma_buffer_pos >= runtime->buffer_size)
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strm->dma_buffer_pos = 0;
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/* Start DMA */
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dma_async_issue_pending(strm->dma_ch);
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return 0;
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}
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static void rz_ssi_dma_complete(void *data)
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{
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struct rz_ssi_stream *strm = (struct rz_ssi_stream *)data;
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if (!strm->running || !strm->substream || !strm->substream->runtime)
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return;
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/* Note that next DMA transaction has probably already started */
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rz_ssi_pointer_update(strm, strm->substream->runtime->period_size);
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/* Queue up another DMA transaction */
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rz_ssi_dma_transfer(strm->priv, strm);
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}
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static void rz_ssi_release_dma_channels(struct rz_ssi_priv *ssi)
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{
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if (ssi->playback.dma_ch) {
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dma_release_channel(ssi->playback.dma_ch);
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ssi->playback.dma_ch = NULL;
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if (ssi->dma_rt)
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ssi->dma_rt = false;
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}
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if (ssi->capture.dma_ch) {
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dma_release_channel(ssi->capture.dma_ch);
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ssi->capture.dma_ch = NULL;
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}
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}
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static int rz_ssi_dma_request(struct rz_ssi_priv *ssi, struct device *dev)
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{
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ssi->playback.dma_ch = dma_request_chan(dev, "tx");
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ssi->capture.dma_ch = dma_request_chan(dev, "rx");
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if (!ssi->playback.dma_ch && !ssi->capture.dma_ch) {
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ssi->playback.dma_ch = dma_request_chan(dev, "rt");
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if (!ssi->playback.dma_ch)
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goto no_dma;
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ssi->dma_rt = true;
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}
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if (ssi->playback.dma_ch &&
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(rz_ssi_dma_slave_config(ssi, ssi->playback.dma_ch, true) < 0))
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goto no_dma;
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if (ssi->capture.dma_ch &&
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(rz_ssi_dma_slave_config(ssi, ssi->capture.dma_ch, false) < 0))
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goto no_dma;
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return 0;
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no_dma:
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rz_ssi_release_dma_channels(ssi);
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return -ENODEV;
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}
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static int rz_ssi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
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static int rz_ssi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *dai)
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struct snd_soc_dai *dai)
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{
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{
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struct rz_ssi_priv *ssi = snd_soc_dai_get_drvdata(dai);
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struct rz_ssi_priv *ssi = snd_soc_dai_get_drvdata(dai);
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struct rz_ssi_stream *strm = rz_ssi_stream_get(ssi, substream);
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struct rz_ssi_stream *strm = rz_ssi_stream_get(ssi, substream);
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int ret = 0;
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int ret = 0, i, num_transfer = 1;
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switch (cmd) {
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_START:
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@ -567,9 +719,29 @@ static int rz_ssi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
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if (ret)
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if (ret)
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goto done;
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goto done;
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ret = strm->transfer(ssi, strm);
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if (ssi->dma_rt) {
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if (ret)
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bool is_playback;
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goto done;
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is_playback = rz_ssi_stream_is_play(ssi, substream);
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ret = rz_ssi_dma_slave_config(ssi, ssi->playback.dma_ch,
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is_playback);
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/* Fallback to pio */
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if (ret < 0) {
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ssi->playback.transfer = rz_ssi_pio_send;
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ssi->capture.transfer = rz_ssi_pio_recv;
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rz_ssi_release_dma_channels(ssi);
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}
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}
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/* For DMA, queue up multiple DMA descriptors */
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if (rz_ssi_is_dma_enabled(ssi))
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num_transfer = 4;
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for (i = 0; i < num_transfer; i++) {
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ret = strm->transfer(ssi, strm);
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if (ret)
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goto done;
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}
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ret = rz_ssi_start(ssi, strm);
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ret = rz_ssi_start(ssi, strm);
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break;
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break;
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@ -737,6 +909,7 @@ static int rz_ssi_probe(struct platform_device *pdev)
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{
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{
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struct rz_ssi_priv *ssi;
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struct rz_ssi_priv *ssi;
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struct clk *audio_clk;
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struct clk *audio_clk;
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struct resource *res;
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int ret;
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int ret;
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ssi = devm_kzalloc(&pdev->dev, sizeof(*ssi), GFP_KERNEL);
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ssi = devm_kzalloc(&pdev->dev, sizeof(*ssi), GFP_KERNEL);
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@ -745,10 +918,11 @@ static int rz_ssi_probe(struct platform_device *pdev)
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ssi->pdev = pdev;
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ssi->pdev = pdev;
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ssi->dev = &pdev->dev;
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ssi->dev = &pdev->dev;
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ssi->base = devm_platform_ioremap_resource(pdev, 0);
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ssi->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
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if (IS_ERR(ssi->base))
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if (IS_ERR(ssi->base))
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return PTR_ERR(ssi->base);
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return PTR_ERR(ssi->base);
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ssi->phys = res->start;
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ssi->clk = devm_clk_get(&pdev->dev, "ssi");
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ssi->clk = devm_clk_get(&pdev->dev, "ssi");
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if (IS_ERR(ssi->clk))
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if (IS_ERR(ssi->clk))
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return PTR_ERR(ssi->clk);
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return PTR_ERR(ssi->clk);
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@ -775,8 +949,18 @@ static int rz_ssi_probe(struct platform_device *pdev)
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ssi->audio_mck = ssi->audio_clk_1 ? ssi->audio_clk_1 : ssi->audio_clk_2;
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ssi->audio_mck = ssi->audio_clk_1 ? ssi->audio_clk_1 : ssi->audio_clk_2;
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ssi->playback.transfer = rz_ssi_pio_send;
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/* Detect DMA support */
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ssi->capture.transfer = rz_ssi_pio_recv;
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ret = rz_ssi_dma_request(ssi, &pdev->dev);
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if (ret < 0) {
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dev_warn(&pdev->dev, "DMA not available, using PIO\n");
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ssi->playback.transfer = rz_ssi_pio_send;
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ssi->capture.transfer = rz_ssi_pio_recv;
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} else {
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dev_info(&pdev->dev, "DMA enabled");
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ssi->playback.transfer = rz_ssi_dma_transfer;
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ssi->capture.transfer = rz_ssi_dma_transfer;
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}
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ssi->playback.priv = ssi;
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ssi->playback.priv = ssi;
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ssi->capture.priv = ssi;
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ssi->capture.priv = ssi;
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||||||
|
|
||||||
|
@ -792,28 +976,32 @@ static int rz_ssi_probe(struct platform_device *pdev)
|
||||||
return dev_err_probe(&pdev->dev, ret,
|
return dev_err_probe(&pdev->dev, ret,
|
||||||
"irq request error (int_req)\n");
|
"irq request error (int_req)\n");
|
||||||
|
|
||||||
/* Tx and Rx interrupts (pio only) */
|
if (!rz_ssi_is_dma_enabled(ssi)) {
|
||||||
ssi->irq_tx = platform_get_irq_byname(pdev, "dma_tx");
|
/* Tx and Rx interrupts (pio only) */
|
||||||
if (ssi->irq_tx < 0)
|
ssi->irq_tx = platform_get_irq_byname(pdev, "dma_tx");
|
||||||
return dev_err_probe(&pdev->dev, -ENODEV,
|
if (ssi->irq_tx < 0)
|
||||||
"Unable to get SSI dma_tx IRQ\n");
|
return dev_err_probe(&pdev->dev, -ENODEV,
|
||||||
|
"Unable to get SSI dma_tx IRQ\n");
|
||||||
|
|
||||||
ret = devm_request_irq(&pdev->dev, ssi->irq_tx, &rz_ssi_interrupt, 0,
|
ret = devm_request_irq(&pdev->dev, ssi->irq_tx,
|
||||||
dev_name(&pdev->dev), ssi);
|
&rz_ssi_interrupt, 0,
|
||||||
if (ret < 0)
|
dev_name(&pdev->dev), ssi);
|
||||||
return dev_err_probe(&pdev->dev, ret,
|
if (ret < 0)
|
||||||
"irq request error (dma_tx)\n");
|
return dev_err_probe(&pdev->dev, ret,
|
||||||
|
"irq request error (dma_tx)\n");
|
||||||
|
|
||||||
ssi->irq_rx = platform_get_irq_byname(pdev, "dma_rx");
|
ssi->irq_rx = platform_get_irq_byname(pdev, "dma_rx");
|
||||||
if (ssi->irq_rx < 0)
|
if (ssi->irq_rx < 0)
|
||||||
return dev_err_probe(&pdev->dev, -ENODEV,
|
return dev_err_probe(&pdev->dev, -ENODEV,
|
||||||
"Unable to get SSI dma_rx IRQ\n");
|
"Unable to get SSI dma_rx IRQ\n");
|
||||||
|
|
||||||
ret = devm_request_irq(&pdev->dev, ssi->irq_rx, &rz_ssi_interrupt, 0,
|
ret = devm_request_irq(&pdev->dev, ssi->irq_rx,
|
||||||
dev_name(&pdev->dev), ssi);
|
&rz_ssi_interrupt, 0,
|
||||||
if (ret < 0)
|
dev_name(&pdev->dev), ssi);
|
||||||
return dev_err_probe(&pdev->dev, ret,
|
if (ret < 0)
|
||||||
"irq request error (dma_rx)\n");
|
return dev_err_probe(&pdev->dev, ret,
|
||||||
|
"irq request error (dma_rx)\n");
|
||||||
|
}
|
||||||
|
|
||||||
ssi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
|
ssi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
|
||||||
if (IS_ERR(ssi->rstc))
|
if (IS_ERR(ssi->rstc))
|
||||||
|
@ -829,6 +1017,8 @@ static int rz_ssi_probe(struct platform_device *pdev)
|
||||||
rz_ssi_soc_dai,
|
rz_ssi_soc_dai,
|
||||||
ARRAY_SIZE(rz_ssi_soc_dai));
|
ARRAY_SIZE(rz_ssi_soc_dai));
|
||||||
if (ret < 0) {
|
if (ret < 0) {
|
||||||
|
rz_ssi_release_dma_channels(ssi);
|
||||||
|
|
||||||
pm_runtime_put(ssi->dev);
|
pm_runtime_put(ssi->dev);
|
||||||
pm_runtime_disable(ssi->dev);
|
pm_runtime_disable(ssi->dev);
|
||||||
reset_control_assert(ssi->rstc);
|
reset_control_assert(ssi->rstc);
|
||||||
|
@ -842,6 +1032,8 @@ static int rz_ssi_remove(struct platform_device *pdev)
|
||||||
{
|
{
|
||||||
struct rz_ssi_priv *ssi = dev_get_drvdata(&pdev->dev);
|
struct rz_ssi_priv *ssi = dev_get_drvdata(&pdev->dev);
|
||||||
|
|
||||||
|
rz_ssi_release_dma_channels(ssi);
|
||||||
|
|
||||||
pm_runtime_put(ssi->dev);
|
pm_runtime_put(ssi->dev);
|
||||||
pm_runtime_disable(ssi->dev);
|
pm_runtime_disable(ssi->dev);
|
||||||
reset_control_assert(ssi->rstc);
|
reset_control_assert(ssi->rstc);
|
||||||
|
|
Loading…
Reference in New Issue