i2c: tegra: fix alignment and spacing violations
Fix checkpatch.pl alignment and blank line check(s) in i2c-tegra.c Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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@ -295,7 +295,7 @@ static u32 dvc_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg)
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* to the I2C block inside the DVC block
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*/
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static unsigned long tegra_i2c_reg_addr(struct tegra_i2c_dev *i2c_dev,
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unsigned long reg)
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unsigned long reg)
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{
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if (i2c_dev->is_dvc)
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reg += (reg >= I2C_TX_FIFO) ? 0x10 : 0x40;
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@ -303,7 +303,7 @@ static unsigned long tegra_i2c_reg_addr(struct tegra_i2c_dev *i2c_dev,
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}
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static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val,
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unsigned long reg)
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unsigned long reg)
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{
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writel(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
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@ -318,13 +318,13 @@ static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg)
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}
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static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data,
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unsigned long reg, int len)
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unsigned long reg, int len)
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{
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writesl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len);
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}
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static void i2c_readsl(struct tegra_i2c_dev *i2c_dev, void *data,
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unsigned long reg, int len)
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unsigned long reg, int len)
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{
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readsl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len);
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}
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@ -669,10 +669,11 @@ static int tegra_i2c_wait_for_config_load(struct tegra_i2c_dev *i2c_dev)
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i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD);
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if (in_interrupt())
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err = readl_poll_timeout_atomic(addr, val, val == 0,
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1000, I2C_CONFIG_LOAD_TIMEOUT);
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1000,
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I2C_CONFIG_LOAD_TIMEOUT);
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else
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err = readl_poll_timeout(addr, val, val == 0,
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1000, I2C_CONFIG_LOAD_TIMEOUT);
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err = readl_poll_timeout(addr, val, val == 0, 1000,
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I2C_CONFIG_LOAD_TIMEOUT);
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if (err) {
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dev_warn(i2c_dev->dev,
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@ -1013,7 +1014,8 @@ static int tegra_i2c_issue_bus_clear(struct i2c_adapter *adap)
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}
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static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
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struct i2c_msg *msg, enum msg_end_type end_state)
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struct i2c_msg *msg,
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enum msg_end_type end_state)
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{
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u32 packet_header;
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u32 int_mask;
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@ -1150,9 +1152,8 @@ unlock:
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if (err)
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return err;
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time_left = wait_for_completion_timeout(
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&i2c_dev->dma_complete,
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msecs_to_jiffies(xfer_time));
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time_left = wait_for_completion_timeout(&i2c_dev->dma_complete,
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msecs_to_jiffies(xfer_time));
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if (time_left == 0) {
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dev_err(i2c_dev->dev, "DMA transfer timeout\n");
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dmaengine_terminate_sync(i2c_dev->msg_read ?
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@ -1214,7 +1215,7 @@ unlock:
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}
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static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
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int num)
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int num)
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{
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struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
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int i;
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@ -1260,14 +1261,15 @@ static void tegra_i2c_parse_dt(struct tegra_i2c_dev *i2c_dev)
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{
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struct device_node *np = i2c_dev->dev->of_node;
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int ret;
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bool multi_mode;
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ret = of_property_read_u32(np, "clock-frequency",
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&i2c_dev->bus_clk_rate);
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&i2c_dev->bus_clk_rate);
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if (ret)
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i2c_dev->bus_clk_rate = 100000; /* default clock rate */
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i2c_dev->is_multimaster_mode = of_property_read_bool(np,
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"multi-master");
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multi_mode = of_property_read_bool(np, "multi-master");
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i2c_dev->is_multimaster_mode = multi_mode;
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}
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static const struct i2c_algorithm tegra_i2c_algo = {
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@ -1611,7 +1613,7 @@ static int tegra_i2c_probe(struct platform_device *pdev)
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}
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ret = devm_request_irq(&pdev->dev, i2c_dev->irq,
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tegra_i2c_isr, 0, dev_name(&pdev->dev), i2c_dev);
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tegra_i2c_isr, 0, dev_name(&pdev->dev), i2c_dev);
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if (ret) {
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dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq);
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goto release_dma;
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@ -1680,6 +1682,7 @@ static const struct dev_pm_ops tegra_i2c_pm = {
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SET_RUNTIME_PM_OPS(tegra_i2c_runtime_suspend, tegra_i2c_runtime_resume,
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NULL)
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};
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#define TEGRA_I2C_PM (&tegra_i2c_pm)
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#else
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#define TEGRA_I2C_PM NULL
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