drm/msm/dpu: move SSPP debugfs support from plane to SSPP code
We are preparing to change DPU plane implementation. Move SSPP debugfs code from dpu_plane.c to dpu_hw_sspp.c, where it belongs. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Link: https://lore.kernel.org/r/20211201222633.2476780-9-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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@ -8,6 +8,8 @@
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#include "dpu_hw_sspp.h"
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#include "dpu_kms.h"
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#include <drm/drm_file.h>
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#define DPU_FETCH_CONFIG_RESET_VALUE 0x00000087
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/* DPU_SSPP_SRC */
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@ -692,6 +694,71 @@ static void _setup_layer_ops(struct dpu_hw_pipe *c,
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c->ops.setup_cdp = dpu_hw_sspp_setup_cdp;
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}
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#ifdef CONFIG_DEBUG_FS
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int _dpu_hw_sspp_init_debugfs(struct dpu_hw_pipe *hw_pipe, struct dpu_kms *kms, struct dentry *entry)
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{
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const struct dpu_sspp_cfg *cfg = hw_pipe->cap;
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const struct dpu_sspp_sub_blks *sblk = cfg->sblk;
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struct dentry *debugfs_root;
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char sspp_name[32];
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snprintf(sspp_name, sizeof(sspp_name), "%d", hw_pipe->idx);
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/* create overall sub-directory for the pipe */
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debugfs_root =
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debugfs_create_dir(sspp_name, entry);
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/* don't error check these */
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debugfs_create_xul("features", 0600,
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debugfs_root, (unsigned long *)&hw_pipe->cap->features);
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/* add register dump support */
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dpu_debugfs_create_regset32("src_blk", 0400,
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debugfs_root,
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sblk->src_blk.base + cfg->base,
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sblk->src_blk.len,
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kms);
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if (cfg->features & BIT(DPU_SSPP_SCALER_QSEED3) ||
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cfg->features & BIT(DPU_SSPP_SCALER_QSEED3LITE) ||
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cfg->features & BIT(DPU_SSPP_SCALER_QSEED2) ||
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cfg->features & BIT(DPU_SSPP_SCALER_QSEED4))
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dpu_debugfs_create_regset32("scaler_blk", 0400,
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debugfs_root,
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sblk->scaler_blk.base + cfg->base,
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sblk->scaler_blk.len,
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kms);
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if (cfg->features & BIT(DPU_SSPP_CSC) ||
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cfg->features & BIT(DPU_SSPP_CSC_10BIT))
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dpu_debugfs_create_regset32("csc_blk", 0400,
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debugfs_root,
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sblk->csc_blk.base + cfg->base,
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sblk->csc_blk.len,
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kms);
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debugfs_create_u32("xin_id",
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0400,
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debugfs_root,
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(u32 *) &cfg->xin_id);
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debugfs_create_u32("clk_ctrl",
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0400,
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debugfs_root,
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(u32 *) &cfg->clk_ctrl);
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debugfs_create_x32("creq_vblank",
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0600,
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debugfs_root,
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(u32 *) &sblk->creq_vblank);
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debugfs_create_x32("danger_vblank",
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0600,
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debugfs_root,
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(u32 *) &sblk->danger_vblank);
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return 0;
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}
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#endif
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static const struct dpu_sspp_cfg *_sspp_offset(enum dpu_sspp sspp,
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void __iomem *addr,
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struct dpu_mdss_cfg *catalog,
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@ -387,6 +387,7 @@ struct dpu_hw_pipe {
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struct dpu_hw_sspp_ops ops;
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};
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struct dpu_kms;
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/**
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* dpu_hw_sspp_init - initializes the sspp hw driver object.
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* Should be called once before accessing every pipe.
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@ -406,5 +407,8 @@ struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx,
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*/
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void dpu_hw_sspp_destroy(struct dpu_hw_pipe *ctx);
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void dpu_debugfs_sspp_init(struct dpu_kms *dpu_kms, struct dentry *debugfs_root);
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int _dpu_hw_sspp_init_debugfs(struct dpu_hw_pipe *hw_pipe, struct dpu_kms *kms, struct dentry *entry);
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#endif /*_DPU_HW_SSPP_H */
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@ -281,6 +281,7 @@ static int dpu_kms_debugfs_init(struct msm_kms *kms, struct drm_minor *minor)
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dpu_debugfs_danger_init(dpu_kms, entry);
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dpu_debugfs_vbif_init(dpu_kms, entry);
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dpu_debugfs_core_irq_init(dpu_kms, entry);
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dpu_debugfs_sspp_init(dpu_kms, entry);
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for (i = 0; i < ARRAY_SIZE(priv->dp); i++) {
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if (priv->dp[i])
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@ -13,7 +13,6 @@
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_uapi.h>
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#include <drm/drm_damage_helper.h>
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#include <drm/drm_file.h>
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#include <drm/drm_gem_atomic_helper.h>
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#include "msm_drv.h"
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@ -1388,79 +1387,23 @@ void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable)
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pm_runtime_put_sync(&dpu_kms->pdev->dev);
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}
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static int _dpu_plane_init_debugfs(struct drm_plane *plane)
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/* SSPP live inside dpu_plane private data only. Enumerate them here. */
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void dpu_debugfs_sspp_init(struct dpu_kms *dpu_kms, struct dentry *debugfs_root)
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{
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struct dpu_plane *pdpu = to_dpu_plane(plane);
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struct dpu_kms *kms = _dpu_plane_get_kms(plane);
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const struct dpu_sspp_cfg *cfg = pdpu->pipe_hw->cap;
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const struct dpu_sspp_sub_blks *sblk = cfg->sblk;
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struct dentry *debugfs_root;
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struct drm_plane *plane;
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struct dentry *entry = debugfs_create_dir("sspp", debugfs_root);
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/* create overall sub-directory for the pipe */
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debugfs_root =
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debugfs_create_dir(plane->name,
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plane->dev->primary->debugfs_root);
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if (IS_ERR(entry))
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return;
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/* don't error check these */
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debugfs_create_xul("features", 0600,
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debugfs_root, (unsigned long *)&pdpu->pipe_hw->cap->features);
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drm_for_each_plane(plane, dpu_kms->dev) {
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struct dpu_plane *pdpu = to_dpu_plane(plane);
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/* add register dump support */
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dpu_debugfs_create_regset32("src_blk", 0400,
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debugfs_root,
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sblk->src_blk.base + cfg->base,
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sblk->src_blk.len,
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kms);
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if (cfg->features & BIT(DPU_SSPP_SCALER_QSEED3) ||
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cfg->features & BIT(DPU_SSPP_SCALER_QSEED3LITE) ||
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cfg->features & BIT(DPU_SSPP_SCALER_QSEED2) ||
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cfg->features & BIT(DPU_SSPP_SCALER_QSEED4))
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dpu_debugfs_create_regset32("scaler_blk", 0400,
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debugfs_root,
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sblk->scaler_blk.base + cfg->base,
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sblk->scaler_blk.len,
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kms);
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if (cfg->features & BIT(DPU_SSPP_CSC) ||
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cfg->features & BIT(DPU_SSPP_CSC_10BIT))
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dpu_debugfs_create_regset32("csc_blk", 0400,
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debugfs_root,
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sblk->csc_blk.base + cfg->base,
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sblk->csc_blk.len,
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kms);
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debugfs_create_u32("xin_id",
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0400,
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debugfs_root,
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(u32 *) &cfg->xin_id);
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debugfs_create_u32("clk_ctrl",
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0400,
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debugfs_root,
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(u32 *) &cfg->clk_ctrl);
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debugfs_create_x32("creq_vblank",
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0600,
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debugfs_root,
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(u32 *) &sblk->creq_vblank);
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debugfs_create_x32("danger_vblank",
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0600,
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debugfs_root,
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(u32 *) &sblk->danger_vblank);
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return 0;
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}
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#else
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static int _dpu_plane_init_debugfs(struct drm_plane *plane)
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{
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return 0;
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_dpu_hw_sspp_init_debugfs(pdpu->pipe_hw, dpu_kms, entry);
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}
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}
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#endif
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static int dpu_plane_late_register(struct drm_plane *plane)
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{
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return _dpu_plane_init_debugfs(plane);
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}
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static bool dpu_plane_format_mod_supported(struct drm_plane *plane,
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uint32_t format, uint64_t modifier)
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{
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@ -1486,7 +1429,6 @@ static const struct drm_plane_funcs dpu_plane_funcs = {
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.atomic_duplicate_state = dpu_plane_duplicate_state,
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.atomic_destroy_state = dpu_plane_destroy_state,
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.atomic_print_state = dpu_plane_atomic_print_state,
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.late_register = dpu_plane_late_register,
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.format_mod_supported = dpu_plane_format_mod_supported,
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};
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