[ARM] Remove yucky ifdefs to print "id(wb)BRR" suffix on CPU name
The "id(wb)BRR" suffix reports which CPU debugging options were (or were not) selected at kernel build time. Rather than have every proc-*.S file implement this, report the control register value, from which this information can be deduced. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
parent
0a6047eef1
commit
264edb35ce
|
@ -315,9 +315,9 @@ static void __init setup_processor(void)
|
|||
cpu_cache = *list->cache;
|
||||
#endif
|
||||
|
||||
printk("CPU: %s [%08x] revision %d (ARMv%s)\n",
|
||||
printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08x\n",
|
||||
cpu_name, processor_id, (int)processor_id & 15,
|
||||
proc_arch[cpu_architecture()]);
|
||||
proc_arch[cpu_architecture()], cr_alignment);
|
||||
|
||||
sprintf(system_utsname.machine, "%s%c", list->arch_name, ENDIANNESS);
|
||||
sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
|
||||
|
|
|
@ -477,25 +477,7 @@ cpu_elf_name:
|
|||
|
||||
.type cpu_arm1020e_name, #object
|
||||
cpu_arm1020e_name:
|
||||
.ascii "ARM1020E"
|
||||
#ifndef CONFIG_CPU_ICACHE_DISABLE
|
||||
.ascii "i"
|
||||
#endif
|
||||
#ifndef CONFIG_CPU_DCACHE_DISABLE
|
||||
.ascii "d"
|
||||
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
|
||||
.ascii "(wt)"
|
||||
#else
|
||||
.ascii "(wb)"
|
||||
#endif
|
||||
#endif
|
||||
#ifndef CONFIG_CPU_BPREDICT_DISABLE
|
||||
.ascii "B"
|
||||
#endif
|
||||
#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
|
||||
.ascii "RR"
|
||||
#endif
|
||||
.ascii "\0"
|
||||
.asciz "ARM1020E"
|
||||
.size cpu_arm1020e_name, . - cpu_arm1020e_name
|
||||
|
||||
.align
|
||||
|
|
|
@ -460,25 +460,7 @@ cpu_elf_name:
|
|||
|
||||
.type cpu_arm1022_name, #object
|
||||
cpu_arm1022_name:
|
||||
.ascii "arm1022"
|
||||
#ifndef CONFIG_CPU_ICACHE_DISABLE
|
||||
.ascii "i"
|
||||
#endif
|
||||
#ifndef CONFIG_CPU_DCACHE_DISABLE
|
||||
.ascii "d"
|
||||
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
|
||||
.ascii "(wt)"
|
||||
#else
|
||||
.ascii "(wb)"
|
||||
#endif
|
||||
#endif
|
||||
#ifndef CONFIG_CPU_BPREDICT_DISABLE
|
||||
.ascii "B"
|
||||
#endif
|
||||
#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
|
||||
.ascii "RR"
|
||||
#endif
|
||||
.ascii "\0"
|
||||
.asciz "ARM1022"
|
||||
.size cpu_arm1022_name, . - cpu_arm1022_name
|
||||
|
||||
.align
|
||||
|
|
|
@ -456,25 +456,7 @@ cpu_elf_name:
|
|||
|
||||
.type cpu_arm1026_name, #object
|
||||
cpu_arm1026_name:
|
||||
.ascii "ARM1026EJ-S"
|
||||
#ifndef CONFIG_CPU_ICACHE_DISABLE
|
||||
.ascii "i"
|
||||
#endif
|
||||
#ifndef CONFIG_CPU_DCACHE_DISABLE
|
||||
.ascii "d"
|
||||
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
|
||||
.ascii "(wt)"
|
||||
#else
|
||||
.ascii "(wb)"
|
||||
#endif
|
||||
#endif
|
||||
#ifndef CONFIG_CPU_BPREDICT_DISABLE
|
||||
.ascii "B"
|
||||
#endif
|
||||
#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
|
||||
.ascii "RR"
|
||||
#endif
|
||||
.ascii "\0"
|
||||
.asciz "ARM1026EJ-S"
|
||||
.size cpu_arm1026_name, . - cpu_arm1026_name
|
||||
|
||||
.align
|
||||
|
|
|
@ -444,19 +444,7 @@ cpu_elf_name:
|
|||
|
||||
.type cpu_arm920_name, #object
|
||||
cpu_arm920_name:
|
||||
.ascii "ARM920T"
|
||||
#ifndef CONFIG_CPU_ICACHE_DISABLE
|
||||
.ascii "i"
|
||||
#endif
|
||||
#ifndef CONFIG_CPU_DCACHE_DISABLE
|
||||
.ascii "d"
|
||||
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
|
||||
.ascii "(wt)"
|
||||
#else
|
||||
.ascii "(wb)"
|
||||
#endif
|
||||
#endif
|
||||
.ascii "\0"
|
||||
.asciz "ARM920T"
|
||||
.size cpu_arm920_name, . - cpu_arm920_name
|
||||
|
||||
.align
|
||||
|
|
|
@ -448,19 +448,7 @@ cpu_elf_name:
|
|||
|
||||
.type cpu_arm922_name, #object
|
||||
cpu_arm922_name:
|
||||
.ascii "ARM922T"
|
||||
#ifndef CONFIG_CPU_ICACHE_DISABLE
|
||||
.ascii "i"
|
||||
#endif
|
||||
#ifndef CONFIG_CPU_DCACHE_DISABLE
|
||||
.ascii "d"
|
||||
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
|
||||
.ascii "(wt)"
|
||||
#else
|
||||
.ascii "(wb)"
|
||||
#endif
|
||||
#endif
|
||||
.ascii "\0"
|
||||
.asciz "ARM922T"
|
||||
.size cpu_arm922_name, . - cpu_arm922_name
|
||||
|
||||
.align
|
||||
|
|
|
@ -511,22 +511,7 @@ cpu_elf_name:
|
|||
|
||||
.type cpu_arm925_name, #object
|
||||
cpu_arm925_name:
|
||||
.ascii "ARM925T"
|
||||
#ifndef CONFIG_CPU_ICACHE_DISABLE
|
||||
.ascii "i"
|
||||
#endif
|
||||
#ifndef CONFIG_CPU_DCACHE_DISABLE
|
||||
.ascii "d"
|
||||
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
|
||||
.ascii "(wt)"
|
||||
#else
|
||||
.ascii "(wb)"
|
||||
#endif
|
||||
#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
|
||||
.ascii "RR"
|
||||
#endif
|
||||
#endif
|
||||
.ascii "\0"
|
||||
.asciz "ARM925T"
|
||||
.size cpu_arm925_name, . - cpu_arm925_name
|
||||
|
||||
.align
|
||||
|
|
|
@ -460,22 +460,7 @@ cpu_elf_name:
|
|||
|
||||
.type cpu_arm926_name, #object
|
||||
cpu_arm926_name:
|
||||
.ascii "ARM926EJ-S"
|
||||
#ifndef CONFIG_CPU_ICACHE_DISABLE
|
||||
.ascii "i"
|
||||
#endif
|
||||
#ifndef CONFIG_CPU_DCACHE_DISABLE
|
||||
.ascii "d"
|
||||
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
|
||||
.ascii "(wt)"
|
||||
#else
|
||||
.ascii "(wb)"
|
||||
#endif
|
||||
#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
|
||||
.ascii "RR"
|
||||
#endif
|
||||
#endif
|
||||
.ascii "\0"
|
||||
.asciz "ARM926EJ-S"
|
||||
.size cpu_arm926_name, . - cpu_arm926_name
|
||||
|
||||
.align
|
||||
|
|
Loading…
Reference in New Issue