Versatile DTS changes for the v5.9 kernel cycle, essentially
just a single patch fixing up the node names for schema. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl8VmEkACgkQQRCzN7AZ XXO7uhAAsfr1+/YaaPZHxjFa29DUoEiXy7cPW8MC0OkQbmh+nBJY+evvYyrW8p80 FxduQIUqeGBh6HetswPGF3/4ZkEkorVwoR+8iJD9rERh6skEDlbnCzbWU9Jdeu0V 09EXcU3XBNLu+S0xVoCBFz8DKoFvv3oi7e/5+3kJyUKXlQo3o5g05/5C9ihzu/B7 g8nACYVr5Wa41Y+GgLxlNRPfJy5jMERvqcvy5vpbk7xyzONps53u0nahtAF5/BHz XHomPlyuJsZWX+VnW7xxPhh66sng8YD4kFZV110lGYFzCXizMYPG1L0vGIO4tX/P EPNkgwCdNmHvXAqqC5yRJ8UGNFl/GVf0kgeFy/hJlgCigbue2C0rzGYtkDCxQktp mCmRnJQ8za8Dz9FkYbxZZ46TQzxXulIle2AqOnj0gh/sgUYVUvGpIcuyDO15W4v5 rPfEYx6hiPra5r3ITUDZt1kQKKAV5CPw1Q/0+kmVCbeehZNz2kftFNnErBGPdVZe jZk9eU6Sh/rt+WbginVEOj2SNzdSFp77G9ciPeMU5GsJrdXK/yHTppPPtAjI01JO SUyA0bICsJv0c8m+lqoDh6m1AePx9RWQUzfUOWxKwWF1qAXnd63NFye88fi8Da3x WeqNvjptFnRJYHzxtPMvjjcs6CJWFb9qHtTsNTW3ut0GzhEkhlU= =xBG2 -----END PGP SIGNATURE----- Merge tag 'versatile-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/dt Versatile DTS changes for the v5.9 kernel cycle, essentially just a single patch fixing up the node names for schema. * tag 'versatile-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator: ARM: dts: arm-realview: Align L2 cache-controller nodename with dtschema Link: https://lore.kernel.org/r/CACRpkdbkM9ZmuG2FnBmO7upcJfnqq2oSLDCFDXC5b3K+dtps9Q@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
262fc784d8
|
@ -59,7 +59,7 @@
|
|||
interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
L2: l2-cache {
|
||||
L2: cache-controller {
|
||||
compatible = "arm,l220-cache";
|
||||
reg = <0x1f002000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
|
|
|
@ -323,7 +323,7 @@
|
|||
<0x10120000 0x100>;
|
||||
};
|
||||
|
||||
L2: l2-cache {
|
||||
L2: cache-controller {
|
||||
compatible = "arm,l220-cache";
|
||||
reg = <0x10110000 0x1000>;
|
||||
interrupt-parent = <&intc_dc1176>;
|
||||
|
|
|
@ -92,7 +92,7 @@
|
|||
<0x1f000100 0x100>;
|
||||
};
|
||||
|
||||
L2: l2-cache {
|
||||
L2: cache-controller {
|
||||
compatible = "arm,l220-cache";
|
||||
reg = <0x1f002000 0x1000>;
|
||||
interrupt-parent = <&intc_tc11mp>;
|
||||
|
|
|
@ -60,7 +60,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
L2: l2-cache {
|
||||
L2: cache-controller {
|
||||
compatible = "arm,pl310-cache";
|
||||
reg = <0x1f002000 0x1000>;
|
||||
cache-unified;
|
||||
|
|
Loading…
Reference in New Issue