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drm/nouveau/mc: switch to device pri macros 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2015-08-20 14:54:09 +10:00
parent 99336ed363
commit 25e3a463fc
6 changed files with 28 additions and 21 deletions
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20
drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.c
View File

@ -36,7 +36,8 @@ nvkm_mc_unk260(struct nvkm_mc *mc, u32 data)
static inline u32
nvkm_mc_intr_mask(struct nvkm_mc *mc)
{
u32 intr = nv_rd32(mc, 0x000100);
struct nvkm_device *device = mc->subdev.device;
u32 intr = nvkm_rd32(device, 0x000100);
if (intr == 0xffffffff) /* likely fallen off the bus */
intr = 0x00000000;
return intr;
@ -46,13 +47,14 @@ static irqreturn_t
nvkm_mc_intr(int irq, void *arg)
{
struct nvkm_mc *mc = arg;
struct nvkm_device *device = mc->subdev.device;
const struct nvkm_mc_oclass *oclass = (void *)nv_object(mc)->oclass;
const struct nvkm_mc_intr *map = oclass->intr;
struct nvkm_subdev *unit;
u32 intr;
nv_wr32(mc, 0x000140, 0x00000000);
nv_rd32(mc, 0x000140);
nvkm_wr32(device, 0x000140, 0x00000000);
nvkm_rd32(device, 0x000140);
intr = nvkm_mc_intr_mask(mc);
if (mc->use_msi)
oclass->msi_rearm(mc);
@ -73,7 +75,7 @@ nvkm_mc_intr(int irq, void *arg)
nv_error(mc, "unknown intr 0x%08x\n", stat);
}
nv_wr32(mc, 0x000140, 0x00000001);
nvkm_wr32(device, 0x000140, 0x00000001);
return intr ? IRQ_HANDLED : IRQ_NONE;
}
@ -81,7 +83,8 @@ int
_nvkm_mc_fini(struct nvkm_object *object, bool suspend)
{
struct nvkm_mc *mc = (void *)object;
nv_wr32(mc, 0x000140, 0x00000000);
struct nvkm_device *device = mc->subdev.device;
nvkm_wr32(device, 0x000140, 0x00000000);
return nvkm_subdev_fini(&mc->subdev, suspend);
}
@ -89,18 +92,19 @@ int
_nvkm_mc_init(struct nvkm_object *object)
{
struct nvkm_mc *mc = (void *)object;
struct nvkm_device *device = mc->subdev.device;
int ret = nvkm_subdev_init(&mc->subdev);
if (ret)
return ret;
nv_wr32(mc, 0x000140, 0x00000001);
nvkm_wr32(device, 0x000140, 0x00000001);
return 0;
}
void
_nvkm_mc_dtor(struct nvkm_object *object)
{
struct nvkm_device *device = nv_device(object);
struct nvkm_mc *mc = (void *)object;
struct nvkm_device *device = mc->subdev.device;
free_irq(mc->irq, mc);
if (mc->use_msi)
pci_disable_msi(device->pdev);
@ -112,7 +116,7 @@ nvkm_mc_create_(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *bclass, int length, void **pobject)
{
const struct nvkm_mc_oclass *oclass = (void *)bclass;
struct nvkm_device *device = nv_device(parent);
struct nvkm_device *device = (void *)parent;
struct nvkm_mc *mc;
int ret;

4
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c
View File

@ -51,13 +51,13 @@ gf100_mc_intr[] = {
static void
gf100_mc_msi_rearm(struct nvkm_mc *mc)
{
nv_wr32(mc, 0x088704, 0x00000000);
nvkm_wr32(mc->subdev.device, 0x088704, 0x00000000);
}
void
gf100_mc_unk260(struct nvkm_mc *mc, u32 data)
{
nv_wr32(mc, 0x000260, data);
nvkm_wr32(mc->subdev.device, 0x000260, data);
}
struct nvkm_oclass *

5
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c
View File

@ -42,9 +42,10 @@ int
nv04_mc_init(struct nvkm_object *object)
{
struct nvkm_mc *mc = (void *)object;
struct nvkm_device *device = mc->subdev.device;
nv_wr32(mc, 0x000200, 0xffffffff); /* everything enabled */
nv_wr32(mc, 0x001850, 0x00000001); /* disable rom access */
nvkm_wr32(device, 0x000200, 0xffffffff); /* everything enabled */
nvkm_wr32(device, 0x001850, 0x00000001); /* disable rom access */
return nvkm_mc_init(mc);
}

2
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv40.c
View File

@ -26,7 +26,7 @@
void
nv40_mc_msi_rearm(struct nvkm_mc *mc)
{
nv_wr08(mc, 0x088068, 0xff);
nvkm_wr08(mc->subdev.device, 0x088068, 0xff);
}
struct nvkm_oclass *

13
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv44.c
View File

@ -27,14 +27,15 @@ int
nv44_mc_init(struct nvkm_object *object)
{
struct nvkm_mc *mc = (void *)object;
u32 tmp = nv_rd32(mc, 0x10020c);
struct nvkm_device *device = mc->subdev.device;
u32 tmp = nvkm_rd32(device, 0x10020c);
nv_wr32(mc, 0x000200, 0xffffffff); /* everything enabled */
nvkm_wr32(device, 0x000200, 0xffffffff); /* everything enabled */
nv_wr32(mc, 0x001700, tmp);
nv_wr32(mc, 0x001704, 0);
nv_wr32(mc, 0x001708, 0);
nv_wr32(mc, 0x00170c, tmp);
nvkm_wr32(device, 0x001700, tmp);
nvkm_wr32(device, 0x001704, 0);
nvkm_wr32(device, 0x001708, 0);
nvkm_wr32(device, 0x00170c, tmp);
return nvkm_mc_init(mc);
}

5
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.c
View File

@ -44,7 +44,7 @@ nv50_mc_intr[] = {
static void
nv50_mc_msi_rearm(struct nvkm_mc *mc)
{
struct nvkm_device *device = nv_device(mc);
struct nvkm_device *device = mc->subdev.device;
pci_write_config_byte(device->pdev, 0x68, 0xff);
}
@ -52,7 +52,8 @@ int
nv50_mc_init(struct nvkm_object *object)
{
struct nvkm_mc *mc = (void *)object;
nv_wr32(mc, 0x000200, 0xffffffff); /* everything on */
struct nvkm_device *device = mc->subdev.device;
nvkm_wr32(device, 0x000200, 0xffffffff); /* everything on */
return nvkm_mc_init(mc);
}