drm/amd/display: cache trace buffer size

[Why & How]
Cache the trace buffer size retrieved from DMUB FW in the driver

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Josip Pavic <josip.pavic@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Josip Pavic 2023-05-12 09:56:05 -04:00 committed by Alex Deucher
parent 5b466b28fa
commit 257e9891db
2 changed files with 3 additions and 0 deletions

View File

@ -428,6 +428,7 @@ struct dmub_srv {
enum dmub_asic asic;
void *user_ctx;
uint32_t fw_version;
uint32_t trace_buffer_size;
bool is_virtual;
struct dmub_fb scratch_mem_fb;
volatile const struct dmub_fw_state *fw_state;

View File

@ -427,6 +427,8 @@ dmub_srv_calc_region_info(struct dmub_srv *dmub,
dmub->fw_version = fw_info->fw_version;
}
dmub->trace_buffer_size = trace_buffer_size;
trace_buff->base = dmub_align(mail->top, 256);
trace_buff->top = trace_buff->base + dmub_align(trace_buffer_size, 64);