drm/amd/display: cache trace buffer size
[Why & How] Cache the trace buffer size retrieved from DMUB FW in the driver Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Josip Pavic <josip.pavic@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -428,6 +428,7 @@ struct dmub_srv {
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enum dmub_asic asic;
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void *user_ctx;
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uint32_t fw_version;
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uint32_t trace_buffer_size;
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bool is_virtual;
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struct dmub_fb scratch_mem_fb;
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volatile const struct dmub_fw_state *fw_state;
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@ -427,6 +427,8 @@ dmub_srv_calc_region_info(struct dmub_srv *dmub,
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dmub->fw_version = fw_info->fw_version;
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}
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dmub->trace_buffer_size = trace_buffer_size;
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trace_buff->base = dmub_align(mail->top, 256);
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trace_buff->top = trace_buff->base + dmub_align(trace_buffer_size, 64);
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