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drm/panel: simple: AUO P320HVN03 uses SPWG data ordering 

The patch adding support for the AUO P320HVN03 panel was written against a
preliminary datasheet, which specified JEIDA data ordering. Testing with
real hardware has shown that the actually used data ordering is SPWG.

Fixes: 70c0d5b783 (drm/panel: simple: add support for AUO P320HVN03)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180411152741.22483-1-l.stach@pengutronix.de
This commit is contained in:
Lucas Stach 2018-04-11 17:27:41 +02:00 committed by Thierry Reding
parent da50bd4258
commit 2554f154b4
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/panel/panel-simple.c
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@ -686,7 +686,7 @@ static const struct panel_desc auo_p320hvn03 = {
.enable = 450,
.unprepare = 500,
},
.bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA,
.bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
};
static const struct drm_display_mode auo_t215hvn01_mode = {