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RDMA/hns: Avoid enabling RQ inline on UD 

RQ inline is not supported on UD/GSI QP, it should be disabled in QPC.

Link: https://lore.kernel.org/r/1617354454-47840-2-git-send-email-liweihang@huawei.com
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
This commit is contained in:
Weihang Li 2021-04-02 17:07:26 +08:00 committed by Jason Gunthorpe
parent 8d78e7b478
commit 24f3f1cd51
2 changed files with 8 additions and 3 deletions
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7
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
View File

@ -4111,8 +4111,11 @@ static void modify_qp_reset_to_init(struct ib_qp *ibqp,
((u32)hr_qp->rdb.dma) >> 1);
context->rq_db_record_addr = cpu_to_le32(hr_qp->rdb.dma >> 32);
roce_set_bit(context->byte_76_srqn_op_en, V2_QPC_BYTE_76_RQIE_S,
(hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RQ_INLINE) ? 1 : 0);
if (ibqp->qp_type != IB_QPT_UD && ibqp->qp_type != IB_QPT_GSI)
roce_set_bit(context->byte_76_srqn_op_en,
V2_QPC_BYTE_76_RQIE_S,
!!(hr_dev->caps.flags &
HNS_ROCE_CAP_FLAG_RQ_INLINE));
roce_set_field(context->byte_80_rnr_rx_cqn, V2_QPC_BYTE_80_RX_CQN_M,
V2_QPC_BYTE_80_RX_CQN_S, get_cqn(ibqp->recv_cq));

4
drivers/infiniband/hw/hns/hns_roce_qp.c
View File

@ -487,7 +487,9 @@ static int set_rq_size(struct hns_roce_dev *hr_dev, struct ib_qp_cap *cap,
hr_qp->rq.max_gs);
hr_qp->rq.wqe_cnt = cnt;
if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RQ_INLINE)
if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RQ_INLINE &&
hr_qp->ibqp.qp_type != IB_QPT_UD &&
hr_qp->ibqp.qp_type != IB_QPT_GSI)
hr_qp->rq_inl_buf.wqe_cnt = cnt;
else
hr_qp->rq_inl_buf.wqe_cnt = 0;