i2c: i801: Centralize configuring non-block commands in i801_simple_transaction
Currently configuring command register settings is distributed over multiple functions. At first centralize this for non-block commands in i801_simple_transaction(). Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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@ -738,35 +738,47 @@ static void i801_set_hstadd(struct i801_priv *priv, u8 addr, char read_write)
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/* Single value transaction function */
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static int i801_simple_transaction(struct i801_priv *priv, union i2c_smbus_data *data,
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char read_write, int command)
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u8 addr, u8 hstcmd, char read_write, int command)
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{
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int xact, ret;
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switch (command) {
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case I2C_SMBUS_QUICK:
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i801_set_hstadd(priv, addr, read_write);
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xact = I801_QUICK;
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break;
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case I2C_SMBUS_BYTE:
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i801_set_hstadd(priv, addr, read_write);
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if (read_write == I2C_SMBUS_WRITE)
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outb_p(hstcmd, SMBHSTCMD(priv));
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xact = I801_BYTE;
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break;
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case I2C_SMBUS_BYTE_DATA:
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i801_set_hstadd(priv, addr, read_write);
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if (read_write == I2C_SMBUS_WRITE)
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outb_p(data->byte, SMBHSTDAT0(priv));
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outb_p(hstcmd, SMBHSTCMD(priv));
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xact = I801_BYTE_DATA;
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break;
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case I2C_SMBUS_WORD_DATA:
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i801_set_hstadd(priv, addr, read_write);
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if (read_write == I2C_SMBUS_WRITE) {
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outb_p(data->word & 0xff, SMBHSTDAT0(priv));
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outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
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}
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outb_p(hstcmd, SMBHSTCMD(priv));
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xact = I801_WORD_DATA;
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break;
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case I2C_SMBUS_PROC_CALL:
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i801_set_hstadd(priv, addr, I2C_SMBUS_WRITE);
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outb_p(data->word & 0xff, SMBHSTDAT0(priv));
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outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
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outb_p(hstcmd, SMBHSTCMD(priv));
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read_write = I2C_SMBUS_READ;
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xact = I801_PROC_CALL;
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break;
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default:
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pci_err(priv->pci_dev, "Unsupported transaction %d\n", command);
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return -EOPNOTSUPP;
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}
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@ -857,25 +869,10 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
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switch (size) {
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case I2C_SMBUS_QUICK:
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i801_set_hstadd(priv, addr, read_write);
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break;
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case I2C_SMBUS_BYTE:
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i801_set_hstadd(priv, addr, read_write);
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if (read_write == I2C_SMBUS_WRITE)
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outb_p(command, SMBHSTCMD(priv));
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break;
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case I2C_SMBUS_BYTE_DATA:
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i801_set_hstadd(priv, addr, read_write);
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outb_p(command, SMBHSTCMD(priv));
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break;
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case I2C_SMBUS_WORD_DATA:
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i801_set_hstadd(priv, addr, read_write);
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outb_p(command, SMBHSTCMD(priv));
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break;
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case I2C_SMBUS_PROC_CALL:
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i801_set_hstadd(priv, addr, I2C_SMBUS_WRITE);
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outb_p(command, SMBHSTCMD(priv));
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read_write = I2C_SMBUS_READ;
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break;
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case I2C_SMBUS_BLOCK_DATA:
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i801_set_hstadd(priv, addr, read_write);
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@ -922,7 +919,7 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
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if (block)
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ret = i801_block_transaction(priv, data, read_write, size);
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else
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ret = i801_simple_transaction(priv, data, read_write, size);
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ret = i801_simple_transaction(priv, data, addr, command, read_write, size);
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/* Some BIOSes don't like it when PEC is enabled at reboot or resume
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* time, so we forcibly disable it after every transaction.
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