Merge remote-tracking branches 'spi/topic/armada', 'spi/topic/ath79', 'spi/topic/bcm-qspi' and 'spi/topic/bcm53xx' into spi-next
This commit is contained in:
Mark Brown
commit
244a60c28d
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@ -162,7 +162,8 @@ config SPI_BCM63XX_HSSPI
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config SPI_BCM_QSPI
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tristate "Broadcom BSPI and MSPI controller support"
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depends on ARCH_BRCMSTB || ARCH_BCM || ARCH_BCM_IPROC || COMPILE_TEST
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depends on ARCH_BRCMSTB || ARCH_BCM || ARCH_BCM_IPROC || \
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BMIPS_GENERIC || COMPILE_TEST
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default ARCH_BCM_IPROC
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help
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Enables support for the Broadcom SPI flash and MSPI controller.
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@ -170,12 +170,12 @@ static int a3700_spi_pin_mode_set(struct a3700_spi *a3700_spi,
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val &= ~(A3700_SPI_DATA_PIN0 | A3700_SPI_DATA_PIN1);
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switch (pin_mode) {
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case 1:
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case SPI_NBITS_SINGLE:
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break;
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case 2:
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case SPI_NBITS_DUAL:
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val |= A3700_SPI_DATA_PIN0;
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break;
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case 4:
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case SPI_NBITS_QUAD:
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val |= A3700_SPI_DATA_PIN1;
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break;
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default:
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@ -340,7 +340,6 @@ static irqreturn_t a3700_spi_interrupt(int irq, void *dev_id)
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spireg_write(a3700_spi, A3700_SPI_INT_STAT_REG, cause);
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/* Wake up the transfer */
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if (a3700_spi->wait_mask & cause)
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complete(&a3700_spi->done);
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return IRQ_HANDLED;
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@ -562,6 +561,7 @@ static int a3700_spi_fifo_read(struct a3700_spi *a3700_spi)
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val = spireg_read(a3700_spi, A3700_SPI_DATA_IN_REG);
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if (a3700_spi->buf_len >= 4) {
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u32 data = le32_to_cpu(val);
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memcpy(a3700_spi->rx_buf, &data, 4);
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a3700_spi->buf_len -= 4;
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@ -901,7 +901,6 @@ static int a3700_spi_remove(struct platform_device *pdev)
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struct a3700_spi *spi = spi_master_get_devdata(master);
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clk_unprepare(spi->clk);
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spi_master_put(master);
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return 0;
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}
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@ -909,7 +908,6 @@ static int a3700_spi_remove(struct platform_device *pdev)
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static struct platform_driver a3700_spi_driver = {
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.driver = {
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.name = DRIVER_NAME,
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.owner = THIS_MODULE,
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.of_match_table = of_match_ptr(a3700_spi_dt_ids),
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},
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.probe = a3700_spi_probe,
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@ -78,14 +78,16 @@ static void ath79_spi_chipselect(struct spi_device *spi, int is_active)
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ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
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}
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if (spi->chip_select) {
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if (gpio_is_valid(spi->cs_gpio)) {
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/* SPI is normally active-low */
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gpio_set_value(spi->cs_gpio, cs_high);
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gpio_set_value_cansleep(spi->cs_gpio, cs_high);
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} else {
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u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select);
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if (cs_high)
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sp->ioc_base |= AR71XX_SPI_IOC_CS0;
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sp->ioc_base |= cs_bit;
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else
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sp->ioc_base &= ~AR71XX_SPI_IOC_CS0;
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sp->ioc_base &= ~cs_bit;
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ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
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}
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@ -118,11 +120,8 @@ static int ath79_spi_setup_cs(struct spi_device *spi)
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struct ath79_spi *sp = ath79_spidev_to_sp(spi);
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int status;
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if (spi->chip_select && !gpio_is_valid(spi->cs_gpio))
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return -EINVAL;
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status = 0;
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if (spi->chip_select) {
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if (gpio_is_valid(spi->cs_gpio)) {
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unsigned long flags;
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flags = GPIOF_DIR_OUT;
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@ -134,10 +133,12 @@ static int ath79_spi_setup_cs(struct spi_device *spi)
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status = gpio_request_one(spi->cs_gpio, flags,
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dev_name(&spi->dev));
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} else {
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u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select);
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if (spi->mode & SPI_CS_HIGH)
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sp->ioc_base &= ~AR71XX_SPI_IOC_CS0;
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sp->ioc_base &= ~cs_bit;
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else
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sp->ioc_base |= AR71XX_SPI_IOC_CS0;
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sp->ioc_base |= cs_bit;
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ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
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}
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@ -147,7 +148,7 @@ static int ath79_spi_setup_cs(struct spi_device *spi)
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static void ath79_spi_cleanup_cs(struct spi_device *spi)
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{
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if (spi->chip_select) {
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if (gpio_is_valid(spi->cs_gpio)) {
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gpio_free(spi->cs_gpio);
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}
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}
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@ -89,7 +89,7 @@
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#define BSPI_BPP_MODE_SELECT_MASK BIT(8)
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#define BSPI_BPP_ADDR_SELECT_MASK BIT(16)
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#define BSPI_READ_LENGTH 256
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#define BSPI_READ_LENGTH 512
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/* MSPI register offsets */
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#define MSPI_SPCR0_LSB 0x000
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@ -192,9 +192,11 @@ struct bcm_qspi_dev_id {
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void *dev;
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};
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struct qspi_trans {
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struct spi_transfer *trans;
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int byte;
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bool mspi_last_trans;
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};
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struct bcm_qspi {
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@ -616,6 +618,16 @@ static int bcm_qspi_setup(struct spi_device *spi)
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return 0;
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}
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static bool bcm_qspi_mspi_transfer_is_last(struct bcm_qspi *qspi,
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struct qspi_trans *qt)
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{
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if (qt->mspi_last_trans &&
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spi_transfer_is_last(qspi->master, qt->trans))
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return true;
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else
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return false;
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}
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static int update_qspi_trans_byte_count(struct bcm_qspi *qspi,
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struct qspi_trans *qt, int flags)
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{
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@ -629,7 +641,6 @@ static int update_qspi_trans_byte_count(struct bcm_qspi *qspi,
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if (qt->byte >= qt->trans->len) {
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/* we're at the end of the spi_transfer */
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/* in TX mode, need to pause for a delay or CS change */
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if (qt->trans->delay_usecs &&
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(flags & TRANS_STATUS_BREAK_DELAY))
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@ -641,7 +652,7 @@ static int update_qspi_trans_byte_count(struct bcm_qspi *qspi,
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goto done;
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dev_dbg(&qspi->pdev->dev, "advance msg exit\n");
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if (spi_transfer_is_last(qspi->master, qt->trans))
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if (bcm_qspi_mspi_transfer_is_last(qspi, qt))
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ret = TRANS_STATUS_BREAK_EOM;
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else
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ret = TRANS_STATUS_BREAK_NO_BYTES;
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@ -813,7 +824,7 @@ static int bcm_qspi_bspi_flash_read(struct spi_device *spi,
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struct spi_flash_read_message *msg)
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{
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struct bcm_qspi *qspi = spi_master_get_devdata(spi->master);
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u32 addr = 0, len, len_words;
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u32 addr = 0, len, rdlen, len_words;
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int ret = 0;
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unsigned long timeo = msecs_to_jiffies(100);
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struct bcm_qspi_soc_intc *soc_intc = qspi->soc_intc;
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@ -826,7 +837,7 @@ static int bcm_qspi_bspi_flash_read(struct spi_device *spi,
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bcm_qspi_write(qspi, MSPI, MSPI_WRITE_LOCK, 0);
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/*
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* when using flex mode mode we need to send
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* when using flex mode we need to send
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* the upper address byte to bspi
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*/
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if (bcm_qspi_bspi_ver_three(qspi) == false) {
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@ -840,27 +851,33 @@ static int bcm_qspi_bspi_flash_read(struct spi_device *spi,
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else
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addr = msg->from & 0x00ffffff;
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/* set BSPI RAF buffer max read length */
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len = msg->len;
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if (len > BSPI_READ_LENGTH)
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len = BSPI_READ_LENGTH;
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if (bcm_qspi_bspi_ver_three(qspi) == true)
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addr = (addr + 0xc00000) & 0xffffff;
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/*
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* read into the entire buffer by breaking the reads
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* into RAF buffer read lengths
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*/
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len = msg->len;
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qspi->bspi_rf_msg_idx = 0;
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do {
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if (len > BSPI_READ_LENGTH)
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rdlen = BSPI_READ_LENGTH;
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else
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rdlen = len;
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reinit_completion(&qspi->bspi_done);
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bcm_qspi_enable_bspi(qspi);
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len_words = (len + 3) >> 2;
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len_words = (rdlen + 3) >> 2;
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qspi->bspi_rf_msg = msg;
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qspi->bspi_rf_msg_status = 0;
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qspi->bspi_rf_msg_idx = 0;
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qspi->bspi_rf_msg_len = len;
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dev_dbg(&qspi->pdev->dev, "bspi xfr addr 0x%x len 0x%x", addr, len);
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qspi->bspi_rf_msg_len = rdlen;
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dev_dbg(&qspi->pdev->dev,
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"bspi xfr addr 0x%x len 0x%x", addr, rdlen);
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bcm_qspi_write(qspi, BSPI, BSPI_RAF_START_ADDR, addr);
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bcm_qspi_write(qspi, BSPI, BSPI_RAF_NUM_WORDS, len_words);
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bcm_qspi_write(qspi, BSPI, BSPI_RAF_WATERMARK, 0);
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if (qspi->soc_intc) {
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/*
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* clear soc MSPI and BSPI interrupts and enable
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@ -872,16 +889,89 @@ static int bcm_qspi_bspi_flash_read(struct spi_device *spi,
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/* Must flush previous writes before starting BSPI operation */
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mb();
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bcm_qspi_bspi_lr_start(qspi);
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if (!wait_for_completion_timeout(&qspi->bspi_done, timeo)) {
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dev_err(&qspi->pdev->dev, "timeout waiting for BSPI\n");
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ret = -ETIMEDOUT;
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} else {
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/* set the return length for the caller */
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msg->retlen = len;
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break;
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}
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/* set msg return length */
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msg->retlen += rdlen;
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addr += rdlen;
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len -= rdlen;
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} while (len);
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return ret;
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}
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static int bcm_qspi_transfer_one(struct spi_master *master,
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struct spi_device *spi,
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struct spi_transfer *trans)
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{
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struct bcm_qspi *qspi = spi_master_get_devdata(master);
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int slots;
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unsigned long timeo = msecs_to_jiffies(100);
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bcm_qspi_chip_select(qspi, spi->chip_select);
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qspi->trans_pos.trans = trans;
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qspi->trans_pos.byte = 0;
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while (qspi->trans_pos.byte < trans->len) {
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reinit_completion(&qspi->mspi_done);
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slots = write_to_hw(qspi, spi);
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if (!wait_for_completion_timeout(&qspi->mspi_done, timeo)) {
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dev_err(&qspi->pdev->dev, "timeout waiting for MSPI\n");
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return -ETIMEDOUT;
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}
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read_from_hw(qspi, slots);
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}
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return 0;
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}
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static int bcm_qspi_mspi_flash_read(struct spi_device *spi,
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struct spi_flash_read_message *msg)
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{
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struct bcm_qspi *qspi = spi_master_get_devdata(spi->master);
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struct spi_transfer t[2];
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u8 cmd[6];
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int ret;
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memset(cmd, 0, sizeof(cmd));
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memset(t, 0, sizeof(t));
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/* tx */
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/* opcode is in cmd[0] */
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cmd[0] = msg->read_opcode;
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cmd[1] = msg->from >> (msg->addr_width * 8 - 8);
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cmd[2] = msg->from >> (msg->addr_width * 8 - 16);
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cmd[3] = msg->from >> (msg->addr_width * 8 - 24);
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cmd[4] = msg->from >> (msg->addr_width * 8 - 32);
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t[0].tx_buf = cmd;
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t[0].len = msg->addr_width + msg->dummy_bytes + 1;
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t[0].bits_per_word = spi->bits_per_word;
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t[0].tx_nbits = msg->opcode_nbits;
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/* lets mspi know that this is not last transfer */
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qspi->trans_pos.mspi_last_trans = false;
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ret = bcm_qspi_transfer_one(spi->master, spi, &t[0]);
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/* rx */
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qspi->trans_pos.mspi_last_trans = true;
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if (!ret) {
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/* rx */
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t[1].rx_buf = msg->buf;
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t[1].len = msg->len;
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t[1].rx_nbits = msg->data_nbits;
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t[1].bits_per_word = spi->bits_per_word;
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ret = bcm_qspi_transfer_one(spi->master, spi, &t[1]);
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}
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if (!ret)
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msg->retlen = msg->len;
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return ret;
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}
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@ -918,8 +1008,7 @@ static int bcm_qspi_flash_read(struct spi_device *spi,
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mspi_read = true;
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if (mspi_read)
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/* this will make the m25p80 read to fallback to mspi read */
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return -EAGAIN;
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return bcm_qspi_mspi_flash_read(spi, msg);
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|
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io_width = msg->data_nbits ? msg->data_nbits : SPI_NBITS_SINGLE;
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addrlen = msg->addr_width;
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@ -931,33 +1020,6 @@ static int bcm_qspi_flash_read(struct spi_device *spi,
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return ret;
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}
|
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static int bcm_qspi_transfer_one(struct spi_master *master,
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struct spi_device *spi,
|
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struct spi_transfer *trans)
|
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{
|
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struct bcm_qspi *qspi = spi_master_get_devdata(master);
|
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int slots;
|
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unsigned long timeo = msecs_to_jiffies(100);
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|
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bcm_qspi_chip_select(qspi, spi->chip_select);
|
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qspi->trans_pos.trans = trans;
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qspi->trans_pos.byte = 0;
|
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|
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while (qspi->trans_pos.byte < trans->len) {
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reinit_completion(&qspi->mspi_done);
|
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|
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slots = write_to_hw(qspi, spi);
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if (!wait_for_completion_timeout(&qspi->mspi_done, timeo)) {
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dev_err(&qspi->pdev->dev, "timeout waiting for MSPI\n");
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return -ETIMEDOUT;
|
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}
|
||||
|
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read_from_hw(qspi, slots);
|
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}
|
||||
|
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return 0;
|
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}
|
||||
|
||||
static void bcm_qspi_cleanup(struct spi_device *spi)
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{
|
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struct bcm_qspi_parms *xp = spi_get_ctldata(spi);
|
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|
|
@ -1187,6 +1249,7 @@ int bcm_qspi_probe(struct platform_device *pdev,
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qspi->pdev = pdev;
|
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qspi->trans_pos.trans = NULL;
|
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qspi->trans_pos.byte = 0;
|
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qspi->trans_pos.mspi_last_trans = true;
|
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qspi->master = master;
|
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|
||||
master->bus_num = -1;
|
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|
|
@ -1345,7 +1408,6 @@ int bcm_qspi_remove(struct platform_device *pdev)
|
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{
|
||||
struct bcm_qspi *qspi = platform_get_drvdata(pdev);
|
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|
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platform_set_drvdata(pdev, NULL);
|
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bcm_qspi_hw_uninit(qspi);
|
||||
clk_disable_unprepare(qspi->clk);
|
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kfree(qspi->dev_ids);
|
||||
|
|
|
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|
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@ -1,3 +1,11 @@
|
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/*
|
||||
* Copyright (C) 2014-2016 Rafał Miłecki <rafal@milecki.pl>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
||||
|
||||
#include <linux/kernel.h>
|
||||
|
|
@ -275,10 +283,6 @@ static int bcm53xxspi_flash_read(struct spi_device *spi,
|
|||
* BCMA
|
||||
**************************************************/
|
||||
|
||||
static struct spi_board_info bcm53xx_info = {
|
||||
.modalias = "bcm53xxspiflash",
|
||||
};
|
||||
|
||||
static const struct bcma_device_id bcm53xxspi_bcma_tbl[] = {
|
||||
BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_QSPI, BCMA_ANY_REV, BCMA_ANY_CLASS),
|
||||
{},
|
||||
|
|
@ -311,6 +315,7 @@ static int bcm53xxspi_bcma_probe(struct bcma_device *core)
|
|||
b53spi->bspi = true;
|
||||
bcm53xxspi_disable_bspi(b53spi);
|
||||
|
||||
master->dev.of_node = dev->of_node;
|
||||
master->transfer_one = bcm53xxspi_transfer_one;
|
||||
if (b53spi->mmio_base)
|
||||
master->spi_flash_read = bcm53xxspi_flash_read;
|
||||
|
|
@ -324,9 +329,6 @@ static int bcm53xxspi_bcma_probe(struct bcma_device *core)
|
|||
return err;
|
||||
}
|
||||
|
||||
/* Broadcom SoCs (at least with the CC rev 42) use SPI for flash only */
|
||||
spi_new_device(master, &bcm53xx_info);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -361,4 +363,4 @@ module_exit(bcm53xxspi_module_exit);
|
|||
|
||||
MODULE_DESCRIPTION("Broadcom BCM53xx SPI Controller driver");
|
||||
MODULE_AUTHOR("Rafał Miłecki <zajec5@gmail.com>");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
|
|||
Loading…
Reference in New Issue