wifi: rtw89: 8852c: enlarge polling timeout of RX DCK
The range of calibration time of RX DCK is quite wide from ~40us to ~1300us by experiments, and probability is about 0.1% for the cases larger than 1000us. Though it can retry calibration and get positive result, it will spend more time. Therefore, enlarge it to avoid warning and duplicate calibration. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220908051257.25353-4-pkshih@realtek.com
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@ -3366,6 +3366,7 @@
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#define RR_DCK_FINE BIT(1)
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#define RR_DCK_LV BIT(0)
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#define RR_DCK1 0x93
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#define RR_DCK1_DONE BIT(5)
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#define RR_DCK1_CLR GENMASK(3, 0)
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#define RR_DCK1_SEL BIT(3)
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#define RR_DCK2 0x94
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@ -1546,7 +1546,8 @@ static void _rx_dck_toggle(struct rtw89_dev *rtwdev, u8 path)
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rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x1);
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ret = read_poll_timeout_atomic(rtw89_read_rf, val, val,
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2, 1000, false, rtwdev, path, 0x93, BIT(5));
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2, 2000, false, rtwdev, path,
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RR_DCK1, RR_DCK1_DONE);
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if (ret)
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rtw89_warn(rtwdev, "[RX_DCK] S%d RXDCK timeout\n", path);
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else
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