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drm/i915: go back to switch for VLV mem freq detection v2 

Both the docs and the existing code were wrong.  So fix both and use a
switch statement like we do elsewhere to make things simple & clear.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Jesse Barnes 2013-05-02 10:48:08 -07:00 committed by Daniel Vetter
parent 177006a10b
commit 2445966ee8
1 changed files with 12 additions and 1 deletions
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13
drivers/gpu/drm/i915/intel_pm.c
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@ -2902,7 +2902,18 @@ static void valleyview_enable_rps(struct drm_device *dev)
GEN7_RC_CTL_TO_MODE);
valleyview_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &val);
dev_priv->mem_freq = 800 + (266 * (val >> 6) & 3);
switch ((val >> 6) & 3) {
case 0:
case 1:
dev_priv->mem_freq = 800;
break;
case 2:
dev_priv->mem_freq = 1066;
break;
case 3:
dev_priv->mem_freq = 1333;
break;
}
DRM_DEBUG_DRIVER("DDR speed: %d MHz", dev_priv->mem_freq);
DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & 0x10 ? "yes" : "no");