arch/sh updates for 5.16
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQEcBAABAgAGBQJhkUvoAAoJELcQ+SIFb8HaQG8H/1pF/zhT+xYAK7dMOYfdyl9R UGgnNGR2kjPDhsAkMHIYWVopP2KFV4kA4TCe8UcEt4GPeWZgGjV8lIaHJa/kdUsH 5tyRYtC8ZtVhJMVJQ8jZYZcTwOqYFFGtCksPq6/j0dHE0Gf+nQStSXNZqi8/XxE9 c3jDg+l7PVwdl7LWFedPVXcflhD5JLrRhyA/17V0INWrqP/MboXGRyq/Yluksw7x C89ZXrgRE+5tN9icfRT4pl/XBpezWQkjuvsyHM9DWOjqICXfng8yeB5MZ/+R2uyF qbXRSGqICOFhRRV9m/L0kypCYYiaZ8bBiYvLeGNggmpUJVMosIDFpS7kiYQavuA= =dnw0 -----END PGP SIGNATURE----- Merge tag 'sh-for-5.16' of git://git.libc.org/linux-sh Pull arch/sh updates from Rich Felker. * tag 'sh-for-5.16' of git://git.libc.org/linux-sh: sh: pgtable-3level: Fix cast to pointer from integer of different size sh: fix READ/WRITE redefinition warnings sh: define __BIG_ENDIAN for math-emu sh: math-emu: drop unused functions sh: fix kconfig unmet dependency warning for FRAME_POINTER sh: Cleanup about SPARSE_IRQ sh: kdump: add some attribute to function maple: fix wrong return value of maple_bus_init(). sh: boot: avoid unneeded rebuilds under arch/sh/boot/compressed/ sh: boot: add intermediate vmlinux.bin* to targets instead of extra-y sh: boards: Fix the cacography in irq.c sh: check return code of request_irq sh: fix trivial misannotations
This commit is contained in:
commit
24318ae80d
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@ -56,7 +56,6 @@ config SUPERH
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select HAVE_STACKPROTECTOR
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select HAVE_SYSCALL_TRACEPOINTS
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select IRQ_FORCED_THREADING
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select MAY_HAVE_SPARSE_IRQ
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select MODULES_USE_ELF_RELA
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select NEED_SG_DMA_LENGTH
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select NO_DMA if !MMU && !DMA_COHERENT
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@ -54,6 +54,7 @@ config DUMP_CODE
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config DWARF_UNWINDER
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bool "Enable the DWARF unwinder for stacktraces"
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depends on DEBUG_KERNEL
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select FRAME_POINTER
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default n
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help
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@ -26,8 +26,8 @@ enum {
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PCI_INTD, /* PCI int D */
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ATA, /* ATA */
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FATA, /* CF */
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POWER, /* Power swtich */
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BUTTON, /* Button swtich */
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POWER, /* Power switch */
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BUTTON, /* Button switch */
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};
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/* Vectors for LANDISK */
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@ -27,8 +27,8 @@ suffix-$(CONFIG_KERNEL_XZ) := xz
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suffix-$(CONFIG_KERNEL_LZO) := lzo
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targets := zImage vmlinux.srec romImage uImage uImage.srec uImage.gz \
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uImage.bz2 uImage.lzma uImage.xz uImage.lzo uImage.bin
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extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma \
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uImage.bz2 uImage.lzma uImage.xz uImage.lzo uImage.bin \
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vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma \
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vmlinux.bin.xz vmlinux.bin.lzo
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subdir- := compressed romimage
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@ -1,7 +1,2 @@
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# SPDX-License-Identifier: GPL-2.0-only
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ashiftrt.S
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ashldi3.c
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ashlsi3.S
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ashrsi3.S
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lshrsi3.S
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vmlinux.bin.*
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@ -5,12 +5,18 @@
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# create a compressed vmlinux image from the original vmlinux
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#
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targets := vmlinux vmlinux.bin vmlinux.bin.gz \
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vmlinux.bin.bz2 vmlinux.bin.lzma \
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vmlinux.bin.xz vmlinux.bin.lzo \
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head_32.o misc.o piggy.o
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OBJECTS := head_32.o misc.o cache.o piggy.o \
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ashiftrt.o ashldi3.o ashrsi3.o ashlsi3.o lshrsi3.o
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OBJECTS = $(obj)/head_32.o $(obj)/misc.o $(obj)/cache.o
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# These were previously generated files. When you are building the kernel
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# with O=, make sure to remove the stale files in the output tree. Otherwise,
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# the build system wrongly compiles the stale ones.
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ifdef building_out_of_srctree
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$(shell rm -f $(addprefix $(obj)/, ashiftrt.S ashldi3.c ashrsi3.S ashlsi3.S lshrsi3.S))
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endif
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targets := vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 \
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vmlinux.bin.lzma vmlinux.bin.xz vmlinux.bin.lzo $(OBJECTS)
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GCOV_PROFILE := n
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@ -33,21 +39,9 @@ ccflags-remove-$(CONFIG_MCOUNT) += -pg
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LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext $(IMAGE_OFFSET) -e startup \
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-T $(obj)/../../kernel/vmlinux.lds
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#
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# Pull in the necessary libgcc bits from the in-kernel implementation.
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#
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lib1funcs-y := ashiftrt.S ashldi3.c ashrsi3.S ashlsi3.S lshrsi3.S
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lib1funcs-obj := \
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$(addsuffix .o, $(basename $(addprefix $(obj)/, $(lib1funcs-y))))
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KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING
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lib1funcs-dir := $(srctree)/arch/$(SRCARCH)/lib
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KBUILD_CFLAGS += -I$(lib1funcs-dir) -DDISABLE_BRANCH_PROFILING
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$(addprefix $(obj)/,$(lib1funcs-y)): $(obj)/%: $(lib1funcs-dir)/% FORCE
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$(call cmd,shipped)
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$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(lib1funcs-obj) FORCE
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$(obj)/vmlinux: $(addprefix $(obj)/, $(OBJECTS)) FORCE
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$(call if_changed,ld)
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$(obj)/vmlinux.bin: vmlinux FORCE
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@ -0,0 +1,2 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include "../../lib/ashiftrt.S"
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@ -0,0 +1,2 @@
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// SPDX-License-Identifier: GPL-2.0-only
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#include "../../lib/ashldi3.c"
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@ -0,0 +1,2 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include "../../lib/ashlsi3.S"
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@ -0,0 +1,2 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include "../../lib/ashrsi3.S"
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@ -0,0 +1,2 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include "../../lib/lshrsi3.S"
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@ -84,7 +84,8 @@ static inline __sum16 csum_fold(__wsum sum)
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*/
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static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
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{
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unsigned int sum, __dummy0, __dummy1;
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__wsum sum;
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unsigned int __dummy0, __dummy1;
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__asm__ __volatile__(
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"mov.l @%1+, %0\n\t"
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@ -197,6 +198,6 @@ static inline __wsum csum_and_copy_to_user(const void *src,
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{
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if (!access_ok(dst, len))
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return 0;
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return csum_partial_copy_generic((__force const void *)src, dst, len);
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return csum_partial_copy_generic(src, (__force void *)dst, len);
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}
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#endif /* __ASM_SH_CHECKSUM_H */
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@ -5,17 +5,6 @@
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#include <linux/cpumask.h>
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#include <asm/machvec.h>
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/*
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* Only legacy non-sparseirq platforms have to set a reasonably sane
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* value here. sparseirq platforms allocate their irq_descs on the fly,
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* so will expand automatically based on the number of registered IRQs.
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*/
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#ifdef CONFIG_SPARSE_IRQ
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# define NR_IRQS 8
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#else
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# define NR_IRQS 512
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#endif
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/*
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* This is a special IRQ number for indicating that no IRQ has been
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* triggered and to simply ignore the IRQ dispatch. This is a special
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@ -13,6 +13,14 @@
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#ifndef _SFP_MACHINE_H
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#define _SFP_MACHINE_H
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#ifdef __BIG_ENDIAN__
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#define __BYTE_ORDER __BIG_ENDIAN
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#define __LITTLE_ENDIAN 0
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#else
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#define __BYTE_ORDER __LITTLE_ENDIAN
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#define __BIG_ENDIAN 0
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#endif
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#define _FP_W_TYPE_SIZE 32
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#define _FP_W_TYPE unsigned long
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#define _FP_WS_TYPE signed long
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@ -68,7 +68,7 @@ struct __large_struct { unsigned long buf[100]; };
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({ \
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long __gu_err = -EFAULT; \
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unsigned long __gu_val = 0; \
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const __typeof__(*(ptr)) *__gu_addr = (ptr); \
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const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
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if (likely(access_ok(__gu_addr, (size)))) \
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__get_user_size(__gu_val, __gu_addr, (size), __gu_err); \
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(x) = (__force __typeof__(*(ptr)))__gu_val; \
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@ -124,7 +124,7 @@ raw_copy_to_user(void __user *to, const void *from, unsigned long n)
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* Clear the area and return remaining number of bytes
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* (on failure. Usually it's 0.)
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*/
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__kernel_size_t __clear_user(void *addr, __kernel_size_t size);
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__kernel_size_t __clear_user(void __user *addr, __kernel_size_t size);
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#define clear_user(addr,n) \
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({ \
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@ -73,8 +73,9 @@ static void shx3_prepare_cpus(unsigned int max_cpus)
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BUILD_BUG_ON(SMP_MSG_NR >= 8);
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for (i = 0; i < SMP_MSG_NR; i++)
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request_irq(104 + i, ipi_interrupt_handler,
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IRQF_PERCPU, "IPI", (void *)(long)i);
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if (request_irq(104 + i, ipi_interrupt_handler,
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IRQF_PERCPU, "IPI", (void *)(long)i))
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pr_err("Failed to request irq %d\n", i);
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for (i = 0; i < max_cpus; i++)
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set_cpu_present(i, true);
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@ -26,7 +26,7 @@
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ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
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size_t csize, unsigned long offset, int userbuf)
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{
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void *vaddr;
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void __iomem *vaddr;
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if (!csize)
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return 0;
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@ -34,7 +34,7 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
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vaddr = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE);
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if (userbuf) {
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if (copy_to_user(buf, (vaddr + offset), csize)) {
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if (copy_to_user((void __user *)buf, (vaddr + offset), csize)) {
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iounmap(vaddr);
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return -EFAULT;
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}
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@ -490,7 +490,7 @@ asmlinkage void do_address_error(struct pt_regs *regs,
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inc_unaligned_user_access();
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oldfs = force_uaccess_begin();
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if (copy_from_user(&instruction, (insn_size_t *)(regs->pc & ~1),
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if (copy_from_user(&instruction, (insn_size_t __user *)(regs->pc & ~1),
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sizeof(instruction))) {
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force_uaccess_end(oldfs);
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goto uspace_segv;
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@ -614,7 +614,7 @@ asmlinkage void do_reserved_inst(void)
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unsigned short inst = 0;
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int err;
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get_user(inst, (unsigned short*)regs->pc);
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get_user(inst, (unsigned short __user *)regs->pc);
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err = do_fpu_inst(inst, regs);
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if (!err) {
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@ -699,9 +699,9 @@ asmlinkage void do_illegal_slot_inst(void)
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return;
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#ifdef CONFIG_SH_FPU_EMU
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get_user(inst, (unsigned short *)regs->pc + 1);
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get_user(inst, (unsigned short __user *)regs->pc + 1);
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if (!do_fpu_inst(inst, regs)) {
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get_user(inst, (unsigned short *)regs->pc);
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get_user(inst, (unsigned short __user *)regs->pc);
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if (!emulate_branch(inst, regs))
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return;
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/* fault in branch.*/
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|
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@ -51,8 +51,8 @@
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#define Rn (regs->regs[n])
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#define Rm (regs->regs[m])
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#define WRITE(d,a) ({if(put_user(d, (typeof (d)*)a)) return -EFAULT;})
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#define READ(d,a) ({if(get_user(d, (typeof (d)*)a)) return -EFAULT;})
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#define MWRITE(d,a) ({if(put_user(d, (typeof (d) __user *)a)) return -EFAULT;})
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#define MREAD(d,a) ({if(get_user(d, (typeof (d) __user *)a)) return -EFAULT;})
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#define PACK_S(r,f) FP_PACK_SP(&r,f)
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#define UNPACK_S(f,r) FP_UNPACK_SP(f,&r)
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@ -157,11 +157,11 @@ fmov_idx_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
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{
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if (FPSCR_SZ) {
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FMOV_EXT(n);
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READ(FRn, Rm + R0 + 4);
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MREAD(FRn, Rm + R0 + 4);
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n++;
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READ(FRn, Rm + R0);
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MREAD(FRn, Rm + R0);
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} else {
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READ(FRn, Rm + R0);
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MREAD(FRn, Rm + R0);
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}
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return 0;
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|
@ -173,11 +173,11 @@ fmov_mem_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
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{
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if (FPSCR_SZ) {
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FMOV_EXT(n);
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READ(FRn, Rm + 4);
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MREAD(FRn, Rm + 4);
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n++;
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READ(FRn, Rm);
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MREAD(FRn, Rm);
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} else {
|
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READ(FRn, Rm);
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MREAD(FRn, Rm);
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}
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return 0;
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|
@ -189,12 +189,12 @@ fmov_inc_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
|
|||
{
|
||||
if (FPSCR_SZ) {
|
||||
FMOV_EXT(n);
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READ(FRn, Rm + 4);
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MREAD(FRn, Rm + 4);
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n++;
|
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READ(FRn, Rm);
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MREAD(FRn, Rm);
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Rm += 8;
|
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} else {
|
||||
READ(FRn, Rm);
|
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MREAD(FRn, Rm);
|
||||
Rm += 4;
|
||||
}
|
||||
|
||||
|
@ -207,11 +207,11 @@ fmov_reg_idx(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
|
|||
{
|
||||
if (FPSCR_SZ) {
|
||||
FMOV_EXT(m);
|
||||
WRITE(FRm, Rn + R0 + 4);
|
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MWRITE(FRm, Rn + R0 + 4);
|
||||
m++;
|
||||
WRITE(FRm, Rn + R0);
|
||||
MWRITE(FRm, Rn + R0);
|
||||
} else {
|
||||
WRITE(FRm, Rn + R0);
|
||||
MWRITE(FRm, Rn + R0);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -223,11 +223,11 @@ fmov_reg_mem(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
|
|||
{
|
||||
if (FPSCR_SZ) {
|
||||
FMOV_EXT(m);
|
||||
WRITE(FRm, Rn + 4);
|
||||
MWRITE(FRm, Rn + 4);
|
||||
m++;
|
||||
WRITE(FRm, Rn);
|
||||
MWRITE(FRm, Rn);
|
||||
} else {
|
||||
WRITE(FRm, Rn);
|
||||
MWRITE(FRm, Rn);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -240,12 +240,12 @@ fmov_reg_dec(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
|
|||
if (FPSCR_SZ) {
|
||||
FMOV_EXT(m);
|
||||
Rn -= 8;
|
||||
WRITE(FRm, Rn + 4);
|
||||
MWRITE(FRm, Rn + 4);
|
||||
m++;
|
||||
WRITE(FRm, Rn);
|
||||
MWRITE(FRm, Rn);
|
||||
} else {
|
||||
Rn -= 4;
|
||||
WRITE(FRm, Rn);
|
||||
MWRITE(FRm, Rn);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -445,11 +445,11 @@ id_sys(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, u16 code)
|
|||
case 0x4052:
|
||||
case 0x4062:
|
||||
Rn -= 4;
|
||||
WRITE(*reg, Rn);
|
||||
MWRITE(*reg, Rn);
|
||||
break;
|
||||
case 0x4056:
|
||||
case 0x4066:
|
||||
READ(*reg, Rn);
|
||||
MREAD(*reg, Rn);
|
||||
Rn += 4;
|
||||
break;
|
||||
default:
|
||||
|
@ -467,109 +467,6 @@ static int fpu_emulate(u16 code, struct sh_fpu_soft_struct *fregs, struct pt_reg
|
|||
return id_sys(fregs, regs, code);
|
||||
}
|
||||
|
||||
/**
|
||||
* denormal_to_double - Given denormalized float number,
|
||||
* store double float
|
||||
*
|
||||
* @fpu: Pointer to sh_fpu_soft structure
|
||||
* @n: Index to FP register
|
||||
*/
|
||||
static void denormal_to_double(struct sh_fpu_soft_struct *fpu, int n)
|
||||
{
|
||||
unsigned long du, dl;
|
||||
unsigned long x = fpu->fpul;
|
||||
int exp = 1023 - 126;
|
||||
|
||||
if (x != 0 && (x & 0x7f800000) == 0) {
|
||||
du = (x & 0x80000000);
|
||||
while ((x & 0x00800000) == 0) {
|
||||
x <<= 1;
|
||||
exp--;
|
||||
}
|
||||
x &= 0x007fffff;
|
||||
du |= (exp << 20) | (x >> 3);
|
||||
dl = x << 29;
|
||||
|
||||
fpu->fp_regs[n] = du;
|
||||
fpu->fp_regs[n+1] = dl;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* ieee_fpe_handler - Handle denormalized number exception
|
||||
*
|
||||
* @regs: Pointer to register structure
|
||||
*
|
||||
* Returns 1 when it's handled (should not cause exception).
|
||||
*/
|
||||
static int ieee_fpe_handler(struct pt_regs *regs)
|
||||
{
|
||||
unsigned short insn = *(unsigned short *)regs->pc;
|
||||
unsigned short finsn;
|
||||
unsigned long nextpc;
|
||||
int nib[4] = {
|
||||
(insn >> 12) & 0xf,
|
||||
(insn >> 8) & 0xf,
|
||||
(insn >> 4) & 0xf,
|
||||
insn & 0xf};
|
||||
|
||||
if (nib[0] == 0xb ||
|
||||
(nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb)) /* bsr & jsr */
|
||||
regs->pr = regs->pc + 4;
|
||||
|
||||
if (nib[0] == 0xa || nib[0] == 0xb) { /* bra & bsr */
|
||||
nextpc = regs->pc + 4 + ((short) ((insn & 0xfff) << 4) >> 3);
|
||||
finsn = *(unsigned short *) (regs->pc + 2);
|
||||
} else if (nib[0] == 0x8 && nib[1] == 0xd) { /* bt/s */
|
||||
if (regs->sr & 1)
|
||||
nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1);
|
||||
else
|
||||
nextpc = regs->pc + 4;
|
||||
finsn = *(unsigned short *) (regs->pc + 2);
|
||||
} else if (nib[0] == 0x8 && nib[1] == 0xf) { /* bf/s */
|
||||
if (regs->sr & 1)
|
||||
nextpc = regs->pc + 4;
|
||||
else
|
||||
nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1);
|
||||
finsn = *(unsigned short *) (regs->pc + 2);
|
||||
} else if (nib[0] == 0x4 && nib[3] == 0xb &&
|
||||
(nib[2] == 0x0 || nib[2] == 0x2)) { /* jmp & jsr */
|
||||
nextpc = regs->regs[nib[1]];
|
||||
finsn = *(unsigned short *) (regs->pc + 2);
|
||||
} else if (nib[0] == 0x0 && nib[3] == 0x3 &&
|
||||
(nib[2] == 0x0 || nib[2] == 0x2)) { /* braf & bsrf */
|
||||
nextpc = regs->pc + 4 + regs->regs[nib[1]];
|
||||
finsn = *(unsigned short *) (regs->pc + 2);
|
||||
} else if (insn == 0x000b) { /* rts */
|
||||
nextpc = regs->pr;
|
||||
finsn = *(unsigned short *) (regs->pc + 2);
|
||||
} else {
|
||||
nextpc = regs->pc + 2;
|
||||
finsn = insn;
|
||||
}
|
||||
|
||||
if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */
|
||||
struct task_struct *tsk = current;
|
||||
|
||||
if ((tsk->thread.xstate->softfpu.fpscr & (1 << 17))) {
|
||||
/* FPU error */
|
||||
denormal_to_double (&tsk->thread.xstate->softfpu,
|
||||
(finsn >> 8) & 0xf);
|
||||
tsk->thread.xstate->softfpu.fpscr &=
|
||||
~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
|
||||
task_thread_info(tsk)->status |= TS_USEDFPU;
|
||||
} else {
|
||||
force_sig_fault(SIGFPE, FPE_FLTINV,
|
||||
(void __user *)regs->pc);
|
||||
}
|
||||
|
||||
regs->pc = nextpc;
|
||||
return 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* fpu_init - Initialize FPU registers
|
||||
* @fpu: Pointer to software emulated FPU registers.
|
||||
|
|
|
@ -28,9 +28,9 @@ __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n)
|
|||
return 0;
|
||||
}
|
||||
|
||||
__kernel_size_t __clear_user(void *to, __kernel_size_t n)
|
||||
__kernel_size_t __clear_user(void __user *to, __kernel_size_t n)
|
||||
{
|
||||
memset(to, 0, n);
|
||||
memset((__force void *)to, 0, n);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -834,8 +834,10 @@ static int __init maple_bus_init(void)
|
|||
|
||||
maple_queue_cache = KMEM_CACHE(maple_buffer, SLAB_HWCACHE_ALIGN);
|
||||
|
||||
if (!maple_queue_cache)
|
||||
if (!maple_queue_cache) {
|
||||
retval = -ENOMEM;
|
||||
goto cleanup_bothirqs;
|
||||
}
|
||||
|
||||
INIT_LIST_HEAD(&maple_waitq);
|
||||
INIT_LIST_HEAD(&maple_sentq);
|
||||
|
@ -848,6 +850,7 @@ static int __init maple_bus_init(void)
|
|||
if (!mdev[i]) {
|
||||
while (i-- > 0)
|
||||
maple_free_dev(mdev[i]);
|
||||
retval = -ENOMEM;
|
||||
goto cleanup_cache;
|
||||
}
|
||||
baseunits[i] = mdev[i];
|
||||
|
|
Loading…
Reference in New Issue