drm/i915: Constify the state arguments to the color management stuff
Pass the crtc state etc. as const to the color management commit functions. And while at it polish some of the local variables. v2: Rebase Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190205160848.24662-4-ville.syrjala@linux.intel.com Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
This commit is contained in:
Ville Syrjälä
parent
5f4f3e386b
commit
23b03a272c
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@ -323,8 +323,8 @@ struct drm_i915_display_funcs {
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/* display clock increase/decrease */
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/* pll clock increase/decrease */
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void (*load_csc_matrix)(struct intel_crtc_state *crtc_state);
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void (*load_luts)(struct intel_crtc_state *crtc_state);
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void (*load_csc_matrix)(const struct intel_crtc_state *crtc_state);
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void (*load_luts)(const struct intel_crtc_state *crtc_state);
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};
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#define CSR_VERSION(major, minor) ((major) << 16 | (minor))
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@ -74,12 +74,12 @@
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#define ILK_CSC_COEFF_1_0 \
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((7 << 12) | ILK_CSC_COEFF_FP(CTM_COEFF_1_0, 8))
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static bool lut_is_legacy(struct drm_property_blob *lut)
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static bool lut_is_legacy(const struct drm_property_blob *lut)
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{
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return drm_color_lut_size(lut) == LEGACY_LUT_LENGTH;
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}
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static bool crtc_state_is_legacy_gamma(struct intel_crtc_state *crtc_state)
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static bool crtc_state_is_legacy_gamma(const struct intel_crtc_state *crtc_state)
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{
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return !crtc_state->base.degamma_lut &&
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!crtc_state->base.ctm &&
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@ -115,8 +115,8 @@ static u64 *ctm_mult_by_limited(u64 *result, const u64 *input)
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static void ilk_load_ycbcr_conversion_matrix(struct intel_crtc *crtc)
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{
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int pipe = crtc->pipe;
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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enum pipe pipe = crtc->pipe;
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I915_WRITE(PIPE_CSC_PREOFF_HI(pipe), 0);
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I915_WRITE(PIPE_CSC_PREOFF_ME(pipe), 0);
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@ -137,13 +137,14 @@ static void ilk_load_ycbcr_conversion_matrix(struct intel_crtc *crtc)
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I915_WRITE(PIPE_CSC_MODE(pipe), 0);
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}
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static void ilk_load_csc_matrix(struct intel_crtc_state *crtc_state)
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static void ilk_load_csc_matrix(const struct intel_crtc_state *crtc_state)
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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int i, pipe = crtc->pipe;
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u16 coeffs[9] = { 0, };
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bool limited_color_range = false;
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enum pipe pipe = crtc->pipe;
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u16 coeffs[9] = {};
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int i;
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/*
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* FIXME if there's a gamma LUT after the CSC, we should
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@ -256,16 +257,16 @@ static void ilk_load_csc_matrix(struct intel_crtc_state *crtc_state)
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/*
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* Set up the pipe CSC unit on CherryView.
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*/
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static void cherryview_load_csc_matrix(struct intel_crtc_state *crtc_state)
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static void cherryview_load_csc_matrix(const struct intel_crtc_state *crtc_state)
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{
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struct drm_device *dev = crtc_state->base.crtc->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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int pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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enum pipe pipe = crtc->pipe;
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u32 mode;
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if (crtc_state->base.ctm) {
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struct drm_color_ctm *ctm = crtc_state->base.ctm->data;
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u16 coeffs[9] = { 0, };
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const struct drm_color_ctm *ctm = crtc_state->base.ctm->data;
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u16 coeffs[9] = {};
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int i;
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for (i = 0; i < ARRAY_SIZE(coeffs); i++) {
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@ -303,18 +304,17 @@ static void cherryview_load_csc_matrix(struct intel_crtc_state *crtc_state)
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I915_WRITE(CGM_PIPE_MODE(pipe), mode);
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}
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void intel_color_set_csc(struct intel_crtc_state *crtc_state)
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void intel_color_set_csc(const struct intel_crtc_state *crtc_state)
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{
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struct drm_device *dev = crtc_state->base.crtc->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
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if (dev_priv->display.load_csc_matrix)
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dev_priv->display.load_csc_matrix(crtc_state);
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}
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/* Loads the legacy palette/gamma unit for the CRTC. */
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static void i9xx_load_luts_internal(struct intel_crtc_state *crtc_state,
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struct drm_property_blob *blob)
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static void i9xx_load_luts_internal(const struct intel_crtc_state *crtc_state,
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const struct drm_property_blob *blob)
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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@ -329,7 +329,8 @@ static void i9xx_load_luts_internal(struct intel_crtc_state *crtc_state,
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}
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if (blob) {
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struct drm_color_lut *lut = blob->data;
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const struct drm_color_lut *lut = blob->data;
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for (i = 0; i < 256; i++) {
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u32 word =
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(drm_color_lut_extract(lut[i].red, 8) << 16) |
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@ -353,13 +354,13 @@ static void i9xx_load_luts_internal(struct intel_crtc_state *crtc_state,
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}
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}
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static void i9xx_load_luts(struct intel_crtc_state *crtc_state)
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static void i9xx_load_luts(const struct intel_crtc_state *crtc_state)
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{
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i9xx_load_luts_internal(crtc_state, crtc_state->base.gamma_lut);
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}
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/* Loads the legacy palette/gamma unit for the CRTC on Haswell. */
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static void haswell_load_luts(struct intel_crtc_state *crtc_state)
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static void haswell_load_luts(const struct intel_crtc_state *crtc_state)
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{
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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@ -383,17 +384,19 @@ static void haswell_load_luts(struct intel_crtc_state *crtc_state)
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hsw_enable_ips(crtc_state);
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}
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static void bdw_load_degamma_lut(struct intel_crtc_state *crtc_state)
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static void bdw_load_degamma_lut(const struct intel_crtc_state *crtc_state)
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{
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struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
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enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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const struct drm_property_blob *degamma_lut = crtc_state->base.degamma_lut;
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u32 i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
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enum pipe pipe = crtc->pipe;
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I915_WRITE(PREC_PAL_INDEX(pipe),
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PAL_PREC_SPLIT_MODE | PAL_PREC_AUTO_INCREMENT);
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if (crtc_state->base.degamma_lut) {
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struct drm_color_lut *lut = crtc_state->base.degamma_lut->data;
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if (degamma_lut) {
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const struct drm_color_lut *lut = degamma_lut->data;
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for (i = 0; i < lut_size; i++) {
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u32 word =
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@ -413,11 +416,13 @@ static void bdw_load_degamma_lut(struct intel_crtc_state *crtc_state)
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}
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}
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static void bdw_load_gamma_lut(struct intel_crtc_state *crtc_state, u32 offset)
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static void bdw_load_gamma_lut(const struct intel_crtc_state *crtc_state, u32 offset)
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{
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struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
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enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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const struct drm_property_blob *gamma_lut = crtc_state->base.gamma_lut;
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u32 i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
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enum pipe pipe = crtc->pipe;
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WARN_ON(offset & ~PAL_PREC_INDEX_VALUE_MASK);
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@ -426,8 +431,8 @@ static void bdw_load_gamma_lut(struct intel_crtc_state *crtc_state, u32 offset)
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PAL_PREC_AUTO_INCREMENT |
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offset);
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if (crtc_state->base.gamma_lut) {
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struct drm_color_lut *lut = crtc_state->base.gamma_lut->data;
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if (gamma_lut) {
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const struct drm_color_lut *lut = gamma_lut->data;
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for (i = 0; i < lut_size; i++) {
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u32 word =
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@ -461,10 +466,11 @@ static void bdw_load_gamma_lut(struct intel_crtc_state *crtc_state, u32 offset)
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}
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/* Loads the palette/gamma unit for the CRTC on Broadwell+. */
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static void broadwell_load_luts(struct intel_crtc_state *crtc_state)
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static void broadwell_load_luts(const struct intel_crtc_state *crtc_state)
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{
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struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
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enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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enum pipe pipe = crtc->pipe;
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if (crtc_state_is_legacy_gamma(crtc_state)) {
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haswell_load_luts(crtc_state);
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@ -484,10 +490,11 @@ static void broadwell_load_luts(struct intel_crtc_state *crtc_state)
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I915_WRITE(PREC_PAL_INDEX(pipe), 0);
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}
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static void glk_load_degamma_lut(struct intel_crtc_state *crtc_state)
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static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state)
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{
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struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
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enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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enum pipe pipe = crtc->pipe;
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const u32 lut_size = 33;
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u32 i;
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@ -514,11 +521,11 @@ static void glk_load_degamma_lut(struct intel_crtc_state *crtc_state)
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I915_WRITE(PRE_CSC_GAMC_DATA(pipe), (1 << 16));
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}
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static void glk_load_luts(struct intel_crtc_state *crtc_state)
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static void glk_load_luts(const struct intel_crtc_state *crtc_state)
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{
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struct drm_device *dev = crtc_state->base.crtc->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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enum pipe pipe = crtc->pipe;
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glk_load_degamma_lut(crtc_state);
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@ -532,28 +539,29 @@ static void glk_load_luts(struct intel_crtc_state *crtc_state)
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I915_WRITE(GAMMA_MODE(pipe), crtc_state->gamma_mode);
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}
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/* Loads the palette/gamma unit for the CRTC on CherryView. */
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static void cherryview_load_luts(struct intel_crtc_state *crtc_state)
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static void cherryview_load_luts(const struct intel_crtc_state *crtc_state)
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{
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struct drm_crtc *crtc = crtc_state->base.crtc;
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struct drm_i915_private *dev_priv = to_i915(crtc->dev);
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enum pipe pipe = to_intel_crtc(crtc)->pipe;
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struct drm_color_lut *lut;
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u32 i, lut_size;
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u32 word0, word1;
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struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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const struct drm_property_blob *gamma_lut = crtc_state->base.gamma_lut;
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const struct drm_property_blob *degamma_lut = crtc_state->base.degamma_lut;
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enum pipe pipe = crtc->pipe;
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if (crtc_state_is_legacy_gamma(crtc_state)) {
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/* Turn off degamma/gamma on CGM block. */
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I915_WRITE(CGM_PIPE_MODE(pipe),
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(crtc_state->base.ctm ? CGM_PIPE_MODE_CSC : 0));
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i9xx_load_luts_internal(crtc_state, crtc_state->base.gamma_lut);
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i9xx_load_luts_internal(crtc_state, gamma_lut);
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return;
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}
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if (crtc_state->base.degamma_lut) {
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lut = crtc_state->base.degamma_lut->data;
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lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
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if (degamma_lut) {
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const struct drm_color_lut *lut = degamma_lut->data;
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int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
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for (i = 0; i < lut_size; i++) {
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u32 word0, word1;
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/* Write LUT in U0.14 format. */
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word0 =
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(drm_color_lut_extract(lut[i].green, 14) << 16) |
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@ -565,10 +573,13 @@ static void cherryview_load_luts(struct intel_crtc_state *crtc_state)
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}
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}
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if (crtc_state->base.gamma_lut) {
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lut = crtc_state->base.gamma_lut->data;
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lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
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if (gamma_lut) {
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const struct drm_color_lut *lut = gamma_lut->data;
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int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
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for (i = 0; i < lut_size; i++) {
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u32 word0, word1;
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/* Write LUT in U0.10 format. */
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word0 =
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(drm_color_lut_extract(lut[i].green, 10) << 16) |
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@ -582,8 +593,8 @@ static void cherryview_load_luts(struct intel_crtc_state *crtc_state)
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I915_WRITE(CGM_PIPE_MODE(pipe),
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(crtc_state->base.ctm ? CGM_PIPE_MODE_CSC : 0) |
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(crtc_state->base.degamma_lut ? CGM_PIPE_MODE_DEGAMMA : 0) |
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(crtc_state->base.gamma_lut ? CGM_PIPE_MODE_GAMMA : 0));
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(degamma_lut ? CGM_PIPE_MODE_DEGAMMA : 0) |
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(gamma_lut ? CGM_PIPE_MODE_GAMMA : 0));
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/*
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* Also program a linear LUT in the legacy block (behind the
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@ -592,10 +603,9 @@ static void cherryview_load_luts(struct intel_crtc_state *crtc_state)
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i9xx_load_luts_internal(crtc_state, NULL);
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}
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void intel_color_load_luts(struct intel_crtc_state *crtc_state)
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void intel_color_load_luts(const struct intel_crtc_state *crtc_state)
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{
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struct drm_device *dev = crtc_state->base.crtc->dev;
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
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dev_priv->display.load_luts(crtc_state);
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}
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@ -620,6 +630,8 @@ static int check_lut_size(const struct drm_property_blob *lut, int expected)
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int intel_color_check(struct intel_crtc_state *crtc_state)
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{
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struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
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const struct drm_property_blob *gamma_lut = crtc_state->base.gamma_lut;
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const struct drm_property_blob *degamma_lut = crtc_state->base.degamma_lut;
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int gamma_length, degamma_length;
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u32 gamma_tests, degamma_tests;
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@ -634,12 +646,12 @@ int intel_color_check(struct intel_crtc_state *crtc_state)
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return 0;
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}
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if (check_lut_size(crtc_state->base.degamma_lut, degamma_length) ||
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check_lut_size(crtc_state->base.gamma_lut, gamma_length))
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if (check_lut_size(degamma_lut, degamma_length) ||
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check_lut_size(gamma_lut, gamma_length))
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return -EINVAL;
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if (drm_color_lut_check(crtc_state->base.degamma_lut, degamma_tests) ||
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drm_color_lut_check(crtc_state->base.gamma_lut, gamma_tests))
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if (drm_color_lut_check(degamma_lut, degamma_tests) ||
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drm_color_lut_check(gamma_lut, gamma_tests))
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return -EINVAL;
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if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
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@ -2389,8 +2389,8 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
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/* intel_color.c */
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void intel_color_init(struct intel_crtc *crtc);
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int intel_color_check(struct intel_crtc_state *crtc_state);
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void intel_color_set_csc(struct intel_crtc_state *crtc_state);
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void intel_color_load_luts(struct intel_crtc_state *crtc_state);
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void intel_color_set_csc(const struct intel_crtc_state *crtc_state);
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void intel_color_load_luts(const struct intel_crtc_state *crtc_state);
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||||
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/* intel_lspcon.c */
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bool lspcon_init(struct intel_digital_port *intel_dig_port);
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||||
|
|
|
|||
Loading…
Reference in New Issue