drm/amdgpu: switch to amdgpu_ras_late_init for nbio v7_4 (v2)
call helper function in late init phase to handle ras init for nbio ip block v2: init local var r to 0 in case the function return failure on asics that don't have ras_late_init implementation Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1215,11 +1215,15 @@ static int soc15_common_early_init(void *handle)
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static int soc15_common_late_init(void *handle)
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static int soc15_common_late_init(void *handle)
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{
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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int r = 0;
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if (amdgpu_sriov_vf(adev))
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if (amdgpu_sriov_vf(adev))
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xgpu_ai_mailbox_get_irq(adev);
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xgpu_ai_mailbox_get_irq(adev);
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return 0;
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if (adev->nbio.funcs->ras_late_init)
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r = adev->nbio.funcs->ras_late_init(adev);
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return r;
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}
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}
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static int soc15_common_sw_init(void *handle)
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static int soc15_common_sw_init(void *handle)
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@ -1296,6 +1300,13 @@ static int soc15_common_hw_fini(void *handle)
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if (amdgpu_sriov_vf(adev))
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if (amdgpu_sriov_vf(adev))
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xgpu_ai_mailbox_put_irq(adev);
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xgpu_ai_mailbox_put_irq(adev);
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if (amdgpu_ras_is_supported(adev, adev->nbio.ras_if->block)) {
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if (adev->nbio.funcs->init_ras_controller_interrupt)
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amdgpu_irq_put(adev, &adev->nbio.ras_controller_irq, 0);
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if (adev->nbio.funcs->init_ras_err_event_athub_interrupt)
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amdgpu_irq_put(adev, &adev->nbio.ras_err_event_athub_irq, 0);
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}
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return 0;
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return 0;
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}
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}
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