Few omap driver changes to add minimal device tree support
for the omap 1w driver, and to fix resume and interrupt issues on the l3-noc driver. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUZm2aAAoJEBvUPslcq6VzUAUP/iAz4jrAYAj8YJoCUyLLWD2H I5WkYTaX3CNVvjwzwXAQ6gxHzbUnjE0yXUjBCNJyQj+U8FyCEiKBn8L6gJQmEnZe tOWzDVcx7HUYGyKdun9AhcwO1oLjM/jAganjyy2ICEFGmC8mfzgSxWX8KAOHfu19 0fD3DaGg9Krid/z+XbR4kQnvy8eqiPyOeVxmQ50m8Jxe82CR/VnvPM+NP+8jv2FP LeyR3cmcKJ/1CRxBl86tGRdDvIj8lKrdKqoAbkQkVBpq4L5xN1ePOtzgiPM/X/q4 lUvRwgqX0dTbQj/8N/u7/SZxytQkSlcslImiBVISBKvfI0hKMKNG4rqM2FScnbhu tmt8BqW5KjzjnxGQwCP6nLlSFQLl8dEVPaj1lmmOS/PB7egVFVXOZhr5yEMIGyeG glynK+H0Y6zIMiXnzULjXssyaBSVu04FldaxOgVBXtSWlG90aCLGat02mlvysxsF ErdNvm/S7fR0xmFwgxOAYhSD7BroqyaGfku6VF01ob8LmqohEHqEf2ND3OvjALaz jsyh7UItzuZchYnXJzqWRQMlxplYfRMinDkwe9lfFFWPbacvpWabHtBBQwfo7lpr DeWRX+Tjcr307Heg7cQe2lQU/Ol68f9wbIFNaHdwNBLQ+8d5L3pFhykMf/AMCXh0 IkPhr6wyaTYUi8ZfJVni =MBo8 -----END PGP SIGNATURE----- Merge tag 'omap-for-v3.19/w1-and-l3-noc' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers Pull "omap driver changes for v3.19" from Tony Lindgren: Few omap driver changes to add minimal device tree support for the omap 1w driver, and to fix resume and interrupt issues on the l3-noc driver. * tag 'omap-for-v3.19/w1-and-l3-noc' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: bus: omap_l3_noc: Correct returning IRQ_HANDLED unconditionally in the irq handler bus: omap_l3_noc: Add resume hook to restore context w1: omap-hdq: support device probing with device-tree Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
22b7db80a9
|
@ -0,0 +1,17 @@
|
|||
* OMAP HDQ One wire bus master controller
|
||||
|
||||
Required properties:
|
||||
- compatible : should be "ti,omap3-1w"
|
||||
- reg : Address and length of the register set for the device
|
||||
- interrupts : interrupt line.
|
||||
- ti,hwmods : "hdq1w"
|
||||
|
||||
Example:
|
||||
|
||||
- From omap3.dtsi
|
||||
hdqw1w: 1w@480b2000 {
|
||||
compatible = "ti,omap3-1w";
|
||||
reg = <0x480b2000 0x1000>;
|
||||
interrupts = <58>;
|
||||
ti,hwmods = "hdq1w";
|
||||
};
|
|
@ -222,10 +222,14 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
|
|||
}
|
||||
|
||||
/* Error found so break the for loop */
|
||||
break;
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
}
|
||||
return IRQ_HANDLED;
|
||||
|
||||
dev_err(l3->dev, "L3 %s IRQ not handled!!\n",
|
||||
inttype ? "debug" : "application");
|
||||
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
static const struct of_device_id l3_noc_match[] = {
|
||||
|
@ -296,11 +300,66 @@ static int omap_l3_probe(struct platform_device *pdev)
|
|||
return ret;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
/**
|
||||
* l3_resume_noirq() - resume function for l3_noc
|
||||
* @dev: pointer to l3_noc device structure
|
||||
*
|
||||
* We only have the resume handler only since we
|
||||
* have already maintained the delta register
|
||||
* configuration as part of configuring the system
|
||||
*/
|
||||
static int l3_resume_noirq(struct device *dev)
|
||||
{
|
||||
struct omap_l3 *l3 = dev_get_drvdata(dev);
|
||||
int i;
|
||||
struct l3_flagmux_data *flag_mux;
|
||||
void __iomem *base, *mask_regx = NULL;
|
||||
u32 mask_val;
|
||||
|
||||
for (i = 0; i < l3->num_modules; i++) {
|
||||
base = l3->l3_base[i];
|
||||
flag_mux = l3->l3_flagmux[i];
|
||||
if (!flag_mux->mask_app_bits && !flag_mux->mask_dbg_bits)
|
||||
continue;
|
||||
|
||||
mask_regx = base + flag_mux->offset + L3_FLAGMUX_MASK0 +
|
||||
(L3_APPLICATION_ERROR << 3);
|
||||
mask_val = readl_relaxed(mask_regx);
|
||||
mask_val &= ~(flag_mux->mask_app_bits);
|
||||
|
||||
writel_relaxed(mask_val, mask_regx);
|
||||
mask_regx = base + flag_mux->offset + L3_FLAGMUX_MASK0 +
|
||||
(L3_DEBUG_ERROR << 3);
|
||||
mask_val = readl_relaxed(mask_regx);
|
||||
mask_val &= ~(flag_mux->mask_dbg_bits);
|
||||
|
||||
writel_relaxed(mask_val, mask_regx);
|
||||
}
|
||||
|
||||
/* Dummy read to force OCP barrier */
|
||||
if (mask_regx)
|
||||
(void)readl(mask_regx);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops l3_dev_pm_ops = {
|
||||
.resume_noirq = l3_resume_noirq,
|
||||
};
|
||||
|
||||
#define L3_DEV_PM_OPS (&l3_dev_pm_ops)
|
||||
#else
|
||||
#define L3_DEV_PM_OPS NULL
|
||||
#endif
|
||||
|
||||
static struct platform_driver omap_l3_driver = {
|
||||
.probe = omap_l3_probe,
|
||||
.driver = {
|
||||
.name = "omap_l3_noc",
|
||||
.owner = THIS_MODULE,
|
||||
.pm = L3_DEV_PM_OPS,
|
||||
.of_match_table = of_match_ptr(l3_noc_match),
|
||||
},
|
||||
};
|
||||
|
|
|
@ -72,11 +72,18 @@ struct hdq_data {
|
|||
static int omap_hdq_probe(struct platform_device *pdev);
|
||||
static int omap_hdq_remove(struct platform_device *pdev);
|
||||
|
||||
static struct of_device_id omap_hdq_dt_ids[] = {
|
||||
{ .compatible = "ti,omap3-1w" },
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, omap_hdq_dt_ids);
|
||||
|
||||
static struct platform_driver omap_hdq_driver = {
|
||||
.probe = omap_hdq_probe,
|
||||
.remove = omap_hdq_remove,
|
||||
.driver = {
|
||||
.name = "omap_hdq",
|
||||
.of_match_table = omap_hdq_dt_ids,
|
||||
},
|
||||
};
|
||||
|
||||
|
|
Loading…
Reference in New Issue