ARM: 8755/1: NOMMU: Reorganise __setup_mpu
Currently, we have mixed code placement between .head.text and .text depends on configuration we are building: _text M R(UP) R(SMP) ====================================================== __setup_mpu __HEAD __HEAD text __after_proc_init __HEAD __HEAD text __mmap_switched text text text We are going to support another variant of MPU which is different to PMSAv7 in sense overlapping MPU regions are not allowed, so this patch makes boundaries between these sections precise and consistent: _text M R(UP) R(SMP) ====================================================== __setup_mpu __HEAD __HEAD __HEAD __after_proc_init text text text __mmap_switched text text text Additionally, it paves a path to postpone MPU activation till __after_proc_init where we do set SCTLR anyway and can return directly to __mmap_switched. Tested-by: Szemz? András <sza@esh.hu> Tested-by: Alexandre TORGUE <alexandre.torgue@st.com> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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@ -75,8 +75,8 @@ ENTRY(stext)
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ldr r12, [r10, #PROCINFO_INITFUNC]
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add r12, r12, r10
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ret r12
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1: bl __after_proc_init
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b __mmap_switched
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1: ldr lr, =__mmap_switched
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b __after_proc_init
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ENDPROC(stext)
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#ifdef CONFIG_SMP
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@ -123,6 +123,7 @@ __secondary_data:
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/*
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* Set the Control Register and Read the process ID.
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*/
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.text
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__after_proc_init:
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#ifdef CONFIG_CPU_CP15
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/*
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@ -202,6 +203,7 @@ ENDPROC(__after_proc_init)
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*
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* r6: Value to be written to DRSR (and IRSR if required) for PMSAv7_RAM_REGION
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*/
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__HEAD
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ENTRY(__setup_mpu)
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@ -301,6 +303,7 @@ ENDPROC(__setup_pmsa_v7)
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* r6: pointer at mpu_rgn_info
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*/
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.text
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ENTRY(__secondary_setup_mpu)
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/* Use MPU region info supplied by __cpu_up */
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ldr r6, [r7] @ get secondary_data.mpu_rgn_info
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