ath10k: introduce dynamic pdev parameters
This is done exactly the same way as for vdev. Signed-off-by: Bartosz Markowski <bartosz.markowski@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
This commit is contained in:
parent
6d1506e788
commit
226a339ba8
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@ -120,6 +120,7 @@ struct ath10k_wmi {
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wait_queue_head_t tx_credits_wq;
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struct wmi_cmd_map *cmd;
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struct wmi_vdev_param_map *vdev_param;
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struct wmi_pdev_param_map *pdev_param;
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u32 num_mem_chunks;
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struct ath10k_mem_chunk mem_chunks[ATH10K_MAX_MEM_REQS];
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@ -1882,12 +1882,12 @@ static int ath10k_start(struct ieee80211_hw *hw)
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else if (ar->state == ATH10K_STATE_RESTARTING)
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ar->state = ATH10K_STATE_RESTARTED;
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ret = ath10k_wmi_pdev_set_param(ar, WMI_PDEV_PARAM_PMF_QOS, 1);
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ret = ath10k_wmi_pdev_set_param(ar, ar->wmi.pdev_param->pmf_qos, 1);
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if (ret)
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ath10k_warn("could not enable WMI_PDEV_PARAM_PMF_QOS (%d)\n",
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ret);
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ret = ath10k_wmi_pdev_set_param(ar, WMI_PDEV_PARAM_DYNAMIC_BW, 0);
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ret = ath10k_wmi_pdev_set_param(ar, ar->wmi.pdev_param->dynamic_bw, 0);
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if (ret)
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ath10k_warn("could not init WMI_PDEV_PARAM_DYNAMIC_BW (%d)\n",
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ret);
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@ -2209,7 +2209,7 @@ static void ath10k_bss_info_changed(struct ieee80211_hw *hw,
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struct ath10k *ar = hw->priv;
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struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
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int ret = 0;
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u32 vdev_param;
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u32 vdev_param, pdev_param;
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mutex_lock(&ar->conf_mutex);
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@ -2235,8 +2235,8 @@ static void ath10k_bss_info_changed(struct ieee80211_hw *hw,
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"vdev %d set beacon tx mode to staggered\n",
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arvif->vdev_id);
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ret = ath10k_wmi_pdev_set_param(ar,
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WMI_PDEV_PARAM_BEACON_TX_MODE,
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pdev_param = ar->wmi.pdev_param->beacon_tx_mode;
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ret = ath10k_wmi_pdev_set_param(ar, pdev_param,
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WMI_BEACON_STAGGERED_MODE);
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if (ret)
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ath10k_warn("Failed to set beacon mode for VDEV: %d\n",
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@ -383,6 +383,111 @@ static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
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WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
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};
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static struct wmi_pdev_param_map wmi_pdev_param_map = {
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.tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
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.rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
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.txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
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.txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
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.txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
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.beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
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.beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
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.resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
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.protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
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.dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
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.non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
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.agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
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.sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
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.ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
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.ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
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.ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
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.ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
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.ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
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.ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
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.ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
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.ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
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.ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
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.ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
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.l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
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.dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
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.pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
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.pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
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.pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
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.pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
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.pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
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.vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
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.peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
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.bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
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.pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
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.arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
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.arpdhcp_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
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.dcs = WMI_PDEV_PARAM_DCS,
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.ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
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.ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
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.ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
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.ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
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.ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
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.dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
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.proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
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.idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
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.power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
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.fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
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.burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
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.burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
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};
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static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
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.tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
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.rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
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.txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
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.txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
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.txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
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.beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
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.beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
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.resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
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.protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
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.dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
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.non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
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.agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
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.sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
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.ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
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.ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
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.ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
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.ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
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.ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
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.ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
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.ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
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.ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
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.ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
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.ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
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.l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
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.dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
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.pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
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.pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
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.pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
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.pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
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.pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
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.vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
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.peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
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.bcnflt_stats_update_period =
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WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
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.pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
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.arp_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
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.arpdhcp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
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.dcs = WMI_10X_PDEV_PARAM_DCS,
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.ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
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.ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
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.ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
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.ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
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.ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
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.dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
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.proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
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.idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
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.power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
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.fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
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.burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
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.burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
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};
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int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
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{
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int ret;
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@ -1870,10 +1975,12 @@ int ath10k_wmi_attach(struct ath10k *ar)
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ath10k_warn("Firmware 10.X is not yet supported\n");
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ar->wmi.cmd = &wmi_10x_cmd_map;
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ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
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ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
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ret = -ENOTSUPP;
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} else {
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ar->wmi.cmd = &wmi_cmd_map;
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ar->wmi.vdev_param = &wmi_vdev_param_map;
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ar->wmi.pdev_param = &wmi_pdev_param_map;
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ret = 0;
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}
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@ -2009,12 +2116,16 @@ int ath10k_wmi_pdev_resume_target(struct ath10k *ar)
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return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_resume_cmdid);
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}
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int ath10k_wmi_pdev_set_param(struct ath10k *ar, enum wmi_pdev_param id,
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u32 value)
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int ath10k_wmi_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
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{
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struct wmi_pdev_set_param_cmd *cmd;
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struct sk_buff *skb;
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if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
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ath10k_warn("pdev param %d not supported by firmware\n", id);
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return -EINVAL;
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}
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skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
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if (!skb)
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return -ENOMEM;
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@ -2072,6 +2072,60 @@ struct wmi_csa_event {
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#define VDEV_DEFAULT_STATS_UPDATE_PERIOD 500
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#define PEER_DEFAULT_STATS_UPDATE_PERIOD 500
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struct wmi_pdev_param_map {
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u32 tx_chain_mask;
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u32 rx_chain_mask;
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u32 txpower_limit2g;
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u32 txpower_limit5g;
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u32 txpower_scale;
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u32 beacon_gen_mode;
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u32 beacon_tx_mode;
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u32 resmgr_offchan_mode;
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u32 protection_mode;
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u32 dynamic_bw;
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u32 non_agg_sw_retry_th;
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u32 agg_sw_retry_th;
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u32 sta_kickout_th;
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u32 ac_aggrsize_scaling;
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u32 ltr_enable;
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u32 ltr_ac_latency_be;
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u32 ltr_ac_latency_bk;
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u32 ltr_ac_latency_vi;
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u32 ltr_ac_latency_vo;
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u32 ltr_ac_latency_timeout;
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u32 ltr_sleep_override;
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u32 ltr_rx_override;
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u32 ltr_tx_activity_timeout;
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u32 l1ss_enable;
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u32 dsleep_enable;
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u32 pcielp_txbuf_flush;
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u32 pcielp_txbuf_watermark;
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u32 pcielp_txbuf_tmo_en;
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u32 pcielp_txbuf_tmo_value;
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u32 pdev_stats_update_period;
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u32 vdev_stats_update_period;
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u32 peer_stats_update_period;
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u32 bcnflt_stats_update_period;
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u32 pmf_qos;
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u32 arp_ac_override;
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u32 arpdhcp_ac_override;
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u32 dcs;
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u32 ani_enable;
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u32 ani_poll_period;
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u32 ani_listen_period;
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u32 ani_ofdm_level;
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u32 ani_cck_level;
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u32 dyntxchain;
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u32 proxy_sta;
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u32 idle_ps_config;
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u32 power_gating_sleep;
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u32 fast_channel_reset;
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u32 burst_dur;
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u32 burst_enable;
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};
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#define WMI_PDEV_PARAM_UNSUPPORTED 0
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enum wmi_pdev_param {
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/* TX chian mask */
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WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
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@ -2171,6 +2225,97 @@ enum wmi_pdev_param {
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WMI_PDEV_PARAM_POWER_GATING_SLEEP,
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};
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enum wmi_10x_pdev_param {
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/* TX chian mask */
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WMI_10X_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
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/* RX chian mask */
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WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
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/* TX power limit for 2G Radio */
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WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
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/* TX power limit for 5G Radio */
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WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
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/* TX power scale */
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WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
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/* Beacon generation mode . 0: host, 1: target */
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WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
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/* Beacon generation mode . 0: staggered 1: bursted */
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WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
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/*
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* Resource manager off chan mode .
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* 0: turn off off chan mode. 1: turn on offchan mode
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*/
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WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
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/*
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* Protection mode:
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* 0: no protection 1:use CTS-to-self 2: use RTS/CTS
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*/
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WMI_10X_PDEV_PARAM_PROTECTION_MODE,
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/* Dynamic bandwidth 0: disable 1: enable */
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WMI_10X_PDEV_PARAM_DYNAMIC_BW,
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/* Non aggregrate/ 11g sw retry threshold.0-disable */
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WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
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/* aggregrate sw retry threshold. 0-disable*/
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WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
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/* Station kickout threshold (non of consecutive failures).0-disable */
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WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
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/* Aggerate size scaling configuration per AC */
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WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
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/* LTR enable */
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WMI_10X_PDEV_PARAM_LTR_ENABLE,
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/* LTR latency for BE, in us */
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WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
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/* LTR latency for BK, in us */
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WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
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/* LTR latency for VI, in us */
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WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
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/* LTR latency for VO, in us */
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WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
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/* LTR AC latency timeout, in ms */
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WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
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/* LTR platform latency override, in us */
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WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
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/* LTR-RX override, in us */
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WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
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/* Tx activity timeout for LTR, in us */
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WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
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/* L1SS state machine enable */
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WMI_10X_PDEV_PARAM_L1SS_ENABLE,
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/* Deep sleep state machine enable */
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WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
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/* pdev level stats update period in ms */
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WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
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/* vdev level stats update period in ms */
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WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
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/* peer level stats update period in ms */
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WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
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/* beacon filter status update period */
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WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
|
||||
/* QOS Mgmt frame protection MFP/PMF 0: disable, 1: enable */
|
||||
WMI_10X_PDEV_PARAM_PMF_QOS,
|
||||
/* Access category on which ARP and DHCP frames are sent */
|
||||
WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
|
||||
/* DCS configuration */
|
||||
WMI_10X_PDEV_PARAM_DCS,
|
||||
/* Enable/Disable ANI on target */
|
||||
WMI_10X_PDEV_PARAM_ANI_ENABLE,
|
||||
/* configure the ANI polling period */
|
||||
WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
|
||||
/* configure the ANI listening period */
|
||||
WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
|
||||
/* configure OFDM immunity level */
|
||||
WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
|
||||
/* configure CCK immunity level */
|
||||
WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
|
||||
/* Enable/Disable CDD for 1x1 STAs in rate control module */
|
||||
WMI_10X_PDEV_PARAM_DYNTXCHAIN,
|
||||
/* Enable/Disable Fast channel reset*/
|
||||
WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
|
||||
/* Set Bursting DUR */
|
||||
WMI_10X_PDEV_PARAM_BURST_DUR,
|
||||
/* Set Bursting Enable*/
|
||||
WMI_10X_PDEV_PARAM_BURST_ENABLE,
|
||||
};
|
||||
|
||||
struct wmi_pdev_set_param_cmd {
|
||||
__le32 param_id;
|
||||
__le32 param_value;
|
||||
|
@ -3797,8 +3942,7 @@ int ath10k_wmi_pdev_suspend_target(struct ath10k *ar);
|
|||
int ath10k_wmi_pdev_resume_target(struct ath10k *ar);
|
||||
int ath10k_wmi_pdev_set_regdomain(struct ath10k *ar, u16 rd, u16 rd2g,
|
||||
u16 rd5g, u16 ctl2g, u16 ctl5g);
|
||||
int ath10k_wmi_pdev_set_param(struct ath10k *ar, enum wmi_pdev_param id,
|
||||
u32 value);
|
||||
int ath10k_wmi_pdev_set_param(struct ath10k *ar, u32 id, u32 value);
|
||||
int ath10k_wmi_cmd_init(struct ath10k *ar);
|
||||
int ath10k_wmi_start_scan(struct ath10k *ar, const struct wmi_start_scan_arg *);
|
||||
void ath10k_wmi_start_scan_init(struct ath10k *ar, struct wmi_start_scan_arg *);
|
||||
|
|
Loading…
Reference in New Issue