i.MX fixes for 5.15, round 2:
- A couple of fixes from Haibo Chen to update SPI NOR TX bus width for i.MX6 and i.MX8 boards. This becomes necessary because spi-nor driver starts using the setting in DT. - Mark buck2 always-on for i.MX8MM Kontron-n801x-som board to avoid the core supply being turned off unexpectedly. - Fix eSDHC2 device tree settings for LS1028A SoC. - Disable GIC CPU interface before calling stby-poweroff sequence to fix power-off failure on i.MX6. - Fix M2_RST# GPIO pinmux on i.MX8M venice-gw7902 boards. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmFdm+0UHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM7LyAf/QS/9SEi7xwgmsE6ywozsk/VZB8Ze 77MSlR1U/HoqtreF9RNGB31Wv2TI0Cxi05TEbSonFDrk4rHFdh158YQZk8sINWOT AXIWso6qMqCA8onmHkTLgYKj2rFBdfzKffhdv/IhmIPW08DouFxRq1sHFOae0Dv4 Lo+4fhHqd3OYGPAi3Po9DgYOjJt7VujY7XRJJIrq3RMarxbXDAbpz7W12ioB/j1T x24jxEnaDfgpfNiCRoks2CEttnA28iIY3BXMH6J37ilFrKWTdyT45oIFe4bs8u7n ZRuwJs8W5FclRYVquXkDlh/i/h1YmxdDs80lseQl9G/dsZZ3oKxE+VpNrA== =Xtlw -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmFdwoIACgkQmmx57+YA GNkVjA//TPxAY3Egild9GdtZgUUMYsK8WDG54aia8UyL6G3v9z3x6kWs/kkWJSBv sF+3Tr9935BvhlQiAuzM/8DZ8whlTDdXCB1MVCLqQRBkccwEij9qdGhDhllQiVt3 bzMyFZgyr3e0GqsulD8bMkh6FE6i7Mm3f0FTe4XgW6TFreWz3mq1rz6I2UYtIn86 47gbxAHUPgcM6LXBEYmbRk16p6Y5vCF/IVXMZuz5cYEgGn2oxttLW2f3jSlSs6k0 xP9u7UCFSSnL1WCcq8NHBrKvAyv9GCxrXXoi/C1WxvtGp/FqftCucLgS5NsAdaf6 23KOzyzrpHDHeCsr8iN2jXoy/HTk5highh7qrKac4y/AcKQAtK9ljHVFBWiqAY2f D5wM3PZaLxTiiSamHumOniYqyp+BoMRqqCsVNh+elzvHOM8ODjwX/AQ6JAnnDsX1 T+LpKbUwRF5tpPaoA1AlS/kpe8bLAgqmcxXWOqoqF5TIc97so+Lce3MHA/c4druC K5/1vW9KH+1SaLif8NJr86hEZJ78sVyfUMNktT4qAMeDsAVBVt8z3zPH7HbOhFy5 VTLQj9otXnC2+35veqgBdg7rOA2fORv+LlS3gKBGC4am5ZO0GiqMn2xLpXB8S/yM JHoysZBwMjiV9wVc+LZ8vZG4XXMHBQYk9U1D7PIOwTjfC52O/+s= =lVwf -----END PGP SIGNATURE----- Merge tag 'imx-fixes-5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 5.15, round 2: - A couple of fixes from Haibo Chen to update SPI NOR TX bus width for i.MX6 and i.MX8 boards. This becomes necessary because spi-nor driver starts using the setting in DT. - Mark buck2 always-on for i.MX8MM Kontron-n801x-som board to avoid the core supply being turned off unexpectedly. - Fix eSDHC2 device tree settings for LS1028A SoC. - Disable GIC CPU interface before calling stby-poweroff sequence to fix power-off failure on i.MX6. - Fix M2_RST# GPIO pinmux on i.MX8M venice-gw7902 boards. * tag 'imx-fixes-5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: imx8m*-venice-gw7902: fix M2_RST# gpio ARM: imx6: disable the GIC CPU interface before calling stby-poweroff sequence arm64: dts: ls1028a: fix eSDHC2 node arm64: dts: imx8mm-kontron-n801x-som: do not allow to switch off buck2 arm64: dts: imx8: change the spi-nor tx ARM: dts: imx: change the spi-nor tx Link: https://lore.kernel.org/r/20211006125734.GA10197@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
2250596374
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@ -114,7 +114,7 @@
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compatible = "micron,n25q256a", "jedec,spi-nor";
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spi-max-frequency = <29000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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reg = <0>;
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};
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@ -124,7 +124,7 @@
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compatible = "micron,n25q256a", "jedec,spi-nor";
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spi-max-frequency = <29000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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reg = <2>;
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};
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};
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@ -292,7 +292,7 @@
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compatible = "micron,n25q256a", "jedec,spi-nor";
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spi-max-frequency = <29000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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reg = <0>;
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};
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};
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@ -10,6 +10,7 @@
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/genalloc.h>
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#include <linux/irqchip/arm-gic.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
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#include <linux/of.h>
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@ -619,6 +620,7 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata
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static void imx6_pm_stby_poweroff(void)
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{
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gic_cpu_if_down(0);
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imx6_set_lpm(STOP_POWER_OFF);
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imx6q_suspend_finish(0);
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@ -405,9 +405,9 @@
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interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <0>; /* fixed up by bootloader */
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clocks = <&clockgen QORIQ_CLK_HWACCEL 1>;
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voltage-ranges = <1800 1800 3300 3300>;
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voltage-ranges = <1800 1800>;
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sdhci,auto-cmd12;
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broken-cd;
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non-removable;
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little-endian;
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bus-width = <4>;
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status = "disabled";
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@ -91,7 +91,7 @@
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <80000000>;
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spi-tx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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};
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};
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@ -48,7 +48,7 @@
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <80000000>;
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spi-tx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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};
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};
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@ -102,6 +102,7 @@
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <950000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <3125>;
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nxp,dvs-run-voltage = <950000>;
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nxp,dvs-standby-voltage = <850000>;
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@ -647,7 +647,7 @@
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */
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MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x40000041 /* M2_RST# */
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MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RST# */
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MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */
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MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */
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MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x40000041 /* AMP GPIO1 */
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@ -101,7 +101,7 @@
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <80000000>;
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spi-tx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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};
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};
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@ -633,7 +633,7 @@
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX8MN_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */
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MX8MN_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x40000041 /* M2_RST# */
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MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RST# */
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MX8MN_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */
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MX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */
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MX8MN_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x40000041 /* APP GPIO1 */
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@ -74,7 +74,7 @@
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <80000000>;
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spi-tx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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};
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};
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@ -337,6 +337,8 @@
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#size-cells = <1>;
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compatible = "micron,n25q256a", "jedec,spi-nor";
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spi-max-frequency = <29000000>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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};
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};
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@ -281,7 +281,7 @@
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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spi-tx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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m25p,fast-read;
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spi-max-frequency = <50000000>;
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