drm/nouveau/gr/gf100-gk208: make use of init_gpc_mmu() hook to share setup
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
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2854ab8dd8
commit
223eaf4bf8
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@ -1903,25 +1903,33 @@ gf100_gr_new_(const struct gf100_gr_func *func, struct nvkm_device *device,
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return 0;
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}
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void
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gf100_gr_init_gpc_mmu(struct gf100_gr *gr)
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{
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struct nvkm_device *device = gr->base.engine.subdev.device;
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struct nvkm_fb *fb = device->fb;
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nvkm_wr32(device, 0x418880, 0x00000000);
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nvkm_wr32(device, 0x4188a4, 0x00000000);
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nvkm_wr32(device, 0x418888, 0x00000000);
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nvkm_wr32(device, 0x41888c, 0x00000000);
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nvkm_wr32(device, 0x418890, 0x00000000);
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nvkm_wr32(device, 0x418894, 0x00000000);
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nvkm_wr32(device, 0x4188b4, nvkm_memory_addr(fb->mmu_wr) >> 8);
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nvkm_wr32(device, 0x4188b8, nvkm_memory_addr(fb->mmu_rd) >> 8);
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}
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int
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gf100_gr_init(struct gf100_gr *gr)
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{
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struct nvkm_device *device = gr->base.engine.subdev.device;
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struct nvkm_fb *fb = device->fb;
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const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
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u32 data[TPC_MAX / 8] = {};
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u8 tpcnr[GPC_MAX];
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int gpc, tpc, rop;
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int i;
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nvkm_wr32(device, GPC_BCAST(0x0880), 0x00000000);
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nvkm_wr32(device, GPC_BCAST(0x08a4), 0x00000000);
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nvkm_wr32(device, GPC_BCAST(0x0888), 0x00000000);
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nvkm_wr32(device, GPC_BCAST(0x088c), 0x00000000);
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nvkm_wr32(device, GPC_BCAST(0x0890), 0x00000000);
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nvkm_wr32(device, GPC_BCAST(0x0894), 0x00000000);
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nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(fb->mmu_wr) >> 8);
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nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(fb->mmu_rd) >> 8);
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gr->func->init_gpc_mmu(gr);
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gf100_gr_mmio(gr, gr->func->mmio);
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@ -2036,6 +2044,7 @@ gf100_gr_gpccs_ucode = {
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static const struct gf100_gr_func
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gf100_gr = {
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.init = gf100_gr_init,
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.init_gpc_mmu = gf100_gr_init_gpc_mmu,
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.mmio = gf100_gr_pack_mmio,
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.fecs.ucode = &gf100_gr_fecs_ucode,
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.gpccs.ucode = &gf100_gr_gpccs_ucode,
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@ -254,6 +254,7 @@ extern const struct gf100_gr_init gf100_gr_init_mpc_0[];
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extern const struct gf100_gr_init gf100_gr_init_be_0[];
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extern const struct gf100_gr_init gf100_gr_init_fe_1[];
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extern const struct gf100_gr_init gf100_gr_init_pe_1[];
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void gf100_gr_init_gpc_mmu(struct gf100_gr *);
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extern const struct gf100_gr_init gf104_gr_init_ds_0[];
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extern const struct gf100_gr_init gf104_gr_init_tex_0[];
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@ -115,6 +115,7 @@ gf104_gr_pack_mmio[] = {
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static const struct gf100_gr_func
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gf104_gr = {
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.init = gf100_gr_init,
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.init_gpc_mmu = gf100_gr_init_gpc_mmu,
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.mmio = gf104_gr_pack_mmio,
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.fecs.ucode = &gf100_gr_fecs_ucode,
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.gpccs.ucode = &gf100_gr_gpccs_ucode,
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@ -106,6 +106,7 @@ gf108_gr_pack_mmio[] = {
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static const struct gf100_gr_func
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gf108_gr = {
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.init = gf100_gr_init,
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.init_gpc_mmu = gf100_gr_init_gpc_mmu,
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.mmio = gf108_gr_pack_mmio,
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.fecs.ucode = &gf100_gr_fecs_ucode,
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.gpccs.ucode = &gf100_gr_gpccs_ucode,
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@ -87,6 +87,7 @@ gf110_gr_pack_mmio[] = {
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static const struct gf100_gr_func
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gf110_gr = {
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.init = gf100_gr_init,
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.init_gpc_mmu = gf100_gr_init_gpc_mmu,
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.mmio = gf110_gr_pack_mmio,
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.fecs.ucode = &gf100_gr_fecs_ucode,
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.gpccs.ucode = &gf100_gr_gpccs_ucode,
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@ -123,6 +123,7 @@ gf117_gr_gpccs_ucode = {
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static const struct gf100_gr_func
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gf117_gr = {
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.init = gf100_gr_init,
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.init_gpc_mmu = gf100_gr_init_gpc_mmu,
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.mmio = gf117_gr_pack_mmio,
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.fecs.ucode = &gf117_gr_fecs_ucode,
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.gpccs.ucode = &gf117_gr_gpccs_ucode,
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@ -178,6 +178,7 @@ gf119_gr_pack_mmio[] = {
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static const struct gf100_gr_func
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gf119_gr = {
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.init = gf100_gr_init,
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.init_gpc_mmu = gf100_gr_init_gpc_mmu,
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.mmio = gf119_gr_pack_mmio,
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.fecs.ucode = &gf100_gr_fecs_ucode,
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.gpccs.ucode = &gf100_gr_gpccs_ucode,
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@ -24,8 +24,6 @@
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#include "gf100.h"
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#include "ctxgf100.h"
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#include <subdev/fb.h>
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#include <nvif/class.h>
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/*******************************************************************************
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@ -207,21 +205,13 @@ int
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gk104_gr_init(struct gf100_gr *gr)
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{
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struct nvkm_device *device = gr->base.engine.subdev.device;
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struct nvkm_fb *fb = device->fb;
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const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);
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u32 data[TPC_MAX / 8] = {};
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u8 tpcnr[GPC_MAX];
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int gpc, tpc, rop;
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int i;
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nvkm_wr32(device, GPC_BCAST(0x0880), 0x00000000);
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nvkm_wr32(device, GPC_BCAST(0x08a4), 0x00000000);
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nvkm_wr32(device, GPC_BCAST(0x0888), 0x00000000);
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nvkm_wr32(device, GPC_BCAST(0x088c), 0x00000000);
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nvkm_wr32(device, GPC_BCAST(0x0890), 0x00000000);
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nvkm_wr32(device, GPC_BCAST(0x0894), 0x00000000);
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nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(fb->mmu_wr) >> 8);
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nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(fb->mmu_rd) >> 8);
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gr->func->init_gpc_mmu(gr);
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gf100_gr_mmio(gr, gr->func->mmio);
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@ -339,6 +329,7 @@ gk104_gr_gpccs_ucode = {
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static const struct gf100_gr_func
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gk104_gr = {
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.init = gk104_gr_init,
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.init_gpc_mmu = gf100_gr_init_gpc_mmu,
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.init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.mmio = gk104_gr_pack_mmio,
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@ -183,6 +183,7 @@ gk110_gr_gpccs_ucode = {
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static const struct gf100_gr_func
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gk110_gr = {
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.init = gk104_gr_init,
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.init_gpc_mmu = gf100_gr_init_gpc_mmu,
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.init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.mmio = gk110_gr_pack_mmio,
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@ -103,6 +103,7 @@ gk110b_gr_pack_mmio[] = {
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static const struct gf100_gr_func
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gk110b_gr = {
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.init = gk104_gr_init,
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.init_gpc_mmu = gf100_gr_init_gpc_mmu,
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.init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.mmio = gk110b_gr_pack_mmio,
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@ -162,6 +162,7 @@ gk208_gr_gpccs_ucode = {
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static const struct gf100_gr_func
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gk208_gr = {
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.init = gk104_gr_init,
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.init_gpc_mmu = gf100_gr_init_gpc_mmu,
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.init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.mmio = gk208_gr_pack_mmio,
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