crypto: omap-aes - error handling implementation improved
Previous version had not error handling. Request could remain uncompleted. Also in the case of DMA error, FLAGS_INIT is unset and accelerator will be initialized again. Buffer size allignment is checked. Signed-off-by: Dmitry Kasatkin <dmitry.kasatkin@nokia.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Dmitry Kasatkin
Herbert Xu
parent
eeb2b202c5
commit
21fe9767f3
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@ -103,14 +103,16 @@ struct omap_aes_dev {
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struct omap_aes_ctx *ctx;
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struct device *dev;
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unsigned long flags;
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int err;
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u32 *iv;
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u32 ctrl;
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spinlock_t lock;
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struct crypto_queue queue;
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spinlock_t lock;
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struct crypto_queue queue;
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struct tasklet_struct task;
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struct tasklet_struct done_task;
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struct tasklet_struct queue_task;
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struct ablkcipher_request *req;
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size_t total;
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@ -198,24 +200,30 @@ static int omap_aes_hw_init(struct omap_aes_dev *dd)
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return -ETIMEDOUT;
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}
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dd->flags |= FLAGS_INIT;
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dd->err = 0;
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}
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return 0;
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}
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static void omap_aes_write_ctrl(struct omap_aes_dev *dd)
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static int omap_aes_write_ctrl(struct omap_aes_dev *dd)
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{
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unsigned int key32;
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int i;
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int i, err, init = dd->flags & FLAGS_INIT;
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u32 val, mask;
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err = omap_aes_hw_init(dd);
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if (err)
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return err;
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val = FLD_VAL(((dd->ctx->keylen >> 3) - 1), 4, 3);
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if (dd->flags & FLAGS_CBC)
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val |= AES_REG_CTRL_CBC;
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if (dd->flags & FLAGS_ENCRYPT)
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val |= AES_REG_CTRL_DIRECTION;
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if (dd->ctrl == val && !(dd->flags & FLAGS_NEW_IV) &&
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/* check if hw state & mode have not changed */
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if (init && dd->ctrl == val && !(dd->flags & FLAGS_NEW_IV) &&
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!(dd->ctx->flags & FLAGS_NEW_KEY))
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goto out;
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@ -257,6 +265,8 @@ out:
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/* start DMA or disable idle mode */
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omap_aes_write_mask(dd, AES_REG_MASK, AES_REG_MASK_START,
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AES_REG_MASK_START);
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return 0;
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}
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static struct omap_aes_dev *omap_aes_find_dev(struct omap_aes_ctx *ctx)
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@ -284,8 +294,16 @@ static void omap_aes_dma_callback(int lch, u16 ch_status, void *data)
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{
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struct omap_aes_dev *dd = data;
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if (lch == dd->dma_lch_out)
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tasklet_schedule(&dd->task);
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if (ch_status != OMAP_DMA_BLOCK_IRQ) {
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pr_err("omap-aes DMA error status: 0x%hx\n", ch_status);
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dd->err = -EIO;
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dd->flags &= ~FLAGS_INIT; /* request to re-initialize */
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} else if (lch == dd->dma_lch_in) {
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return;
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}
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/* dma_lch_out - completed */
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tasklet_schedule(&dd->done_task);
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}
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static int omap_aes_dma_init(struct omap_aes_dev *dd)
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@ -390,6 +408,11 @@ static int sg_copy(struct scatterlist **sg, size_t *offset, void *buf,
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if (!count)
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return off;
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/*
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* buflen and total are AES_BLOCK_SIZE size aligned,
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* so count should be also aligned
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*/
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sg_copy_buf(buf + off, *sg, *offset, count, out);
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off += count;
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@ -415,6 +438,7 @@ static int omap_aes_crypt_dma(struct crypto_tfm *tfm, dma_addr_t dma_addr_in,
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struct omap_aes_ctx *ctx = crypto_tfm_ctx(tfm);
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struct omap_aes_dev *dd = ctx->dd;
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int len32;
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int err;
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pr_debug("len: %d\n", length);
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@ -454,11 +478,13 @@ static int omap_aes_crypt_dma(struct crypto_tfm *tfm, dma_addr_t dma_addr_in,
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omap_set_dma_dest_params(dd->dma_lch_out, 0, OMAP_DMA_AMODE_POST_INC,
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dma_addr_out, 0, 0);
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err = omap_aes_write_ctrl(dd);
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if (err)
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return err;
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omap_start_dma(dd->dma_lch_in);
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omap_start_dma(dd->dma_lch_out);
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omap_aes_write_ctrl(dd);
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return 0;
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}
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@ -484,8 +510,10 @@ static int omap_aes_crypt_dma_start(struct omap_aes_dev *dd)
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count = min(dd->total, sg_dma_len(dd->in_sg));
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count = min(count, sg_dma_len(dd->out_sg));
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if (count != dd->total)
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if (count != dd->total) {
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pr_err("request length != buffer length\n");
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return -EINVAL;
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}
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pr_debug("fast\n");
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@ -521,25 +549,28 @@ static int omap_aes_crypt_dma_start(struct omap_aes_dev *dd)
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dd->total -= count;
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err = omap_aes_hw_init(dd);
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err = omap_aes_crypt_dma(tfm, addr_in, addr_out, count);
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if (err) {
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dma_unmap_sg(dd->dev, dd->in_sg, 1, DMA_TO_DEVICE);
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dma_unmap_sg(dd->dev, dd->out_sg, 1, DMA_TO_DEVICE);
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}
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return err;
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}
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static void omap_aes_finish_req(struct omap_aes_dev *dd, int err)
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{
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struct ablkcipher_request *req = dd->req;
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struct omap_aes_ctx *ctx;
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pr_debug("err: %d\n", err);
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dd->flags &= ~FLAGS_BUSY;
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ctx = crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(dd->req));
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ctx = crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req));
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if (!dd->total)
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dd->req->base.complete(&dd->req->base, err);
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if (req->base.complete)
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req->base.complete(&req->base, err);
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}
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static int omap_aes_crypt_dma_stop(struct omap_aes_dev *dd)
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@ -551,11 +582,11 @@ static int omap_aes_crypt_dma_stop(struct omap_aes_dev *dd)
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omap_aes_write_mask(dd, AES_REG_MASK, 0, AES_REG_MASK_START);
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clk_disable(dd->iclk);
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omap_stop_dma(dd->dma_lch_in);
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omap_stop_dma(dd->dma_lch_out);
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clk_disable(dd->iclk);
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if (dd->flags & FLAGS_FAST) {
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dma_unmap_sg(dd->dev, dd->out_sg, 1, DMA_FROM_DEVICE);
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dma_unmap_sg(dd->dev, dd->in_sg, 1, DMA_TO_DEVICE);
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@ -572,27 +603,24 @@ static int omap_aes_crypt_dma_stop(struct omap_aes_dev *dd)
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}
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}
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if (err || !dd->total)
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omap_aes_finish_req(dd, err);
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return err;
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}
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static int omap_aes_handle_req(struct omap_aes_dev *dd,
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static int omap_aes_handle_queue(struct omap_aes_dev *dd,
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struct ablkcipher_request *req)
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{
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struct crypto_async_request *async_req, *backlog;
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struct omap_aes_ctx *ctx;
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struct omap_aes_reqctx *rctx;
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unsigned long flags;
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int err = 0;
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int err, ret = 0;
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spin_lock_irqsave(&dd->lock, flags);
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if (req)
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err = ablkcipher_enqueue_request(&dd->queue, req);
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ret = ablkcipher_enqueue_request(&dd->queue, req);
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if (dd->flags & FLAGS_BUSY) {
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spin_unlock_irqrestore(&dd->lock, flags);
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return err;
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return ret;
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}
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backlog = crypto_get_backlog(&dd->queue);
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async_req = crypto_dequeue_request(&dd->queue);
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@ -601,7 +629,7 @@ static int omap_aes_handle_req(struct omap_aes_dev *dd,
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spin_unlock_irqrestore(&dd->lock, flags);
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if (!async_req)
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return 0;
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return ret;
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if (backlog)
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backlog->complete(backlog, -EINPROGRESS);
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@ -636,30 +664,46 @@ static int omap_aes_handle_req(struct omap_aes_dev *dd,
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ctx->flags |= FLAGS_NEW_KEY;
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}
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if (!IS_ALIGNED(req->nbytes, AES_BLOCK_SIZE))
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pr_err("request size is not exact amount of AES blocks\n");
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err = omap_aes_crypt_dma_start(dd);
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if (err) {
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/* aes_task will not finish it, so do it here */
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omap_aes_finish_req(dd, err);
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tasklet_schedule(&dd->queue_task);
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}
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omap_aes_crypt_dma_start(dd);
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return err;
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return ret; /* return ret, which is enqueue return value */
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}
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static void omap_aes_task(unsigned long data)
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static void omap_aes_done_task(unsigned long data)
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{
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struct omap_aes_dev *dd = (struct omap_aes_dev *)data;
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int err;
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pr_debug("enter\n");
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omap_aes_crypt_dma_stop(dd);
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err = omap_aes_crypt_dma_stop(dd);
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if (dd->total)
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omap_aes_crypt_dma_start(dd);
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else
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omap_aes_handle_req(dd, NULL);
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err = dd->err ? : err;
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if (dd->total && !err) {
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err = omap_aes_crypt_dma_start(dd);
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if (!err)
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return; /* DMA started. Not fininishing. */
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}
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omap_aes_finish_req(dd, err);
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omap_aes_handle_queue(dd, NULL);
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pr_debug("exit\n");
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}
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static void omap_aes_queue_task(unsigned long data)
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{
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struct omap_aes_dev *dd = (struct omap_aes_dev *)data;
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omap_aes_handle_queue(dd, NULL);
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}
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static int omap_aes_crypt(struct ablkcipher_request *req, unsigned long mode)
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{
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struct omap_aes_ctx *ctx = crypto_ablkcipher_ctx(
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@ -671,13 +715,18 @@ static int omap_aes_crypt(struct ablkcipher_request *req, unsigned long mode)
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!!(mode & FLAGS_ENCRYPT),
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!!(mode & FLAGS_CBC));
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if (!IS_ALIGNED(req->nbytes, AES_BLOCK_SIZE)) {
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pr_err("request size is not exact amount of AES blocks\n");
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return -EINVAL;
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}
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dd = omap_aes_find_dev(ctx);
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if (!dd)
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return -ENODEV;
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rctx->mode = mode;
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return omap_aes_handle_req(dd, req);
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return omap_aes_handle_queue(dd, req);
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}
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/* ********************** ALG API ************************************ */
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@ -843,7 +892,8 @@ static int omap_aes_probe(struct platform_device *pdev)
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(reg & AES_REG_REV_MAJOR) >> 4, reg & AES_REG_REV_MINOR);
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clk_disable(dd->iclk);
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tasklet_init(&dd->task, omap_aes_task, (unsigned long)dd);
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tasklet_init(&dd->done_task, omap_aes_done_task, (unsigned long)dd);
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tasklet_init(&dd->queue_task, omap_aes_queue_task, (unsigned long)dd);
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err = omap_aes_dma_init(dd);
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if (err)
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@ -870,7 +920,8 @@ err_algs:
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crypto_unregister_alg(&algs[j]);
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omap_aes_dma_cleanup(dd);
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err_dma:
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tasklet_kill(&dd->task);
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tasklet_kill(&dd->done_task);
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tasklet_kill(&dd->queue_task);
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iounmap(dd->io_base);
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err_io:
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clk_put(dd->iclk);
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@ -897,7 +948,8 @@ static int omap_aes_remove(struct platform_device *pdev)
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for (i = 0; i < ARRAY_SIZE(algs); i++)
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crypto_unregister_alg(&algs[i]);
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tasklet_kill(&dd->task);
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tasklet_kill(&dd->done_task);
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tasklet_kill(&dd->queue_task);
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omap_aes_dma_cleanup(dd);
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iounmap(dd->io_base);
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clk_put(dd->iclk);
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