mtd: spi-nor: Add Micron MT25QL02 support
Add an entry for Micron MT25QL02 which is a 3V variant of already supported MT25QU02. Testing was done on a ZII VF610 Dev Board (rev. B). Signed-off-by: Cory Tusar <cory.tusar@pid1solutions.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Tudor Ambarus <tudor.ambarus@microchip.com> Cc: linux-mtd@lists.infradead.org Cc: linux-kernel@vger.kernel.org [tudor.ambarus@microchip.com: order entry alphabetically, wrap to 80 chars limit] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
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@ -1880,6 +1880,9 @@ static const struct flash_info spi_nor_ids[] = {
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{ "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
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{ "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
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{ "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
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{ "mt25ql02g", INFO(0x20ba22, 0, 64 * 1024, 4096,
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SECT_4K | USE_FSR | SPI_NOR_QUAD_READ |
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NO_CHIP_ERASE) },
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{ "mt25qu02g", INFO(0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
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/* Micron */
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