sfc: commonise PCI error handlers
EF100 will use the same mechanisms for PCI error recovery. Signed-off-by: Edward Cree <ecree@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Edward Cree
David S. Miller
parent
66a65128d4
commit
21ea21252e
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@ -1490,97 +1490,6 @@ static const struct dev_pm_ops efx_pm_ops = {
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.restore = efx_pm_resume,
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};
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/* A PCI error affecting this device was detected.
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* At this point MMIO and DMA may be disabled.
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* Stop the software path and request a slot reset.
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*/
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static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
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enum pci_channel_state state)
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{
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pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
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struct efx_nic *efx = pci_get_drvdata(pdev);
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if (state == pci_channel_io_perm_failure)
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return PCI_ERS_RESULT_DISCONNECT;
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rtnl_lock();
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if (efx->state != STATE_DISABLED) {
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efx->state = STATE_RECOVERY;
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efx->reset_pending = 0;
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efx_device_detach_sync(efx);
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efx_stop_all(efx);
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efx_disable_interrupts(efx);
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status = PCI_ERS_RESULT_NEED_RESET;
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} else {
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/* If the interface is disabled we don't want to do anything
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* with it.
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*/
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status = PCI_ERS_RESULT_RECOVERED;
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}
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rtnl_unlock();
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pci_disable_device(pdev);
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return status;
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}
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/* Fake a successful reset, which will be performed later in efx_io_resume. */
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static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
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{
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struct efx_nic *efx = pci_get_drvdata(pdev);
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pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
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if (pci_enable_device(pdev)) {
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netif_err(efx, hw, efx->net_dev,
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"Cannot re-enable PCI device after reset.\n");
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status = PCI_ERS_RESULT_DISCONNECT;
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}
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return status;
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}
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/* Perform the actual reset and resume I/O operations. */
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static void efx_io_resume(struct pci_dev *pdev)
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{
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struct efx_nic *efx = pci_get_drvdata(pdev);
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int rc;
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rtnl_lock();
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if (efx->state == STATE_DISABLED)
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goto out;
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rc = efx_reset(efx, RESET_TYPE_ALL);
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if (rc) {
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netif_err(efx, hw, efx->net_dev,
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"efx_reset failed after PCI error (%d)\n", rc);
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} else {
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efx->state = STATE_READY;
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netif_dbg(efx, hw, efx->net_dev,
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"Done resetting and resuming IO after PCI error.\n");
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}
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out:
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rtnl_unlock();
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}
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/* For simplicity and reliability, we always require a slot reset and try to
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* reset the hardware when a pci error affecting the device is detected.
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* We leave both the link_reset and mmio_enabled callback unimplemented:
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* with our request for slot reset the mmio_enabled callback will never be
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* called, and the link_reset callback is not used by AER or EEH mechanisms.
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*/
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static const struct pci_error_handlers efx_err_handlers = {
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.error_detected = efx_io_error_detected,
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.slot_reset = efx_io_slot_reset,
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.resume = efx_io_resume,
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};
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static struct pci_driver efx_pci_driver = {
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.name = KBUILD_MODNAME,
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.id_table = efx_pci_table,
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@ -1130,3 +1130,94 @@ void efx_fini_mcdi_logging(struct efx_nic *efx)
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device_remove_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
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}
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#endif
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/* A PCI error affecting this device was detected.
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* At this point MMIO and DMA may be disabled.
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* Stop the software path and request a slot reset.
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*/
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static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
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enum pci_channel_state state)
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{
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pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
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struct efx_nic *efx = pci_get_drvdata(pdev);
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if (state == pci_channel_io_perm_failure)
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return PCI_ERS_RESULT_DISCONNECT;
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rtnl_lock();
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if (efx->state != STATE_DISABLED) {
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efx->state = STATE_RECOVERY;
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efx->reset_pending = 0;
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efx_device_detach_sync(efx);
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efx_stop_all(efx);
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efx_disable_interrupts(efx);
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status = PCI_ERS_RESULT_NEED_RESET;
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} else {
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/* If the interface is disabled we don't want to do anything
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* with it.
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*/
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status = PCI_ERS_RESULT_RECOVERED;
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}
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rtnl_unlock();
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pci_disable_device(pdev);
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return status;
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}
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/* Fake a successful reset, which will be performed later in efx_io_resume. */
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static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
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{
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struct efx_nic *efx = pci_get_drvdata(pdev);
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pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
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if (pci_enable_device(pdev)) {
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netif_err(efx, hw, efx->net_dev,
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"Cannot re-enable PCI device after reset.\n");
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status = PCI_ERS_RESULT_DISCONNECT;
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}
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return status;
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}
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/* Perform the actual reset and resume I/O operations. */
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static void efx_io_resume(struct pci_dev *pdev)
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{
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struct efx_nic *efx = pci_get_drvdata(pdev);
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int rc;
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rtnl_lock();
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if (efx->state == STATE_DISABLED)
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goto out;
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rc = efx_reset(efx, RESET_TYPE_ALL);
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if (rc) {
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netif_err(efx, hw, efx->net_dev,
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"efx_reset failed after PCI error (%d)\n", rc);
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} else {
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efx->state = STATE_READY;
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netif_dbg(efx, hw, efx->net_dev,
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"Done resetting and resuming IO after PCI error.\n");
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}
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out:
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rtnl_unlock();
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}
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/* For simplicity and reliability, we always require a slot reset and try to
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* reset the hardware when a pci error affecting the device is detected.
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* We leave both the link_reset and mmio_enabled callback unimplemented:
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* with our request for slot reset the mmio_enabled callback will never be
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* called, and the link_reset callback is not used by AER or EEH mechanisms.
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*/
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const struct pci_error_handlers efx_err_handlers = {
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.error_detected = efx_io_error_detected,
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.slot_reset = efx_io_slot_reset,
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.resume = efx_io_resume,
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};
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@ -73,4 +73,5 @@ void efx_link_status_changed(struct efx_nic *efx);
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unsigned int efx_xdp_max_mtu(struct efx_nic *efx);
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int efx_change_mtu(struct net_device *net_dev, int new_mtu);
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extern const struct pci_error_handlers efx_err_handlers;
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#endif
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