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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6 

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (79 commits)
  [X25]: Use proc_create() to setup ->proc_fops first
  [WANROUTER]: Use proc_create() to setup ->proc_fops first
  [8021Q]: Use proc_create() to setup ->proc_fops first
  [IPV4]: Use proc_create() to setup ->proc_fops first
  [IPV6]: Use proc_create() to setup ->proc_fops first
  [SCTP]: Use proc_create() to setup ->proc_fops first
  [PKTGEN]: Use proc_create() to setup ->proc_fops first
  [NEIGHBOUR]: Use proc_create() to setup ->proc_fops first
  [LLC]: Use proc_create() to setup ->proc_fops first
  [IPX]: Use proc_create() to setup ->proc_fops first
  [SUNRPC]: Use proc_create() to setup ->proc_fops first
  [ATM]: Use proc_create() to setup ->proc_fops first
  [SCTP]: Update AUTH structures to match declarations in draft-16.
  [SCTP]: Incorrect length was used in SCTP_*_AUTH_CHUNKS socket option
  [SCTP]: Clean up naming conventions of sctp protocol/address family registration
  [APPLETALK]: Use proc_create() to setup ->proc_fops first
  [BNX2X]: add bnx2x to MAINTAINERS
  [BNX2X]: update version, remove CVS strings
  [BNX2X]: Fix Xmit bugs
  [BNX2X]: Prevent PCI queue overflow
  ...
This commit is contained in:
Linus Torvalds 2008-02-29 08:29:55 -08:00
parent 547598d3a9 2335f8ec27
commit 219ff3ad61
101 changed files with 3091 additions and 1591 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
MAINTAINERS
View File

@ -982,6 +982,12 @@ M: mchan@broadcom.com
L: netdev@vger.kernel.org
S: Supported
BROADCOM BNX2X 10 GIGABIT ETHERNET DRIVER
P: Eliezer Tamir
M: eliezert@broadcom.com
L: netdev@vger.kernel.org
S: Supported
BROADCOM TG3 GIGABIT ETHERNET DRIVER
P: Michael Chan
M: mchan@broadcom.com
@ -3886,10 +3892,13 @@ M: trivial@kernel.org
L: linux-kernel@vger.kernel.org
S: Maintained
TULIP NETWORK DRIVER
L: tulip-users@lists.sourceforge.net
W: http://sourceforge.net/projects/tulip/
S: Orphan
TULIP NETWORK DRIVERS
P: Grant Grundler
M: grundler@parisc-linux.org
P: Kyle McMartin
M: kyle@parisc-linux.org
L: netdev@vger.kernel.org
S: Maintained
TUN/TAP driver
P: Maxim Krasnyansky

2
drivers/connector/connector.c
View File

@ -47,7 +47,7 @@ static LIST_HEAD(notify_list);
static struct cn_dev cdev;
int cn_already_initialized = 0;
static int cn_already_initialized;
/*
* msg->seq and msg->ack are used to determine message genealogy.

6
drivers/net/Kconfig
View File

@ -90,6 +90,11 @@ config MACVLAN
This allows one to create virtual interfaces that map packets to
or from specific MAC addresses to a particular interface.
Macvlan devices can be added using the "ip" command from the
iproute2 package starting with the iproute2-2.6.23 release:
"ip link add link <real dev> [ address MAC ] [ NAME ] type macvlan"
To compile this driver as a module, choose M here: the module
will be called macvlan.
@ -2363,6 +2368,7 @@ config GELIC_NET
config GELIC_WIRELESS
bool "PS3 Wireless support"
depends on GELIC_NET
select WIRELESS_EXT
help
This option adds the support for the wireless feature of PS3.
If you have the wireless-less model of PS3 or have no plan to

2667
drivers/net/bnx2x.c
View File

File diff suppressed because it is too large Load Diff

56
drivers/net/bnx2x.h
View File

@ -1,6 +1,6 @@
/* bnx2x.h: Broadcom Everest network driver.
*
* Copyright (c) 2007 Broadcom Corporation
* Copyright (c) 2007-2008 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -24,6 +24,8 @@
#define BNX2X_MSG_STATS 0x20000 /* was: NETIF_MSG_TIMER */
#define NETIF_MSG_NVM 0x40000 /* was: NETIF_MSG_HW */
#define NETIF_MSG_DMAE 0x80000 /* was: NETIF_MSG_HW */
#define BNX2X_MSG_SP 0x100000 /* was: NETIF_MSG_INTR */
#define BNX2X_MSG_FP 0x200000 /* was: NETIF_MSG_INTR */
#define DP_LEVEL KERN_NOTICE /* was: KERN_DEBUG */
@ -40,6 +42,12 @@
__LINE__, bp->dev?(bp->dev->name):"?", ##__args); \
} while (0)
/* for logging (never masked) */
#define BNX2X_LOG(__fmt, __args...) do { \
printk(KERN_NOTICE "[%s:%d(%s)]" __fmt, __FUNCTION__, \
__LINE__, bp->dev?(bp->dev->name):"?", ##__args); \
} while (0)
/* before we have a dev->name use dev_info() */
#define BNX2X_DEV_INFO(__fmt, __args...) do { \
if (bp->msglevel & NETIF_MSG_PROBE) \
@ -423,8 +431,6 @@ struct bnx2x_fastpath {
#define BNX2X_FP_STATE_OPEN 0xa0000
#define BNX2X_FP_STATE_HALTING 0xb0000
#define BNX2X_FP_STATE_HALTED 0xc0000
#define BNX2X_FP_STATE_DELETED 0xd0000
#define BNX2X_FP_STATE_CLOSE_IRQ 0xe0000
int index;
@ -505,7 +511,6 @@ struct bnx2x {
struct eth_spe *spq;
dma_addr_t spq_mapping;
u16 spq_prod_idx;
u16 dsb_sp_prod_idx;
struct eth_spe *spq_prod_bd;
struct eth_spe *spq_last_bd;
u16 *dsb_sp_prod;
@ -517,7 +522,7 @@ struct bnx2x {
*/
u8 stat_pending;
/* End of fileds used in the performance code paths */
/* End of fields used in the performance code paths */
int panic;
int msglevel;
@ -540,8 +545,6 @@ struct bnx2x {
spinlock_t phy_lock;
struct work_struct reset_task;
u16 in_reset_task;
struct work_struct sp_task;
struct timer_list timer;
@ -555,7 +558,6 @@ struct bnx2x {
#define CHIP_ID(bp) (((bp)->chip_id) & 0xfffffff0)
#define CHIP_NUM(bp) (((bp)->chip_id) & 0xffff0000)
#define CHIP_NUM_5710 0x57100000
#define CHIP_REV(bp) (((bp)->chip_id) & 0x0000f000)
#define CHIP_REV_Ax 0x00000000
@ -574,7 +576,8 @@ struct bnx2x {
u32 fw_mb;
u32 hw_config;
u32 serdes_config;
u32 board;
u32 serdes_config;
u32 lane_config;
u32 ext_phy_config;
#define XGXS_EXT_PHY_TYPE(bp) (bp->ext_phy_config & \
@ -595,11 +598,11 @@ struct bnx2x {
u8 tx_lane_swap;
u8 link_up;
u8 phy_link_up;
u32 supported;
/* link settings - missing defines */
#define SUPPORTED_2500baseT_Full (1 << 15)
#define SUPPORTED_CX4 (1 << 16)
u32 phy_flags;
/*#define PHY_SERDES_FLAG 0x1*/
@ -644,16 +647,9 @@ struct bnx2x {
#define FLOW_CTRL_BOTH PORT_FEATURE_FLOW_CONTROL_BOTH
#define FLOW_CTRL_NONE PORT_FEATURE_FLOW_CONTROL_NONE
u32 pause_mode;
#define PAUSE_NONE 0
#define PAUSE_SYMMETRIC 1
#define PAUSE_ASYMMETRIC 2
#define PAUSE_BOTH 3
u32 advertising;
/* link settings - missing defines */
#define ADVERTISED_2500baseT_Full (1 << 15)
#define ADVERTISED_CX4 (1 << 16)
u32 link_status;
u32 line_speed;
@ -667,6 +663,8 @@ struct bnx2x {
#define NVRAM_TIMEOUT_COUNT 30000
#define NVRAM_PAGE_SIZE 256
u8 wol;
int rx_ring_size;
u16 tx_quick_cons_trip_int;
@ -718,9 +716,6 @@ struct bnx2x {
#endif
char *name;
u16 bus_speed_mhz;
u8 wol;
u8 pad;
/* used to synchronize stats collecting */
int stats_state;
@ -856,8 +851,8 @@ struct bnx2x {
#define MAX_SPQ_PENDING 8
#define BNX2X_NUM_STATS 31
#define BNX2X_NUM_TESTS 2
#define BNX2X_NUM_STATS 34
#define BNX2X_NUM_TESTS 1
#define DPM_TRIGER_TYPE 0x40
@ -867,6 +862,15 @@ struct bnx2x {
DPM_TRIGER_TYPE); \
} while (0)
/* PCIE link and speed */
#define PCICFG_LINK_WIDTH 0x1f00000
#define PCICFG_LINK_WIDTH_SHIFT 20
#define PCICFG_LINK_SPEED 0xf0000
#define PCICFG_LINK_SPEED_SHIFT 16
#define BMAC_CONTROL_RX_ENABLE 2
#define pbd_tcp_flags(skb) (ntohl(tcp_flag_word(tcp_hdr(skb)))>>16 & 0xff)
/* stuff added to make the code fit 80Col */
@ -939,13 +943,13 @@ struct bnx2x {
#define LINK_16GTFD LINK_STATUS_SPEED_AND_DUPLEX_16GTFD
#define LINK_16GXFD LINK_STATUS_SPEED_AND_DUPLEX_16GXFD
#define NIG_STATUS_INTERRUPT_XGXS0_LINK10G \
#define NIG_STATUS_XGXS0_LINK10G \
NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK10G
#define NIG_XGXS0_LINK_STATUS \
#define NIG_STATUS_XGXS0_LINK_STATUS \
NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK_STATUS
#define NIG_XGXS0_LINK_STATUS_SIZE \
#define NIG_STATUS_XGXS0_LINK_STATUS_SIZE \
NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_XGXS0_LINK_STATUS_SIZE
#define NIG_SERDES0_LINK_STATUS \
#define NIG_STATUS_SERDES0_LINK_STATUS \
NIG_STATUS_INTERRUPT_PORT0_REG_STATUS_SERDES0_LINK_STATUS
#define NIG_MASK_MI_INT \
NIG_MASK_INTERRUPT_PORT0_REG_MASK_EMAC0_MISC_MI_INT

2
drivers/net/bnx2x_fw_defs.h
View File

@ -1,6 +1,6 @@
/* bnx2x_fw_defs.h: Broadcom Everest network driver.
*
* Copyright (c) 2007 Broadcom Corporation
* Copyright (c) 2007-2008 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by

428
drivers/net/bnx2x_hsi.h
View File

@ -1,6 +1,6 @@
/* bnx2x_hsi.h: Broadcom Everest network driver.
*
* Copyright (c) 2007 Broadcom Corporation
* Copyright (c) 2007-2008 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -8,169 +8,9 @@
*/
#define FUNC_0 0
#define FUNC_1 1
#define FUNC_MAX 2
/* This value (in milliseconds) determines the frequency of the driver
* issuing the PULSE message code. The firmware monitors this periodic
* pulse to determine when to switch to an OS-absent mode. */
#define DRV_PULSE_PERIOD_MS 250
/* This value (in milliseconds) determines how long the driver should
* wait for an acknowledgement from the firmware before timing out. Once
* the firmware has timed out, the driver will assume there is no firmware
* running and there won't be any firmware-driver synchronization during a
* driver reset. */
#define FW_ACK_TIME_OUT_MS 5000
#define FW_ACK_POLL_TIME_MS 1
#define FW_ACK_NUM_OF_POLL (FW_ACK_TIME_OUT_MS/FW_ACK_POLL_TIME_MS)
/* LED Blink rate that will achieve ~15.9Hz */
#define LED_BLINK_RATE_VAL 480
/****************************************************************************
* Driver <-> FW Mailbox *
****************************************************************************/
struct drv_fw_mb {
u32 drv_mb_header;
#define DRV_MSG_CODE_MASK 0xffff0000
#define DRV_MSG_CODE_LOAD_REQ 0x10000000
#define DRV_MSG_CODE_LOAD_DONE 0x11000000
#define DRV_MSG_CODE_UNLOAD_REQ_WOL_EN 0x20000000
#define DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS 0x20010000
#define DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP 0x20020000
#define DRV_MSG_CODE_UNLOAD_DONE 0x21000000
#define DRV_MSG_CODE_DIAG_ENTER_REQ 0x50000000
#define DRV_MSG_CODE_DIAG_EXIT_REQ 0x60000000
#define DRV_MSG_CODE_VALIDATE_KEY 0x70000000
#define DRV_MSG_CODE_GET_CURR_KEY 0x80000000
#define DRV_MSG_CODE_GET_UPGRADE_KEY 0x81000000
#define DRV_MSG_CODE_GET_MANUF_KEY 0x82000000
#define DRV_MSG_CODE_LOAD_L2B_PRAM 0x90000000
#define DRV_MSG_SEQ_NUMBER_MASK 0x0000ffff
u32 drv_mb_param;
u32 fw_mb_header;
#define FW_MSG_CODE_MASK 0xffff0000
#define FW_MSG_CODE_DRV_LOAD_COMMON 0x11000000
#define FW_MSG_CODE_DRV_LOAD_PORT 0x12000000
#define FW_MSG_CODE_DRV_LOAD_REFUSED 0x13000000
#define FW_MSG_CODE_DRV_LOAD_DONE 0x14000000
#define FW_MSG_CODE_DRV_UNLOAD_COMMON 0x21000000
#define FW_MSG_CODE_DRV_UNLOAD_PORT 0x22000000
#define FW_MSG_CODE_DRV_UNLOAD_DONE 0x23000000
#define FW_MSG_CODE_DIAG_ENTER_DONE 0x50000000
#define FW_MSG_CODE_DIAG_REFUSE 0x51000000
#define FW_MSG_CODE_VALIDATE_KEY_SUCCESS 0x70000000
#define FW_MSG_CODE_VALIDATE_KEY_FAILURE 0x71000000
#define FW_MSG_CODE_GET_KEY_DONE 0x80000000
#define FW_MSG_CODE_NO_KEY 0x8f000000
#define FW_MSG_CODE_LIC_INFO_NOT_READY 0x8f800000
#define FW_MSG_CODE_L2B_PRAM_LOADED 0x90000000
#define FW_MSG_CODE_L2B_PRAM_T_LOAD_FAILURE 0x91000000
#define FW_MSG_CODE_L2B_PRAM_C_LOAD_FAILURE 0x92000000
#define FW_MSG_CODE_L2B_PRAM_X_LOAD_FAILURE 0x93000000
#define FW_MSG_CODE_L2B_PRAM_U_LOAD_FAILURE 0x94000000
#define FW_MSG_SEQ_NUMBER_MASK 0x0000ffff
u32 fw_mb_param;
u32 link_status;
/* Driver should update this field on any link change event */
#define LINK_STATUS_LINK_FLAG_MASK 0x00000001
#define LINK_STATUS_LINK_UP 0x00000001
#define LINK_STATUS_SPEED_AND_DUPLEX_MASK 0x0000001E
#define LINK_STATUS_SPEED_AND_DUPLEX_AN_NOT_COMPLETE (0<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_10THD (1<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_10TFD (2<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_100TXHD (3<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_100T4 (4<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_100TXFD (5<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_1000THD (6<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_1000TFD (7<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_1000XFD (7<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_2500THD (8<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_2500TFD (9<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_2500XFD (9<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_10GTFD (10<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_10GXFD (10<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_12GTFD (11<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_12GXFD (11<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_12_5GTFD (12<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_12_5GXFD (12<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_13GTFD (13<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_13GXFD (13<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_15GTFD (14<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_15GXFD (14<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_16GTFD (15<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_16GXFD (15<<1)
#define LINK_STATUS_AUTO_NEGOTIATE_FLAG_MASK 0x00000020
#define LINK_STATUS_AUTO_NEGOTIATE_ENABLED 0x00000020
#define LINK_STATUS_AUTO_NEGOTIATE_COMPLETE 0x00000040
#define LINK_STATUS_PARALLEL_DETECTION_FLAG_MASK 0x00000080
#define LINK_STATUS_PARALLEL_DETECTION_USED 0x00000080
#define LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE 0x00000200
#define LINK_STATUS_LINK_PARTNER_1000THD_CAPABLE 0x00000400
#define LINK_STATUS_LINK_PARTNER_100T4_CAPABLE 0x00000800
#define LINK_STATUS_LINK_PARTNER_100TXFD_CAPABLE 0x00001000
#define LINK_STATUS_LINK_PARTNER_100TXHD_CAPABLE 0x00002000
#define LINK_STATUS_LINK_PARTNER_10TFD_CAPABLE 0x00004000
#define LINK_STATUS_LINK_PARTNER_10THD_CAPABLE 0x00008000
#define LINK_STATUS_TX_FLOW_CONTROL_FLAG_MASK 0x00010000
#define LINK_STATUS_TX_FLOW_CONTROL_ENABLED 0x00010000
#define LINK_STATUS_RX_FLOW_CONTROL_FLAG_MASK 0x00020000
#define LINK_STATUS_RX_FLOW_CONTROL_ENABLED 0x00020000
#define LINK_STATUS_LINK_PARTNER_FLOW_CONTROL_MASK 0x000C0000
#define LINK_STATUS_LINK_PARTNER_NOT_PAUSE_CAPABLE (0<<18)
#define LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE (1<<18)
#define LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE (2<<18)
#define LINK_STATUS_LINK_PARTNER_BOTH_PAUSE (3<<18)
#define LINK_STATUS_SERDES_LINK 0x00100000
#define LINK_STATUS_LINK_PARTNER_2500XFD_CAPABLE 0x00200000
#define LINK_STATUS_LINK_PARTNER_2500XHD_CAPABLE 0x00400000
#define LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE 0x00800000
#define LINK_STATUS_LINK_PARTNER_12GXFD_CAPABLE 0x01000000
#define LINK_STATUS_LINK_PARTNER_12_5GXFD_CAPABLE 0x02000000
#define LINK_STATUS_LINK_PARTNER_13GXFD_CAPABLE 0x04000000
#define LINK_STATUS_LINK_PARTNER_15GXFD_CAPABLE 0x08000000
#define LINK_STATUS_LINK_PARTNER_16GXFD_CAPABLE 0x10000000
u32 drv_pulse_mb;
#define DRV_PULSE_SEQ_MASK 0x00007fff
#define DRV_PULSE_SYSTEM_TIME_MASK 0xffff0000
/* The system time is in the format of
* (year-2001)*12*32 + month*32 + day. */
#define DRV_PULSE_ALWAYS_ALIVE 0x00008000
/* Indicate to the firmware not to go into the
* OS-absent when it is not getting driver pulse.
* This is used for debugging as well for PXE(MBA). */
u32 mcp_pulse_mb;
#define MCP_PULSE_SEQ_MASK 0x00007fff
#define MCP_PULSE_ALWAYS_ALIVE 0x00008000
/* Indicates to the driver not to assert due to lack
* of MCP response */
#define MCP_EVENT_MASK 0xffff0000
#define MCP_EVENT_OTHER_DRIVER_RESET_REQ 0x00010000
};
#define PORT_0 0
#define PORT_1 1
#define PORT_MAX 2
/****************************************************************************
* Shared HW configuration *
@ -249,7 +89,7 @@ struct shared_hw_cfg { /* NVRAM Offset */
#define SHARED_HW_CFG_SMBUS_TIMING_100KHZ 0x00000000
#define SHARED_HW_CFG_SMBUS_TIMING_400KHZ 0x00001000
#define SHARED_HW_CFG_HIDE_FUNC1 0x00002000
#define SHARED_HW_CFG_HIDE_PORT1 0x00002000
u32 power_dissipated; /* 0x11c */
#define SHARED_HW_CFG_POWER_DIS_CMN_MASK 0xff000000
@ -290,6 +130,8 @@ struct shared_hw_cfg { /* NVRAM Offset */
#define SHARED_HW_CFG_BOARD_TYPE_BCM957710T1015G 0x00000006
#define SHARED_HW_CFG_BOARD_TYPE_BCM957710A1020G 0x00000007
#define SHARED_HW_CFG_BOARD_TYPE_BCM957710T1003G 0x00000008
#define SHARED_HW_CFG_BOARD_TYPE_BCM957710A1022G 0x00000009
#define SHARED_HW_CFG_BOARD_TYPE_BCM957710A1021G 0x0000000a
#define SHARED_HW_CFG_BOARD_VER_MASK 0xffff0000
#define SHARED_HW_CFG_BOARD_VER_SHIFT 16
@ -304,13 +146,12 @@ struct shared_hw_cfg { /* NVRAM Offset */
};
/****************************************************************************
* Port HW configuration *
****************************************************************************/
struct port_hw_cfg { /* function 0: 0x12c-0x2bb, function 1: 0x2bc-0x44b */
struct port_hw_cfg { /* port 0: 0x12c port 1: 0x2bc */
/* Fields below are port specific (in anticipation of dual port
devices */
u32 pci_id;
#define PORT_HW_CFG_PCI_VENDOR_ID_MASK 0xffff0000
#define PORT_HW_CFG_PCI_DEVICE_ID_MASK 0x0000ffff
@ -420,6 +261,8 @@ struct port_hw_cfg { /* function 0: 0x12c-0x2bb, function 1: 0x2bc-0x44b */
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8706 0x00000500
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8276 0x00000600
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8481 0x00000700
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101 0x00000800
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_FAILURE 0x0000fd00
#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN 0x0000ff00
#define PORT_HW_CFG_XGXS_EXT_PHY_ADDR_MASK 0x000000ff
@ -462,11 +305,13 @@ struct port_hw_cfg { /* function 0: 0x12c-0x2bb, function 1: 0x2bc-0x44b */
};
/****************************************************************************
* Shared Feature configuration *
****************************************************************************/
struct shared_feat_cfg { /* NVRAM Offset */
u32 bmc_common; /* 0x450 */
u32 config; /* 0x450 */
#define SHARED_FEATURE_BMC_ECHO_MODE_EN 0x00000001
};
@ -475,7 +320,8 @@ struct shared_feat_cfg { /* NVRAM Offset */
/****************************************************************************
* Port Feature configuration *
****************************************************************************/
struct port_feat_cfg { /* function 0: 0x454-0x4c7, function 1: 0x4c8-0x53b */
struct port_feat_cfg { /* port 0: 0x454 port 1: 0x4c8 */
u32 config;
#define PORT_FEATURE_BAR1_SIZE_MASK 0x0000000f
#define PORT_FEATURE_BAR1_SIZE_SHIFT 0
@ -609,8 +455,7 @@ struct port_feat_cfg { /* function 0: 0x454-0x4c7, function 1: 0x4c8-0x53b */
#define PORT_FEATURE_SMBUS_ADDR_MASK 0x000000fe
#define PORT_FEATURE_SMBUS_ADDR_SHIFT 1
u32 iscsib_boot_cfg;
#define PORT_FEATURE_ISCSIB_SKIP_TARGET_BOOT 0x00000001
u32 reserved1;
u32 link_config; /* Used as HW defaults for the driver */
#define PORT_FEATURE_CONNECTED_SWITCH_MASK 0x03000000
@ -657,20 +502,201 @@ struct port_feat_cfg { /* function 0: 0x454-0x4c7, function 1: 0x4c8-0x53b */
};
/*****************************************************************************
* Device Information *
*****************************************************************************/
struct dev_info { /* size */
u32 bc_rev; /* 8 bits each: major, minor, build */ /* 4 */
struct shared_hw_cfg shared_hw_config; /* 40 */
struct port_hw_cfg port_hw_config[PORT_MAX]; /* 400*2=800 */
struct shared_feat_cfg shared_feature_config; /* 4 */
struct port_feat_cfg port_feature_config[PORT_MAX]; /* 116*2=232 */
};
#define FUNC_0 0
#define FUNC_1 1
#define E1_FUNC_MAX 2
#define FUNC_MAX E1_FUNC_MAX
/* This value (in milliseconds) determines the frequency of the driver
* issuing the PULSE message code. The firmware monitors this periodic
* pulse to determine when to switch to an OS-absent mode. */
#define DRV_PULSE_PERIOD_MS 250
/* This value (in milliseconds) determines how long the driver should
* wait for an acknowledgement from the firmware before timing out. Once
* the firmware has timed out, the driver will assume there is no firmware
* running and there won't be any firmware-driver synchronization during a
* driver reset. */
#define FW_ACK_TIME_OUT_MS 5000
#define FW_ACK_POLL_TIME_MS 1
#define FW_ACK_NUM_OF_POLL (FW_ACK_TIME_OUT_MS/FW_ACK_POLL_TIME_MS)
/* LED Blink rate that will achieve ~15.9Hz */
#define LED_BLINK_RATE_VAL 480
/****************************************************************************
* Device Information *
* Driver <-> FW Mailbox *
****************************************************************************/
struct dev_info { /* size */
struct drv_port_mb {
u32 bc_rev; /* 8 bits each: major, minor, build */ /* 4 */
u32 link_status;
/* Driver should update this field on any link change event */
struct shared_hw_cfg shared_hw_config; /* 40 */
#define LINK_STATUS_LINK_FLAG_MASK 0x00000001
#define LINK_STATUS_LINK_UP 0x00000001
#define LINK_STATUS_SPEED_AND_DUPLEX_MASK 0x0000001E
#define LINK_STATUS_SPEED_AND_DUPLEX_AN_NOT_COMPLETE (0<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_10THD (1<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_10TFD (2<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_100TXHD (3<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_100T4 (4<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_100TXFD (5<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_1000THD (6<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_1000TFD (7<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_1000XFD (7<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_2500THD (8<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_2500TFD (9<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_2500XFD (9<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_10GTFD (10<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_10GXFD (10<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_12GTFD (11<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_12GXFD (11<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_12_5GTFD (12<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_12_5GXFD (12<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_13GTFD (13<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_13GXFD (13<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_15GTFD (14<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_15GXFD (14<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_16GTFD (15<<1)
#define LINK_STATUS_SPEED_AND_DUPLEX_16GXFD (15<<1)
struct port_hw_cfg port_hw_config[FUNC_MAX]; /* 400*2=800 */
#define LINK_STATUS_AUTO_NEGOTIATE_FLAG_MASK 0x00000020
#define LINK_STATUS_AUTO_NEGOTIATE_ENABLED 0x00000020
struct shared_feat_cfg shared_feature_config; /* 4 */
#define LINK_STATUS_AUTO_NEGOTIATE_COMPLETE 0x00000040
#define LINK_STATUS_PARALLEL_DETECTION_FLAG_MASK 0x00000080
#define LINK_STATUS_PARALLEL_DETECTION_USED 0x00000080
struct port_feat_cfg port_feature_config[FUNC_MAX];/* 116*2=232 */
#define LINK_STATUS_LINK_PARTNER_1000TFD_CAPABLE 0x00000200
#define LINK_STATUS_LINK_PARTNER_1000THD_CAPABLE 0x00000400
#define LINK_STATUS_LINK_PARTNER_100T4_CAPABLE 0x00000800
#define LINK_STATUS_LINK_PARTNER_100TXFD_CAPABLE 0x00001000
#define LINK_STATUS_LINK_PARTNER_100TXHD_CAPABLE 0x00002000
#define LINK_STATUS_LINK_PARTNER_10TFD_CAPABLE 0x00004000
#define LINK_STATUS_LINK_PARTNER_10THD_CAPABLE 0x00008000
#define LINK_STATUS_TX_FLOW_CONTROL_FLAG_MASK 0x00010000
#define LINK_STATUS_TX_FLOW_CONTROL_ENABLED 0x00010000
#define LINK_STATUS_RX_FLOW_CONTROL_FLAG_MASK 0x00020000
#define LINK_STATUS_RX_FLOW_CONTROL_ENABLED 0x00020000
#define LINK_STATUS_LINK_PARTNER_FLOW_CONTROL_MASK 0x000C0000
#define LINK_STATUS_LINK_PARTNER_NOT_PAUSE_CAPABLE (0<<18)
#define LINK_STATUS_LINK_PARTNER_SYMMETRIC_PAUSE (1<<18)
#define LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE (2<<18)
#define LINK_STATUS_LINK_PARTNER_BOTH_PAUSE (3<<18)
#define LINK_STATUS_SERDES_LINK 0x00100000
#define LINK_STATUS_LINK_PARTNER_2500XFD_CAPABLE 0x00200000
#define LINK_STATUS_LINK_PARTNER_2500XHD_CAPABLE 0x00400000
#define LINK_STATUS_LINK_PARTNER_10GXFD_CAPABLE 0x00800000
#define LINK_STATUS_LINK_PARTNER_12GXFD_CAPABLE 0x01000000
#define LINK_STATUS_LINK_PARTNER_12_5GXFD_CAPABLE 0x02000000
#define LINK_STATUS_LINK_PARTNER_13GXFD_CAPABLE 0x04000000
#define LINK_STATUS_LINK_PARTNER_15GXFD_CAPABLE 0x08000000
#define LINK_STATUS_LINK_PARTNER_16GXFD_CAPABLE 0x10000000
u32 reserved[3];
};
struct drv_func_mb {
u32 drv_mb_header;
#define DRV_MSG_CODE_MASK 0xffff0000
#define DRV_MSG_CODE_LOAD_REQ 0x10000000
#define DRV_MSG_CODE_LOAD_DONE 0x11000000
#define DRV_MSG_CODE_UNLOAD_REQ_WOL_EN 0x20000000
#define DRV_MSG_CODE_UNLOAD_REQ_WOL_DIS 0x20010000
#define DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP 0x20020000
#define DRV_MSG_CODE_UNLOAD_DONE 0x21000000
#define DRV_MSG_CODE_DIAG_ENTER_REQ 0x50000000
#define DRV_MSG_CODE_DIAG_EXIT_REQ 0x60000000
#define DRV_MSG_CODE_VALIDATE_KEY 0x70000000
#define DRV_MSG_CODE_GET_CURR_KEY 0x80000000
#define DRV_MSG_CODE_GET_UPGRADE_KEY 0x81000000
#define DRV_MSG_CODE_GET_MANUF_KEY 0x82000000
#define DRV_MSG_CODE_LOAD_L2B_PRAM 0x90000000
#define DRV_MSG_SEQ_NUMBER_MASK 0x0000ffff
u32 drv_mb_param;
u32 fw_mb_header;
#define FW_MSG_CODE_MASK 0xffff0000
#define FW_MSG_CODE_DRV_LOAD_COMMON 0x10100000
#define FW_MSG_CODE_DRV_LOAD_PORT 0x10110000
#define FW_MSG_CODE_DRV_LOAD_FUNCTION 0x10120000
#define FW_MSG_CODE_DRV_LOAD_REFUSED 0x10200000
#define FW_MSG_CODE_DRV_LOAD_DONE 0x11100000
#define FW_MSG_CODE_DRV_UNLOAD_COMMON 0x20100000
#define FW_MSG_CODE_DRV_UNLOAD_PORT 0x20110000
#define FW_MSG_CODE_DRV_UNLOAD_FUNCTION 0x20120000
#define FW_MSG_CODE_DRV_UNLOAD_DONE 0x21100000
#define FW_MSG_CODE_DIAG_ENTER_DONE 0x50100000
#define FW_MSG_CODE_DIAG_REFUSE 0x50200000
#define FW_MSG_CODE_DIAG_EXIT_DONE 0x60100000
#define FW_MSG_CODE_VALIDATE_KEY_SUCCESS 0x70100000
#define FW_MSG_CODE_VALIDATE_KEY_FAILURE 0x70200000
#define FW_MSG_CODE_GET_KEY_DONE 0x80100000
#define FW_MSG_CODE_NO_KEY 0x80f00000
#define FW_MSG_CODE_LIC_INFO_NOT_READY 0x80f80000
#define FW_MSG_CODE_L2B_PRAM_LOADED 0x90100000
#define FW_MSG_CODE_L2B_PRAM_T_LOAD_FAILURE 0x90210000
#define FW_MSG_CODE_L2B_PRAM_C_LOAD_FAILURE 0x90220000
#define FW_MSG_CODE_L2B_PRAM_X_LOAD_FAILURE 0x90230000
#define FW_MSG_CODE_L2B_PRAM_U_LOAD_FAILURE 0x90240000
#define FW_MSG_SEQ_NUMBER_MASK 0x0000ffff
u32 fw_mb_param;
u32 drv_pulse_mb;
#define DRV_PULSE_SEQ_MASK 0x00007fff
#define DRV_PULSE_SYSTEM_TIME_MASK 0xffff0000
/* The system time is in the format of
* (year-2001)*12*32 + month*32 + day. */
#define DRV_PULSE_ALWAYS_ALIVE 0x00008000
/* Indicate to the firmware not to go into the
* OS-absent when it is not getting driver pulse.
* This is used for debugging as well for PXE(MBA). */
u32 mcp_pulse_mb;
#define MCP_PULSE_SEQ_MASK 0x00007fff
#define MCP_PULSE_ALWAYS_ALIVE 0x00008000
/* Indicates to the driver not to assert due to lack
* of MCP response */
#define MCP_EVENT_MASK 0xffff0000
#define MCP_EVENT_OTHER_DRIVER_RESET_REQ 0x00010000
u32 iscsi_boot_signature;
u32 iscsi_boot_block_offset;
u32 reserved[3];
};
@ -678,9 +704,8 @@ struct dev_info { /* size */
/****************************************************************************
* Management firmware state *
****************************************************************************/
/* Allocate 320 bytes for management firmware: still not known exactly
* how much IMD needs. */
#define MGMTFW_STATE_WORD_SIZE 80
/* Allocate 440 bytes for management firmware */
#define MGMTFW_STATE_WORD_SIZE 110
struct mgmtfw_state {
u32 opaque[MGMTFW_STATE_WORD_SIZE];
@ -691,31 +716,40 @@ struct mgmtfw_state {
* Shared Memory Region *
****************************************************************************/
struct shmem_region { /* SharedMem Offset (size) */
u32 validity_map[FUNC_MAX]; /* 0x0 (4 * 2 = 0x8) */
#define SHR_MEM_VALIDITY_PCI_CFG 0x00000001
#define SHR_MEM_VALIDITY_MB 0x00000002
#define SHR_MEM_VALIDITY_DEV_INFO 0x00000004
u32 validity_map[PORT_MAX]; /* 0x0 (4*2 = 0x8) */
#define SHR_MEM_FORMAT_REV_ID ('A'<<24)
#define SHR_MEM_FORMAT_REV_MASK 0xff000000
/* validity bits */
#define SHR_MEM_VALIDITY_PCI_CFG 0x00100000
#define SHR_MEM_VALIDITY_MB 0x00200000
#define SHR_MEM_VALIDITY_DEV_INFO 0x00400000
#define SHR_MEM_VALIDITY_RESERVED 0x00000007
/* One licensing bit should be set */
#define SHR_MEM_VALIDITY_LIC_KEY_IN_EFFECT_MASK 0x00000038
#define SHR_MEM_VALIDITY_LIC_MANUF_KEY_IN_EFFECT 0x00000008
#define SHR_MEM_VALIDITY_LIC_UPGRADE_KEY_IN_EFFECT 0x00000010
#define SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT 0x00000020
/* Active MFW */
#define SHR_MEM_VALIDITY_ACTIVE_MFW_UNKNOWN 0x00000000
#define SHR_MEM_VALIDITY_ACTIVE_MFW_IPMI 0x00000040
#define SHR_MEM_VALIDITY_ACTIVE_MFW_UMP 0x00000080
#define SHR_MEM_VALIDITY_ACTIVE_MFW_NCSI 0x000000c0
#define SHR_MEM_VALIDITY_ACTIVE_MFW_NONE 0x000001c0
#define SHR_MEM_VALIDITY_ACTIVE_MFW_MASK 0x000001c0
struct drv_fw_mb drv_fw_mb[FUNC_MAX]; /* 0x8 (28 * 2 = 0x38) */
struct dev_info dev_info; /* 0x8 (0x438) */
struct dev_info dev_info; /* 0x40 (0x438) */
#ifdef _LICENSE_H
license_key_t drv_lic_key[FUNC_MAX]; /* 0x478 (52 * 2 = 0x68) */
#else /* Linux! */
u8 reserved[52*FUNC_MAX];
#endif
u8 reserved[52*PORT_MAX];
/* FW information (for internal FW use) */
u32 fw_info_fio_offset; /* 0x4e0 (0x4) */
struct mgmtfw_state mgmtfw_state; /* 0x4e4 (0x140) */
u32 fw_info_fio_offset; /* 0x4a8 (0x4) */
struct mgmtfw_state mgmtfw_state; /* 0x4ac (0x1b8) */
}; /* 0x624 */
struct drv_port_mb port_mb[PORT_MAX]; /* 0x664 (16*2=0x20) */
struct drv_func_mb func_mb[FUNC_MAX]; /* 0x684 (44*2=0x58) */
}; /* 0x6dc */
#define BCM_5710_FW_MAJOR_VERSION 4

12
drivers/net/bnx2x_init.h
View File

@ -1,6 +1,6 @@
/* bnx2x_init.h: Broadcom Everest network driver.
*
* Copyright (c) 2007 Broadcom Corporation
* Copyright (c) 2007-2008 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -409,7 +409,7 @@ static void bnx2x_init_pxp(struct bnx2x *bp)
pci_read_config_word(bp->pdev,
bp->pcie_cap + PCI_EXP_DEVCTL, (u16 *)&val);
DP(NETIF_MSG_HW, "read 0x%x from devctl\n", val);
DP(NETIF_MSG_HW, "read 0x%x from devctl\n", (u16)val);
w_order = ((val & PCI_EXP_DEVCTL_PAYLOAD) >> 5);
r_order = ((val & PCI_EXP_DEVCTL_READRQ) >> 12);
@ -472,10 +472,14 @@ static void bnx2x_init_pxp(struct bnx2x *bp)
REG_WR(bp, PXP2_REG_PSWRQ_BW_WR, val);
REG_WR(bp, PXP2_REG_RQ_WR_MBS0, w_order);
REG_WR(bp, PXP2_REG_RQ_WR_MBS0 + 8, w_order);
REG_WR(bp, PXP2_REG_RQ_WR_MBS1, w_order);
REG_WR(bp, PXP2_REG_RQ_RD_MBS0, r_order);
REG_WR(bp, PXP2_REG_RQ_RD_MBS0 + 8, r_order);
REG_WR(bp, PXP2_REG_RQ_RD_MBS1, r_order);
if (r_order == MAX_RD_ORD)
REG_WR(bp, PXP2_REG_RQ_PDR_LIMIT, 0xe00);
REG_WR(bp, PXP2_REG_WR_USDMDP_TH, (0x18 << w_order));
REG_WR(bp, PXP2_REG_WR_DMAE_TH, (128 << w_order)/16);
}

212
drivers/net/bnx2x_reg.h
View File

@ -1,6 +1,6 @@
/* bnx2x_reg.h: Broadcom Everest network driver.
*
* Copyright (c) 2007 Broadcom Corporation
* Copyright (c) 2007-2008 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -24,6 +24,8 @@
#define BRB1_REG_BRB1_INT_STS 0x6011c
/* [RW 4] Parity mask register #0 read/write */
#define BRB1_REG_BRB1_PRTY_MASK 0x60138
/* [R 4] Parity register #0 read */
#define BRB1_REG_BRB1_PRTY_STS 0x6012c
/* [RW 10] At address BRB1_IND_FREE_LIST_PRS_CRDT initialize free head. At
address BRB1_IND_FREE_LIST_PRS_CRDT+1 initialize free tail. At address
BRB1_IND_FREE_LIST_PRS_CRDT+2 initialize parser initial credit. */
@ -281,6 +283,8 @@
#define CDU_REG_CDU_INT_STS 0x101030
/* [RW 5] Parity mask register #0 read/write */
#define CDU_REG_CDU_PRTY_MASK 0x10104c
/* [R 5] Parity register #0 read */
#define CDU_REG_CDU_PRTY_STS 0x101040
/* [RC 32] logging of error data in case of a CDU load error:
{expected_cid[15:0]; xpected_type[2:0]; xpected_region[2:0]; ctive_error;
ype_error; ctual_active; ctual_compressed_context}; */
@ -308,6 +312,8 @@
#define CFC_REG_CFC_INT_STS_CLR 0x104100
/* [RW 4] Parity mask register #0 read/write */
#define CFC_REG_CFC_PRTY_MASK 0x104118
/* [R 4] Parity register #0 read */
#define CFC_REG_CFC_PRTY_STS 0x10410c
/* [RW 21] CID cam access (21:1 - Data; alid - 0) */
#define CFC_REG_CID_CAM 0x104800
#define CFC_REG_CONTROL0 0x104028
@ -354,6 +360,8 @@
#define CSDM_REG_CSDM_INT_MASK_1 0xc22ac
/* [RW 11] Parity mask register #0 read/write */
#define CSDM_REG_CSDM_PRTY_MASK 0xc22bc
/* [R 11] Parity register #0 read */
#define CSDM_REG_CSDM_PRTY_STS 0xc22b0
#define CSDM_REG_ENABLE_IN1 0xc2238
#define CSDM_REG_ENABLE_IN2 0xc223c
#define CSDM_REG_ENABLE_OUT1 0xc2240
@ -438,6 +446,9 @@
/* [RW 32] Parity mask register #0 read/write */
#define CSEM_REG_CSEM_PRTY_MASK_0 0x200130
#define CSEM_REG_CSEM_PRTY_MASK_1 0x200140
/* [R 32] Parity register #0 read */
#define CSEM_REG_CSEM_PRTY_STS_0 0x200124
#define CSEM_REG_CSEM_PRTY_STS_1 0x200134
#define CSEM_REG_ENABLE_IN 0x2000a4
#define CSEM_REG_ENABLE_OUT 0x2000a8
/* [RW 32] This address space contains all registers and memories that are
@ -526,6 +537,8 @@
#define CSEM_REG_TS_9_AS 0x20005c
/* [RW 1] Parity mask register #0 read/write */
#define DBG_REG_DBG_PRTY_MASK 0xc0a8
/* [R 1] Parity register #0 read */
#define DBG_REG_DBG_PRTY_STS 0xc09c
/* [RW 2] debug only: These bits indicate the credit for PCI request type 4
interface; MUST be configured AFTER pci_ext_buffer_strt_addr_lsb/msb are
configured */
@ -543,6 +556,8 @@
#define DMAE_REG_DMAE_INT_MASK 0x102054
/* [RW 4] Parity mask register #0 read/write */
#define DMAE_REG_DMAE_PRTY_MASK 0x102064
/* [R 4] Parity register #0 read */
#define DMAE_REG_DMAE_PRTY_STS 0x102058
/* [RW 1] Command 0 go. */
#define DMAE_REG_GO_C0 0x102080
/* [RW 1] Command 1 go. */
@ -623,6 +638,8 @@
#define DORQ_REG_DORQ_INT_STS_CLR 0x170178
/* [RW 2] Parity mask register #0 read/write */
#define DORQ_REG_DORQ_PRTY_MASK 0x170190
/* [R 2] Parity register #0 read */
#define DORQ_REG_DORQ_PRTY_STS 0x170184
/* [RW 8] The address to write the DPM CID to STORM. */
#define DORQ_REG_DPM_CID_ADDR 0x170044
/* [RW 5] The DPM mode CID extraction offset. */
@ -692,6 +709,8 @@
#define HC_REG_CONFIG_1 0x108004
/* [RW 3] Parity mask register #0 read/write */
#define HC_REG_HC_PRTY_MASK 0x1080a0
/* [R 3] Parity register #0 read */
#define HC_REG_HC_PRTY_STS 0x108094
/* [RW 17] status block interrupt mask; one in each bit means unmask; zerow
in each bit means mask; bit 0 - default SB; bit 1 - SB_0; bit 2 - SB_1...
bit 16- SB_15; addr 0 - port 0; addr 1 - port 1 */
@ -1127,6 +1146,7 @@
#define MISC_REG_AEU_GENERAL_ATTN_17 0xa044
#define MISC_REG_AEU_GENERAL_ATTN_18 0xa048
#define MISC_REG_AEU_GENERAL_ATTN_19 0xa04c
#define MISC_REG_AEU_GENERAL_ATTN_10 0xa028
#define MISC_REG_AEU_GENERAL_ATTN_11 0xa02c
#define MISC_REG_AEU_GENERAL_ATTN_2 0xa008
#define MISC_REG_AEU_GENERAL_ATTN_20 0xa050
@ -1135,6 +1155,9 @@
#define MISC_REG_AEU_GENERAL_ATTN_4 0xa010
#define MISC_REG_AEU_GENERAL_ATTN_5 0xa014
#define MISC_REG_AEU_GENERAL_ATTN_6 0xa018
#define MISC_REG_AEU_GENERAL_ATTN_7 0xa01c
#define MISC_REG_AEU_GENERAL_ATTN_8 0xa020
#define MISC_REG_AEU_GENERAL_ATTN_9 0xa024
/* [RW 32] first 32b for inverting the input for function 0; for each bit:
0= do not invert; 1= invert; mapped as follows: [0] NIG attention for
function0; [1] NIG attention for function1; [2] GPIO1 mcp; [3] GPIO2 mcp;
@ -1183,6 +1206,40 @@
starts at 0x0 for the A0 tape-out and increments by one for each
all-layer tape-out. */
#define MISC_REG_CHIP_REV 0xa40c
/* [RW 32] The following driver registers(1..6) represent 6 drivers and 32
clients. Each client can be controlled by one driver only. One in each
bit represent that this driver control the appropriate client (Ex: bit 5
is set means this driver control client number 5). addr1 = set; addr0 =
clear; read from both addresses will give the same result = status. write
to address 1 will set a request to control all the clients that their
appropriate bit (in the write command) is set. if the client is free (the
appropriate bit in all the other drivers is clear) one will be written to
that driver register; if the client isn't free the bit will remain zero.
if the appropriate bit is set (the driver request to gain control on a
client it already controls the ~MISC_REGISTERS_INT_STS.GENERIC_SW
interrupt will be asserted). write to address 0 will set a request to
free all the clients that their appropriate bit (in the write command) is
set. if the appropriate bit is clear (the driver request to free a client
it doesn't controls the ~MISC_REGISTERS_INT_STS.GENERIC_SW interrupt will
be asserted). */
#define MISC_REG_DRIVER_CONTROL_1 0xa510
/* [RW 32] GPIO. [31-28] FLOAT port 0; [27-24] FLOAT port 0; When any of
these bits is written as a '1'; the corresponding SPIO bit will turn off
it's drivers and become an input. This is the reset state of all GPIO
pins. The read value of these bits will be a '1' if that last command
(#SET; #CLR; or #FLOAT) for this bit was a #FLOAT. (reset value 0xff).
[23-20] CLR port 1; 19-16] CLR port 0; When any of these bits is written
as a '1'; the corresponding GPIO bit will drive low. The read value of
these bits will be a '1' if that last command (#SET; #CLR; or #FLOAT) for
this bit was a #CLR. (reset value 0). [15-12] SET port 1; 11-8] port 0;
SET When any of these bits is written as a '1'; the corresponding GPIO
bit will drive high (if it has that capability). The read value of these
bits will be a '1' if that last command (#SET; #CLR; or #FLOAT) for this
bit was a #SET. (reset value 0). [7-4] VALUE port 1; [3-0] VALUE port 0;
RO; These bits indicate the read value of each of the eight GPIO pins.
This is the result value of the pin; not the drive value. Writing these
bits will have not effect. */
#define MISC_REG_GPIO 0xa490
/* [RW 1] Setting this bit enables a timer in the GRC block to timeout any
access that does not finish within
~misc_registers_grc_timout_val.grc_timeout_val cycles. When this bit is
@ -1223,6 +1280,8 @@
#define MISC_REG_MISC_INT_MASK 0xa388
/* [RW 1] Parity mask register #0 read/write */
#define MISC_REG_MISC_PRTY_MASK 0xa398
/* [R 1] Parity register #0 read */
#define MISC_REG_MISC_PRTY_STS 0xa38c
/* [RW 32] 32 LSB of storm PLL first register; reset val = 0x 071d2911.
inside order of the bits is: [0] P1 divider[0] (reset value 1); [1] P1
divider[1] (reset value 0); [2] P1 divider[2] (reset value 0); [3] P1
@ -1264,6 +1323,55 @@
/* [RW 20] 20 bit GRC address where the scratch-pad of the MCP that is
shared with the driver resides */
#define MISC_REG_SHARED_MEM_ADDR 0xa2b4
/* [RW 32] SPIO. [31-24] FLOAT When any of these bits is written as a '1';
the corresponding SPIO bit will turn off it's drivers and become an
input. This is the reset state of all SPIO pins. The read value of these
bits will be a '1' if that last command (#SET; #CL; or #FLOAT) for this
bit was a #FLOAT. (reset value 0xff). [23-16] CLR When any of these bits
is written as a '1'; the corresponding SPIO bit will drive low. The read
value of these bits will be a '1' if that last command (#SET; #CLR; or
#FLOAT) for this bit was a #CLR. (reset value 0). [15-8] SET When any of
these bits is written as a '1'; the corresponding SPIO bit will drive
high (if it has that capability). The read value of these bits will be a
'1' if that last command (#SET; #CLR; or #FLOAT) for this bit was a #SET.
(reset value 0). [7-0] VALUE RO; These bits indicate the read value of
each of the eight SPIO pins. This is the result value of the pin; not the
drive value. Writing these bits will have not effect. Each 8 bits field
is divided as follows: [0] VAUX Enable; when pulsed low; enables supply
from VAUX. (This is an output pin only; the FLOAT field is not applicable
for this pin); [1] VAUX Disable; when pulsed low; disables supply form
VAUX. (This is an output pin only; FLOAT field is not applicable for this
pin); [2] SEL_VAUX_B - Control to power switching logic. Drive low to
select VAUX supply. (This is an output pin only; it is not controlled by
the SET and CLR fields; it is controlled by the Main Power SM; the FLOAT
field is not applicable for this pin; only the VALUE fields is relevant -
it reflects the output value); [3] reserved; [4] spio_4; [5] spio_5; [6]
Bit 0 of UMP device ID select; read by UMP firmware; [7] Bit 1 of UMP
device ID select; read by UMP firmware. */
#define MISC_REG_SPIO 0xa4fc
/* [RW 8] These bits enable the SPIO_INTs to signals event to the IGU/MC.
according to the following map: [3:0] reserved; [4] spio_4 [5] spio_5;
[7:0] reserved */
#define MISC_REG_SPIO_EVENT_EN 0xa2b8
/* [RW 32] SPIO INT. [31-24] OLD_CLR Writing a '1' to these bit clears the
corresponding bit in the #OLD_VALUE register. This will acknowledge an
interrupt on the falling edge of corresponding SPIO input (reset value
0). [23-16] OLD_SET Writing a '1' to these bit sets the corresponding bit
in the #OLD_VALUE register. This will acknowledge an interrupt on the
rising edge of corresponding SPIO input (reset value 0). [15-8] OLD_VALUE
RO; These bits indicate the old value of the SPIO input value. When the
~INT_STATE bit is set; this bit indicates the OLD value of the pin such
that if ~INT_STATE is set and this bit is '0'; then the interrupt is due
to a low to high edge. If ~INT_STATE is set and this bit is '1'; then the
interrupt is due to a high to low edge (reset value 0). [7-0] INT_STATE
RO; These bits indicate the current SPIO interrupt state for each SPIO
pin. This bit is cleared when the appropriate #OLD_SET or #OLD_CLR
command bit is written. This bit is set when the SPIO input does not
match the current value in #OLD_VALUE (reset value 0). */
#define MISC_REG_SPIO_INT 0xa500
/* [RW 1] Set by the MCP to remember if one or more of the drivers is/are
loaded; 0-prepare; -unprepare */
#define MISC_REG_UNPREPARED 0xa424
#define NIG_MASK_INTERRUPT_PORT0_REG_MASK_EMAC0_MISC_MI_INT (0x1<<0)
#define NIG_MASK_INTERRUPT_PORT0_REG_MASK_SERDES0_LINK_STATUS (0x1<<9)
#define NIG_MASK_INTERRUPT_PORT0_REG_MASK_XGXS0_LINK10G (0x1<<15)
@ -1392,6 +1500,9 @@
#define NIG_REG_NIG_INGRESS_EMAC0_NO_CRC 0x10044
/* [RW 1] Input enable for RX PBF LP IF */
#define NIG_REG_PBF_LB_IN_EN 0x100b4
/* [RW 1] Value of this register will be transmitted to port swap when
~nig_registers_strap_override.strap_override =1 */
#define NIG_REG_PORT_SWAP 0x10394
/* [RW 1] output enable for RX parser descriptor IF */
#define NIG_REG_PRS_EOP_OUT_EN 0x10104
/* [RW 1] Input enable for RX parser request IF */
@ -1410,6 +1521,10 @@
#define NIG_REG_STAT2_BRB_OCTET 0x107e0
#define NIG_REG_STATUS_INTERRUPT_PORT0 0x10328
#define NIG_REG_STATUS_INTERRUPT_PORT1 0x1032c
/* [RW 1] port swap mux selection. If this register equal to 0 then port
swap is equal to SPIO pin that inputs from ifmux_serdes_swap. If 1 then
ort swap is equal to ~nig_registers_port_swap.port_swap */
#define NIG_REG_STRAP_OVERRIDE 0x10398
/* [RW 1] output enable for RX_XCM0 IF */
#define NIG_REG_XCM0_OUT_EN 0x100f0
/* [RW 1] output enable for RX_XCM1 IF */
@ -1499,6 +1614,8 @@
#define PB_REG_PB_INT_STS 0x1c
/* [RW 4] Parity mask register #0 read/write */
#define PB_REG_PB_PRTY_MASK 0x38
/* [R 4] Parity register #0 read */
#define PB_REG_PB_PRTY_STS 0x2c
#define PRS_REG_A_PRSU_20 0x40134
/* [R 8] debug only: CFC load request current credit. Transaction based. */
#define PRS_REG_CFC_LD_CURRENT_CREDIT 0x40164
@ -1590,6 +1707,8 @@
#define PRS_REG_PRS_INT_STS 0x40188
/* [RW 8] Parity mask register #0 read/write */
#define PRS_REG_PRS_PRTY_MASK 0x401a4
/* [R 8] Parity register #0 read */
#define PRS_REG_PRS_PRTY_STS 0x40198
/* [RW 8] Context region for pure acknowledge packets. Used in CFC load
request message */
#define PRS_REG_PURE_REGIONS 0x40024
@ -1718,6 +1837,9 @@
/* [RW 32] Parity mask register #0 read/write */
#define PXP2_REG_PXP2_PRTY_MASK_0 0x120588
#define PXP2_REG_PXP2_PRTY_MASK_1 0x120598
/* [R 32] Parity register #0 read */
#define PXP2_REG_PXP2_PRTY_STS_0 0x12057c
#define PXP2_REG_PXP2_PRTY_STS_1 0x12058c
/* [R 1] Debug only: The 'almost full' indication from each fifo (gives
indication about backpressure) */
#define PXP2_REG_RD_ALMOST_FULL_0 0x120424
@ -1911,6 +2033,8 @@
#define PXP2_REG_RQ_HC_ENDIAN_M 0x1201a8
/* [WB 53] Onchip address table */
#define PXP2_REG_RQ_ONCHIP_AT 0x122000
/* [RW 13] Pending read limiter threshold; in Dwords */
#define PXP2_REG_RQ_PDR_LIMIT 0x12033c
/* [RW 2] Endian mode for qm */
#define PXP2_REG_RQ_QM_ENDIAN_M 0x120194
/* [RW 3] page size in L2P table for QM module; -4k; -8k; -16k; -32k; -64k;
@ -1921,6 +2045,9 @@
/* [RW 3] Max burst size filed for read requests port 0; 000 - 128B;
001:256B; 010: 512B; 11:1K:100:2K; 01:4K */
#define PXP2_REG_RQ_RD_MBS0 0x120160
/* [RW 3] Max burst size filed for read requests port 1; 000 - 128B;
001:256B; 010: 512B; 11:1K:100:2K; 01:4K */
#define PXP2_REG_RQ_RD_MBS1 0x120168
/* [RW 2] Endian mode for src */
#define PXP2_REG_RQ_SRC_ENDIAN_M 0x12019c
/* [RW 3] page size in L2P table for SRC module; -4k; -8k; -16k; -32k; -64k;
@ -2000,10 +2127,17 @@
/* [RW 3] Max burst size filed for write requests port 0; 000 - 128B;
001:256B; 010: 512B; */
#define PXP2_REG_RQ_WR_MBS0 0x12015c
/* [RW 3] Max burst size filed for write requests port 1; 000 - 128B;
001:256B; 010: 512B; */
#define PXP2_REG_RQ_WR_MBS1 0x120164
/* [RW 10] if Number of entries in dmae fifo will be higer than this
threshold then has_payload indication will be asserted; the default value
should be equal to &gt; write MBS size! */
#define PXP2_REG_WR_DMAE_TH 0x120368
/* [RW 10] if Number of entries in usdmdp fifo will be higer than this
threshold then has_payload indication will be asserted; the default value
should be equal to &gt; write MBS size! */
#define PXP2_REG_WR_USDMDP_TH 0x120348
/* [R 1] debug only: Indication if PSWHST arbiter is idle */
#define PXP_REG_HST_ARB_IS_IDLE 0x103004
/* [R 8] debug only: A bit mask for all PSWHST arbiter clients. '1' means
@ -2021,6 +2155,8 @@
#define PXP_REG_PXP_INT_STS_CLR_0 0x10306c
/* [RW 26] Parity mask register #0 read/write */
#define PXP_REG_PXP_PRTY_MASK 0x103094
/* [R 26] Parity register #0 read */
#define PXP_REG_PXP_PRTY_STS 0x103088
/* [RW 4] The activity counter initial increment value sent in the load
request */
#define QM_REG_ACTCTRINITVAL_0 0x168040
@ -2127,6 +2263,8 @@
#define QM_REG_QM_INT_STS 0x168438
/* [RW 9] Parity mask register #0 read/write */
#define QM_REG_QM_PRTY_MASK 0x168454
/* [R 9] Parity register #0 read */
#define QM_REG_QM_PRTY_STS 0x168448
/* [R 32] Current queues in pipeline: Queues from 32 to 63 */
#define QM_REG_QSTATUS_HIGH 0x16802c
/* [R 32] Current queues in pipeline: Queues from 0 to 31 */
@ -2410,6 +2548,8 @@
#define SRC_REG_SRC_INT_STS 0x404ac
/* [RW 3] Parity mask register #0 read/write */
#define SRC_REG_SRC_PRTY_MASK 0x404c8
/* [R 3] Parity register #0 read */
#define SRC_REG_SRC_PRTY_STS 0x404bc
/* [R 4] Used to read the value of the XX protection CAM occupancy counter. */
#define TCM_REG_CAM_OCCUP 0x5017c
/* [RW 1] CDU AG read Interface enable. If 0 - the request input is
@ -2730,6 +2870,8 @@
#define TSDM_REG_TSDM_INT_MASK_1 0x422ac
/* [RW 11] Parity mask register #0 read/write */
#define TSDM_REG_TSDM_PRTY_MASK 0x422bc
/* [R 11] Parity register #0 read */
#define TSDM_REG_TSDM_PRTY_STS 0x422b0
/* [RW 5] The number of time_slots in the arbitration cycle */
#define TSEM_REG_ARB_CYCLE_SIZE 0x180034
/* [RW 3] The source that is associated with arbitration element 0. Source
@ -2854,6 +2996,9 @@
/* [RW 32] Parity mask register #0 read/write */
#define TSEM_REG_TSEM_PRTY_MASK_0 0x180120
#define TSEM_REG_TSEM_PRTY_MASK_1 0x180130
/* [R 32] Parity register #0 read */
#define TSEM_REG_TSEM_PRTY_STS_0 0x180114
#define TSEM_REG_TSEM_PRTY_STS_1 0x180124
/* [R 5] Used to read the XX protection CAM occupancy counter. */
#define UCM_REG_CAM_OCCUP 0xe0170
/* [RW 1] CDU AG read Interface enable. If 0 - the request input is
@ -3155,6 +3300,8 @@
#define USDM_REG_USDM_INT_MASK_1 0xc42b0
/* [RW 11] Parity mask register #0 read/write */
#define USDM_REG_USDM_PRTY_MASK 0xc42c0
/* [R 11] Parity register #0 read */
#define USDM_REG_USDM_PRTY_STS 0xc42b4
/* [RW 5] The number of time_slots in the arbitration cycle */
#define USEM_REG_ARB_CYCLE_SIZE 0x300034
/* [RW 3] The source that is associated with arbitration element 0. Source
@ -3279,6 +3426,9 @@
/* [RW 32] Parity mask register #0 read/write */
#define USEM_REG_USEM_PRTY_MASK_0 0x300130
#define USEM_REG_USEM_PRTY_MASK_1 0x300140
/* [R 32] Parity register #0 read */
#define USEM_REG_USEM_PRTY_STS_0 0x300124
#define USEM_REG_USEM_PRTY_STS_1 0x300134
/* [RW 2] The queue index for registration on Aux1 counter flag. */
#define XCM_REG_AUX1_Q 0x20134
/* [RW 2] Per each decision rule the queue index to register to. */
@ -3684,6 +3834,8 @@
#define XSDM_REG_XSDM_INT_MASK_1 0x1662ac
/* [RW 11] Parity mask register #0 read/write */
#define XSDM_REG_XSDM_PRTY_MASK 0x1662bc
/* [R 11] Parity register #0 read */
#define XSDM_REG_XSDM_PRTY_STS 0x1662b0
/* [RW 5] The number of time_slots in the arbitration cycle */
#define XSEM_REG_ARB_CYCLE_SIZE 0x280034
/* [RW 3] The source that is associated with arbitration element 0. Source
@ -3808,6 +3960,9 @@
/* [RW 32] Parity mask register #0 read/write */
#define XSEM_REG_XSEM_PRTY_MASK_0 0x280130
#define XSEM_REG_XSEM_PRTY_MASK_1 0x280140
/* [R 32] Parity register #0 read */
#define XSEM_REG_XSEM_PRTY_STS_0 0x280124
#define XSEM_REG_XSEM_PRTY_STS_1 0x280134
#define MCPR_NVM_ACCESS_ENABLE_EN (1L<<0)
#define MCPR_NVM_ACCESS_ENABLE_WR_EN (1L<<1)
#define MCPR_NVM_ADDR_NVM_ADDR_VALUE (0xffffffL<<0)
@ -3847,6 +4002,8 @@
#define EMAC_MDIO_COMM_START_BUSY (1L<<29)
#define EMAC_MDIO_MODE_AUTO_POLL (1L<<4)
#define EMAC_MDIO_MODE_CLAUSE_45 (1L<<31)
#define EMAC_MDIO_MODE_CLOCK_CNT (0x3fL<<16)
#define EMAC_MDIO_MODE_CLOCK_CNT_BITSHIFT 16
#define EMAC_MODE_25G_MODE (1L<<5)
#define EMAC_MODE_ACPI_RCVD (1L<<20)
#define EMAC_MODE_HALF_DUPLEX (1L<<1)
@ -3874,6 +4031,17 @@
#define EMAC_RX_MTU_SIZE_JUMBO_ENA (1L<<31)
#define EMAC_TX_MODE_EXT_PAUSE_EN (1L<<3)
#define EMAC_TX_MODE_RESET (1L<<0)
#define MISC_REGISTERS_GPIO_1 1
#define MISC_REGISTERS_GPIO_2 2
#define MISC_REGISTERS_GPIO_3 3
#define MISC_REGISTERS_GPIO_CLR_POS 16
#define MISC_REGISTERS_GPIO_FLOAT (0xffL<<24)
#define MISC_REGISTERS_GPIO_FLOAT_POS 24
#define MISC_REGISTERS_GPIO_INPUT_HI_Z 2
#define MISC_REGISTERS_GPIO_OUTPUT_HIGH 1
#define MISC_REGISTERS_GPIO_OUTPUT_LOW 0
#define MISC_REGISTERS_GPIO_PORT_SHIFT 4
#define MISC_REGISTERS_GPIO_SET_POS 8
#define MISC_REGISTERS_RESET_REG_1_CLEAR 0x588
#define MISC_REGISTERS_RESET_REG_1_SET 0x584
#define MISC_REGISTERS_RESET_REG_2_CLEAR 0x598
@ -3891,6 +4059,25 @@
#define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_RSTB_HW (0x1<<4)
#define MISC_REGISTERS_RESET_REG_3_MISC_NIG_MUX_XGXS0_TXD_FIFO_RSTB (0x1<<8)
#define MISC_REGISTERS_RESET_REG_3_SET 0x5a4
#define MISC_REGISTERS_SPIO_4 4
#define MISC_REGISTERS_SPIO_5 5
#define MISC_REGISTERS_SPIO_7 7
#define MISC_REGISTERS_SPIO_CLR_POS 16
#define MISC_REGISTERS_SPIO_FLOAT (0xffL<<24)
#define GRC_MISC_REGISTERS_SPIO_FLOAT7 0x80000000
#define GRC_MISC_REGISTERS_SPIO_FLOAT6 0x40000000
#define GRC_MISC_REGISTERS_SPIO_FLOAT5 0x20000000
#define GRC_MISC_REGISTERS_SPIO_FLOAT4 0x10000000
#define MISC_REGISTERS_SPIO_FLOAT_POS 24
#define MISC_REGISTERS_SPIO_INPUT_HI_Z 2
#define MISC_REGISTERS_SPIO_INT_OLD_SET_POS 16
#define MISC_REGISTERS_SPIO_OUTPUT_HIGH 1
#define MISC_REGISTERS_SPIO_OUTPUT_LOW 0
#define MISC_REGISTERS_SPIO_SET_POS 8
#define HW_LOCK_MAX_RESOURCE_VALUE 31
#define HW_LOCK_RESOURCE_8072_MDIO 0
#define HW_LOCK_RESOURCE_GPIO 1
#define HW_LOCK_RESOURCE_SPIO 2
#define AEU_INPUTS_ATTN_BITS_BRB_PARITY_ERROR (1<<18)
#define AEU_INPUTS_ATTN_BITS_CCM_HW_INTERRUPT (1<<31)
#define AEU_INPUTS_ATTN_BITS_CDU_HW_INTERRUPT (1<<9)
@ -3918,6 +4105,7 @@
#define AEU_INPUTS_ATTN_BITS_QM_HW_INTERRUPT (1<<3)
#define AEU_INPUTS_ATTN_BITS_QM_PARITY_ERROR (1<<2)
#define AEU_INPUTS_ATTN_BITS_SEARCHER_PARITY_ERROR (1<<22)
#define AEU_INPUTS_ATTN_BITS_SPIO5 (1<<15)
#define AEU_INPUTS_ATTN_BITS_TCM_HW_INTERRUPT (1<<27)
#define AEU_INPUTS_ATTN_BITS_TIMERS_HW_INTERRUPT (1<<5)
#define AEU_INPUTS_ATTN_BITS_TSDM_HW_INTERRUPT (1<<25)
@ -4206,6 +4394,9 @@
#define MDIO_XGXS_BLOCK2_RX_LN_SWAP_FORCE_ENABLE 0x4000
#define MDIO_XGXS_BLOCK2_TX_LN_SWAP 0x11
#define MDIO_XGXS_BLOCK2_TX_LN_SWAP_ENABLE 0x8000
#define MDIO_XGXS_BLOCK2_UNICORE_MODE_10G 0x14
#define MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_CX4_XGXS 0x0001
#define MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_HIGIG_XGXS 0x0010
#define MDIO_XGXS_BLOCK2_TEST_MODE_LANE 0x15
#define MDIO_REG_BANK_GP_STATUS 0x8120
@ -4362,11 +4553,13 @@
#define MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1_SGMII_MODE 0x0001
#define EXT_PHY_AUTO_NEG_DEVAD 0x7
#define EXT_PHY_OPT_PMA_PMD_DEVAD 0x1
#define EXT_PHY_OPT_WIS_DEVAD 0x2
#define EXT_PHY_OPT_PCS_DEVAD 0x3
#define EXT_PHY_OPT_PHY_XS_DEVAD 0x4
#define EXT_PHY_OPT_CNTL 0x0
#define EXT_PHY_OPT_CNTL2 0x7
#define EXT_PHY_OPT_PMD_RX_SD 0xa
#define EXT_PHY_OPT_PMD_MISC_CNTL 0xca0a
#define EXT_PHY_OPT_PHY_IDENTIFIER 0xc800
@ -4378,11 +4571,24 @@
#define EXT_PHY_OPT_LASI_STATUS 0x9005
#define EXT_PHY_OPT_PCS_STATUS 0x0020
#define EXT_PHY_OPT_XGXS_LANE_STATUS 0x0018
#define EXT_PHY_OPT_AN_LINK_STATUS 0x8304
#define EXT_PHY_OPT_AN_CL37_CL73 0x8370
#define EXT_PHY_OPT_AN_CL37_FD 0xffe4
#define EXT_PHY_OPT_AN_CL37_AN 0xffe0
#define EXT_PHY_OPT_AN_ADV 0x11
#define EXT_PHY_KR_PMA_PMD_DEVAD 0x1
#define EXT_PHY_KR_PCS_DEVAD 0x3
#define EXT_PHY_KR_AUTO_NEG_DEVAD 0x7
#define EXT_PHY_KR_CTRL 0x0000
#define EXT_PHY_KR_STATUS 0x0001
#define EXT_PHY_KR_AUTO_NEG_COMPLETE 0x0020
#define EXT_PHY_KR_AUTO_NEG_ADVERT 0x0010
#define EXT_PHY_KR_AUTO_NEG_ADVERT_PAUSE 0x0400
#define EXT_PHY_KR_AUTO_NEG_ADVERT_PAUSE_ASYMMETRIC 0x0800
#define EXT_PHY_KR_AUTO_NEG_ADVERT_PAUSE_BOTH 0x0C00
#define EXT_PHY_KR_AUTO_NEG_ADVERT_PAUSE_MASK 0x0C00
#define EXT_PHY_KR_LP_AUTO_NEG 0x0013
#define EXT_PHY_KR_CTRL2 0x0007
#define EXT_PHY_KR_PCS_STATUS 0x0020
#define EXT_PHY_KR_PMD_CTRL 0x0096
@ -4391,4 +4597,8 @@
#define EXT_PHY_KR_MISC_CTRL1 0xca85
#define EXT_PHY_KR_GEN_CTRL 0xca10
#define EXT_PHY_KR_ROM_CODE 0xca19
#define EXT_PHY_KR_ROM_RESET_INTERNAL_MP 0x0188
#define EXT_PHY_KR_ROM_MICRO_RESET 0x018a
#define EXT_PHY_SFX7101_XGXS_TEST1 0xc00a

12
drivers/net/cs89x0.c
View File

@ -172,30 +172,30 @@ static char version[] __initdata =
them to system IRQ numbers. This mapping is card specific and is set to
the configuration of the Cirrus Eval board for this chip. */
#ifdef CONFIG_ARCH_CLPS7500
static unsigned int netcard_portlist[] __initdata =
static unsigned int netcard_portlist[] __used __initdata =
{ 0x80090303, 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0};
static unsigned int cs8900_irq_map[] = {12,0,0,0};
#elif defined(CONFIG_SH_HICOSH4)
static unsigned int netcard_portlist[] __initdata =
static unsigned int netcard_portlist[] __used __initdata =
{ 0x0300, 0};
static unsigned int cs8900_irq_map[] = {1,0,0,0};
#elif defined(CONFIG_MACH_IXDP2351)
static unsigned int netcard_portlist[] __initdata = {IXDP2351_VIRT_CS8900_BASE, 0};
static unsigned int netcard_portlist[] __used __initdata = {IXDP2351_VIRT_CS8900_BASE, 0};
static unsigned int cs8900_irq_map[] = {IRQ_IXDP2351_CS8900, 0, 0, 0};
#include <asm/irq.h>
#elif defined(CONFIG_ARCH_IXDP2X01)
#include <asm/irq.h>
static unsigned int netcard_portlist[] __initdata = {IXDP2X01_CS8900_VIRT_BASE, 0};
static unsigned int netcard_portlist[] __used __initdata = {IXDP2X01_CS8900_VIRT_BASE, 0};
static unsigned int cs8900_irq_map[] = {IRQ_IXDP2X01_CS8900, 0, 0, 0};
#elif defined(CONFIG_ARCH_PNX010X)
#include <asm/irq.h>
#include <asm/arch/gpio.h>
#define CIRRUS_DEFAULT_BASE IO_ADDRESS(EXT_STATIC2_s0_BASE + 0x200000) /* = Physical address 0x48200000 */
#define CIRRUS_DEFAULT_IRQ VH_INTC_INT_NUM_CASCADED_INTERRUPT_1 /* Event inputs bank 1 - ID 35/bit 3 */
static unsigned int netcard_portlist[] __initdata = {CIRRUS_DEFAULT_BASE, 0};
static unsigned int netcard_portlist[] __used __initdata = {CIRRUS_DEFAULT_BASE, 0};
static unsigned int cs8900_irq_map[] = {CIRRUS_DEFAULT_IRQ, 0, 0, 0};
#else
static unsigned int netcard_portlist[] __initdata =
static unsigned int netcard_portlist[] __used __initdata =
{ 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0};
static unsigned int cs8900_irq_map[] = {10,11,12,5};
#endif

22
drivers/net/e1000e/82571.c
View File

@ -438,7 +438,7 @@ static void e1000_release_nvm_82571(struct e1000_hw *hw)
* For non-82573 silicon, write data to EEPROM at offset using SPI interface.
*
* If e1000e_update_nvm_checksum is not called after this function, the
* EEPROM will most likley contain an invalid checksum.
* EEPROM will most likely contain an invalid checksum.
**/
static s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset, u16 words,
u16 *data)
@ -547,7 +547,7 @@ static s32 e1000_validate_nvm_checksum_82571(struct e1000_hw *hw)
* poll for completion.
*
* If e1000e_update_nvm_checksum is not called after this function, the
* EEPROM will most likley contain an invalid checksum.
* EEPROM will most likely contain an invalid checksum.
**/
static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,
u16 words, u16 *data)
@ -1053,7 +1053,7 @@ static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw)
/* If SerDes loopback mode is entered, there is no form
* of reset to take the adapter out of that mode. So we
* have to explicitly take the adapter out of loopback
* mode. This prevents drivers from twidling their thumbs
* mode. This prevents drivers from twiddling their thumbs
* if another tool failed to take it out of loopback mode.
*/
ew32(SCTL,
@ -1098,7 +1098,7 @@ static s32 e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data)
* e1000e_get_laa_state_82571 - Get locally administered address state
* @hw: pointer to the HW structure
*
* Retrieve and return the current locally administed address state.
* Retrieve and return the current locally administered address state.
**/
bool e1000e_get_laa_state_82571(struct e1000_hw *hw)
{
@ -1113,7 +1113,7 @@ bool e1000e_get_laa_state_82571(struct e1000_hw *hw)
* @hw: pointer to the HW structure
* @state: enable/disable locally administered address
*
* Enable/Disable the current locally administed address state.
* Enable/Disable the current locally administers address state.
**/
void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state)
{
@ -1280,16 +1280,6 @@ static struct e1000_phy_operations e82_phy_ops_m88 = {
};
static struct e1000_nvm_operations e82571_nvm_ops = {
.acquire_nvm = e1000_acquire_nvm_82571,
.read_nvm = e1000e_read_nvm_spi,
.release_nvm = e1000_release_nvm_82571,
.update_nvm = e1000_update_nvm_checksum_82571,
.valid_led_default = e1000_valid_led_default_82571,
.validate_nvm = e1000_validate_nvm_checksum_82571,
.write_nvm = e1000_write_nvm_82571,
};
static struct e1000_nvm_operations e82573_nvm_ops = {
.acquire_nvm = e1000_acquire_nvm_82571,
.read_nvm = e1000e_read_nvm_eerd,
.release_nvm = e1000_release_nvm_82571,
@ -1355,6 +1345,6 @@ struct e1000_info e1000_82573_info = {
.get_invariants = e1000_get_invariants_82571,
.mac_ops = &e82571_mac_ops,
.phy_ops = &e82_phy_ops_m88,
.nvm_ops = &e82573_nvm_ops,
.nvm_ops = &e82571_nvm_ops,
};

10
drivers/net/e1000e/defines.h
View File

@ -66,7 +66,7 @@
#define E1000_WUFC_ARP 0x00000020 /* ARP Request Packet Wakeup Enable */
/* Extended Device Control */
#define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Defineable Pin 7 */
#define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Definable Pin 7 */
#define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */
#define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */
#define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000
@ -75,12 +75,12 @@
#define E1000_CTRL_EXT_IAME 0x08000000 /* Interrupt acknowledge Auto-mask */
#define E1000_CTRL_EXT_INT_TIMER_CLR 0x20000000 /* Clear Interrupt timers after IMS clear */
/* Receive Decriptor bit definitions */
/* Receive Descriptor bit definitions */
#define E1000_RXD_STAT_DD 0x01 /* Descriptor Done */
#define E1000_RXD_STAT_EOP 0x02 /* End of Packet */
#define E1000_RXD_STAT_IXSM 0x04 /* Ignore checksum */
#define E1000_RXD_STAT_VP 0x08 /* IEEE VLAN Packet */
#define E1000_RXD_STAT_UDPCS 0x10 /* UDP xsum caculated */
#define E1000_RXD_STAT_UDPCS 0x10 /* UDP xsum calculated */
#define E1000_RXD_STAT_TCPCS 0x20 /* TCP xsum calculated */
#define E1000_RXD_ERR_CE 0x01 /* CRC Error */
#define E1000_RXD_ERR_SE 0x02 /* Symbol Error */
@ -223,7 +223,7 @@
#define E1000_STATUS_LAN_INIT_DONE 0x00000200 /* Lan Init Completion by NVM */
#define E1000_STATUS_GIO_MASTER_ENABLE 0x00080000 /* Status of Master requests. */
/* Constants used to intrepret the masked PCI-X bus speed. */
/* Constants used to interpret the masked PCI-X bus speed. */
#define HALF_DUPLEX 1
#define FULL_DUPLEX 2
@ -517,7 +517,7 @@
/* PHY 1000 MII Register/Bit Definitions */
/* PHY Registers defined by IEEE */
#define PHY_CONTROL 0x00 /* Control Register */
#define PHY_STATUS 0x01 /* Status Regiser */
#define PHY_STATUS 0x01 /* Status Register */
#define PHY_ID1 0x02 /* Phy Id Reg (word 1) */
#define PHY_ID2 0x03 /* Phy Id Reg (word 2) */
#define PHY_AUTONEG_ADV 0x04 /* Autoneg Advertisement */

3
drivers/net/e1000e/e1000.h
View File

@ -42,8 +42,7 @@
struct e1000_info;
#define ndev_printk(level, netdev, format, arg...) \
printk(level "%s: %s: " format, (netdev)->dev.parent->bus_id, \
(netdev)->name, ## arg)
printk(level "%s: " format, (netdev)->name, ## arg)
#ifdef DEBUG
#define ndev_dbg(netdev, format, arg...) \

4
drivers/net/e1000e/hw.h
View File

@ -184,7 +184,7 @@ enum e1e_registers {
E1000_ICRXDMTC = 0x04120, /* Irq Cause Rx Desc MinThreshold Count */
E1000_ICRXOC = 0x04124, /* Irq Cause Receiver Overrun Count */
E1000_RXCSUM = 0x05000, /* RX Checksum Control - RW */
E1000_RFCTL = 0x05008, /* Receive Filter Control*/
E1000_RFCTL = 0x05008, /* Receive Filter Control */
E1000_MTA = 0x05200, /* Multicast Table Array - RW Array */
E1000_RA = 0x05400, /* Receive Address - RW Array */
E1000_VFTA = 0x05600, /* VLAN Filter Table Array - RW Array */
@ -202,7 +202,7 @@ enum e1e_registers {
E1000_FACTPS = 0x05B30, /* Function Active and Power State to MNG */
E1000_SWSM = 0x05B50, /* SW Semaphore */
E1000_FWSM = 0x05B54, /* FW Semaphore */
E1000_HICR = 0x08F00, /* Host Inteface Control */
E1000_HICR = 0x08F00, /* Host Interface Control */
};
/* RSS registers */

24
drivers/net/e1000e/ich8lan.c
View File

@ -671,7 +671,7 @@ static s32 e1000_get_phy_info_ich8lan(struct e1000_hw *hw)
* e1000_check_polarity_ife_ich8lan - Check cable polarity for IFE PHY
* @hw: pointer to the HW structure
*
* Polarity is determined on the polarity reveral feature being enabled.
* Polarity is determined on the polarity reversal feature being enabled.
* This function is only called by other family-specific
* routines.
**/
@ -947,7 +947,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)
/* Either we should have a hardware SPI cycle in progress
* bit to check against, in order to start a new cycle or
* FDONE bit should be changed in the hardware so that it
* is 1 after harware reset, which can then be used as an
* is 1 after hardware reset, which can then be used as an
* indication whether a cycle is in progress or has been
* completed.
*/
@ -1155,7 +1155,7 @@ static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
* which writes the checksum to the shadow ram. The changes in the shadow
* ram are then committed to the EEPROM by processing each bank at a time
* checking for the modified bit and writing only the pending changes.
* After a succesful commit, the shadow ram is cleared and is ready for
* After a successful commit, the shadow ram is cleared and is ready for
* future writes.
**/
static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)
@ -1680,7 +1680,7 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
* - initialize LED identification
* - setup receive address registers
* - setup flow control
* - setup transmit discriptors
* - setup transmit descriptors
* - clear statistics
**/
static s32 e1000_init_hw_ich8lan(struct e1000_hw *hw)
@ -1961,7 +1961,7 @@ static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw)
E1000_PHY_CTRL_NOND0A_GBE_DISABLE);
ew32(PHY_CTRL, phy_ctrl);
/* Call gig speed drop workaround on Giga disable before accessing
/* Call gig speed drop workaround on Gig disable before accessing
* any PHY registers */
e1000e_gig_downshift_workaround_ich8lan(hw);
@ -1972,7 +1972,7 @@ static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw)
/**
* e1000_set_kmrn_lock_loss_workaound_ich8lan - Set Kumeran workaround state
* @hw: pointer to the HW structure
* @state: boolean value used to set the current Kumaran workaround state
* @state: boolean value used to set the current Kumeran workaround state
*
* If ICH8, set the current Kumeran workaround state (enabled - TRUE
* /disabled - FALSE).
@ -2017,7 +2017,7 @@ void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw)
E1000_PHY_CTRL_NOND0A_GBE_DISABLE);
ew32(PHY_CTRL, reg);
/* Call gig speed drop workaround on Giga disable before
/* Call gig speed drop workaround on Gig disable before
* accessing any PHY registers */
if (hw->mac.type == e1000_ich8lan)
e1000e_gig_downshift_workaround_ich8lan(hw);
@ -2045,7 +2045,7 @@ void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw)
* @hw: pointer to the HW structure
*
* Steps to take when dropping from 1Gb/s (eg. link cable removal (LSC),
* LPLU, Giga disable, MDIC PHY reset):
* LPLU, Gig disable, MDIC PHY reset):
* 1) Set Kumeran Near-end loopback
* 2) Clear Kumeran Near-end loopback
* Should only be called for ICH8[m] devices with IGP_3 Phy.
@ -2089,10 +2089,10 @@ static s32 e1000_cleanup_led_ich8lan(struct e1000_hw *hw)
}
/**
* e1000_led_on_ich8lan - Turn LED's on
* e1000_led_on_ich8lan - Turn LEDs on
* @hw: pointer to the HW structure
*
* Turn on the LED's.
* Turn on the LEDs.
**/
static s32 e1000_led_on_ich8lan(struct e1000_hw *hw)
{
@ -2105,10 +2105,10 @@ static s32 e1000_led_on_ich8lan(struct e1000_hw *hw)
}
/**
* e1000_led_off_ich8lan - Turn LED's off
* e1000_led_off_ich8lan - Turn LEDs off
* @hw: pointer to the HW structure
*
* Turn off the LED's.
* Turn off the LEDs.
**/
static s32 e1000_led_off_ich8lan(struct e1000_hw *hw)
{

50
drivers/net/e1000e/lib.c
View File

@ -589,9 +589,6 @@ static s32 e1000_set_default_fc_generic(struct e1000_hw *hw)
s32 ret_val;
u16 nvm_data;
if (mac->fc != e1000_fc_default)
return 0;
/* Read and store word 0x0F of the EEPROM. This word contains bits
* that determine the hardware's default PAUSE (flow control) mode,
* a bit that determines whether the HW defaults to enabling or
@ -1107,34 +1104,13 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
(mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
mac->fc = e1000_fc_rx_pause;
hw_dbg(hw, "Flow Control = RX PAUSE frames only.\r\n");
}
/* Per the IEEE spec, at this point flow control should be
* disabled. However, we want to consider that we could
* be connected to a legacy switch that doesn't advertise
* desired flow control, but can be forced on the link
* partner. So if we advertised no flow control, that is
* what we will resolve to. If we advertised some kind of
* receive capability (Rx Pause Only or Full Flow Control)
* and the link partner advertised none, we will configure
* ourselves to enable Rx Flow Control only. We can do
* this safely for two reasons: If the link partner really
* didn't want flow control enabled, and we enable Rx, no
* harm done since we won't be receiving any PAUSE frames
* anyway. If the intent on the link partner was to have
* flow control enabled, then by us enabling RX only, we
* can at least receive pause frames and process them.
* This is a good idea because in most cases, since we are
* predominantly a server NIC, more times than not we will
* be asked to delay transmission of packets than asking
* our link partner to pause transmission of frames.
*/
else if ((mac->original_fc == e1000_fc_none) ||
(mac->original_fc == e1000_fc_tx_pause)) {
} else {
/*
* Per the IEEE spec, at this point flow control
* should be disabled.
*/
mac->fc = e1000_fc_none;
hw_dbg(hw, "Flow Control = NONE.\r\n");
} else {
mac->fc = e1000_fc_rx_pause;
hw_dbg(hw, "Flow Control = RX PAUSE frames only.\r\n");
}
/* Now we need to do one last check... If we auto-
@ -1164,7 +1140,7 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
}
/**
* e1000e_get_speed_and_duplex_copper - Retreive current speed/duplex
* e1000e_get_speed_and_duplex_copper - Retrieve current speed/duplex
* @hw: pointer to the HW structure
* @speed: stores the current speed
* @duplex: stores the current duplex
@ -1200,7 +1176,7 @@ s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *dup
}
/**
* e1000e_get_speed_and_duplex_fiber_serdes - Retreive current speed/duplex
* e1000e_get_speed_and_duplex_fiber_serdes - Retrieve current speed/duplex
* @hw: pointer to the HW structure
* @speed: stores the current speed
* @duplex: stores the current duplex
@ -1410,7 +1386,7 @@ s32 e1000e_cleanup_led_generic(struct e1000_hw *hw)
* e1000e_blink_led - Blink LED
* @hw: pointer to the HW structure
*
* Blink the led's which are set to be on.
* Blink the LEDs which are set to be on.
**/
s32 e1000e_blink_led(struct e1000_hw *hw)
{
@ -1515,7 +1491,7 @@ void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop)
* @hw: pointer to the HW structure
*
* Returns 0 if successful, else returns -10
* (-E1000_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not casued
* (-E1000_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not caused
* the master requests to be disabled.
*
* Disables PCI-Express master access and verifies there are no pending
@ -1876,7 +1852,7 @@ static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw)
}
/**
* e1000e_read_nvm_spi - Read EEPROM's using SPI
* e1000e_read_nvm_spi - Reads EEPROM using SPI
* @hw: pointer to the HW structure
* @offset: offset of word in the EEPROM to read
* @words: number of words to read
@ -1980,7 +1956,7 @@ s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
* Writes data to EEPROM at offset using SPI interface.
*
* If e1000e_update_nvm_checksum is not called after this function , the
* EEPROM will most likley contain an invalid checksum.
* EEPROM will most likely contain an invalid checksum.
**/
s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
{
@ -2222,7 +2198,7 @@ static u8 e1000_calculate_checksum(u8 *buffer, u32 length)
*
* Returns E1000_success upon success, else E1000_ERR_HOST_INTERFACE_COMMAND
*
* This function checks whether the HOST IF is enabled for command operaton
* This function checks whether the HOST IF is enabled for command operation
* and also checks whether the previous command is completed. It busy waits
* in case of previous command is not completed.
**/
@ -2254,7 +2230,7 @@ static s32 e1000_mng_enable_host_if(struct e1000_hw *hw)
}
/**
* e1000e_check_mng_mode - check managament mode
* e1000e_check_mng_mode - check management mode
* @hw: pointer to the HW structure
*
* Reads the firmware semaphore register and returns true (>0) if

18
drivers/net/e1000e/netdev.c
View File

@ -1006,7 +1006,7 @@ static void e1000_irq_enable(struct e1000_adapter *adapter)
* e1000_get_hw_control - get control of the h/w from f/w
* @adapter: address of board private structure
*
* e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
* e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
* For ASF and Pass Through versions of f/w this means that
* the driver is loaded. For AMT version (only with 82573)
* of the f/w this means that the network i/f is open.
@ -1032,7 +1032,7 @@ static void e1000_get_hw_control(struct e1000_adapter *adapter)
* e1000_release_hw_control - release control of the h/w to f/w
* @adapter: address of board private structure
*
* e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
* e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
* For ASF and Pass Through versions of f/w this means that the
* driver is no longer loaded. For AMT version (only with 82573) i
* of the f/w this means that the network i/f is closed.
@ -1241,6 +1241,11 @@ void e1000e_free_rx_resources(struct e1000_adapter *adapter)
/**
* e1000_update_itr - update the dynamic ITR value based on statistics
* @adapter: pointer to adapter
* @itr_setting: current adapter->itr
* @packets: the number of packets during this measurement interval
* @bytes: the number of bytes during this measurement interval
*
* Stores a new ITR value based on packets and byte
* counts during the last interrupt. The advantage of per interrupt
* computation is faster updates and more accurate ITR for the current
@ -1250,10 +1255,6 @@ void e1000e_free_rx_resources(struct e1000_adapter *adapter)
* while increasing bulk throughput.
* this functionality is controlled by the InterruptThrottleRate module
* parameter (see e1000_param.c)
* @adapter: pointer to adapter
* @itr_setting: current adapter->itr
* @packets: the number of packets during this measurement interval
* @bytes: the number of bytes during this measurement interval
**/
static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
u16 itr_setting, int packets,
@ -1366,6 +1367,7 @@ set_itr_now:
/**
* e1000_clean - NAPI Rx polling callback
* @adapter: board private structure
* @budget: amount of packets driver is allowed to process this poll
**/
static int e1000_clean(struct napi_struct *napi, int budget)
{
@ -2000,7 +2002,7 @@ static void e1000_power_down_phy(struct e1000_adapter *adapter)
e1000_check_reset_block(hw))
return;
/* managebility (AMT) is enabled */
/* manageability (AMT) is enabled */
if (er32(MANC) & E1000_MANC_SMBUS_EN)
return;
@ -3488,7 +3490,6 @@ static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
static void e1000e_disable_l1aspm(struct pci_dev *pdev)
{
int pos;
u32 cap;
u16 val;
/*
@ -3503,7 +3504,6 @@ static void e1000e_disable_l1aspm(struct pci_dev *pdev)
* active.
*/
pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
pci_read_config_dword(pdev, pos + PCI_EXP_LNKCAP, &cap);
pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
if (val & 0x2) {
dev_warn(&pdev->dev, "Disabling L1 ASPM\n");

10
drivers/net/e1000e/phy.c
View File

@ -121,7 +121,7 @@ s32 e1000e_phy_reset_dsp(struct e1000_hw *hw)
* @offset: register offset to be read
* @data: pointer to the read data
*
* Reads the MDI control regsiter in the PHY at offset and stores the
* Reads the MDI control register in the PHY at offset and stores the
* information read to data.
**/
static s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
@ -1172,7 +1172,7 @@ s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active)
}
/**
* e1000e_check_downshift - Checks whether a downshift in speed occured
* e1000e_check_downshift - Checks whether a downshift in speed occurred
* @hw: pointer to the HW structure
*
* Success returns 0, Failure returns 1
@ -1388,8 +1388,8 @@ s32 e1000e_get_cable_length_m88(struct e1000_hw *hw)
*
* The automatic gain control (agc) normalizes the amplitude of the
* received signal, adjusting for the attenuation produced by the
* cable. By reading the AGC registers, which reperesent the
* cobination of course and fine gain value, the value can be put
* cable. By reading the AGC registers, which represent the
* combination of course and fine gain value, the value can be put
* into a lookup table to obtain the approximate cable length
* for each channel.
**/
@ -1619,7 +1619,7 @@ s32 e1000e_phy_sw_reset(struct e1000_hw *hw)
* Verify the reset block is not blocking us from resetting. Acquire
* semaphore (if necessary) and read/set/write the device control reset
* bit in the PHY. Wait the appropriate delay time for the device to
* reset and relase the semaphore (if necessary).
* reset and release the semaphore (if necessary).
**/
s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw)
{

34
drivers/net/ehea/ehea.h
View File

@ -40,7 +40,7 @@
#include <asm/io.h>
#define DRV_NAME "ehea"
#define DRV_VERSION "EHEA_0083"
#define DRV_VERSION "EHEA_0087"
/* eHEA capability flags */
#define DLPAR_PORT_ADD_REM 1
@ -386,6 +386,13 @@ struct ehea_port_res {
#define EHEA_MAX_PORTS 16
#define EHEA_NUM_PORTRES_FW_HANDLES 6 /* QP handle, SendCQ handle,
RecvCQ handle, EQ handle,
SendMR handle, RecvMR handle */
#define EHEA_NUM_PORT_FW_HANDLES 1 /* EQ handle */
#define EHEA_NUM_ADAPTER_FW_HANDLES 2 /* MR handle, NEQ handle */
struct ehea_adapter {
u64 handle;
struct of_device *ofdev;
@ -405,6 +412,31 @@ struct ehea_mc_list {
u64 macaddr;
};
/* kdump support */
struct ehea_fw_handle_entry {
u64 adh; /* Adapter Handle */
u64 fwh; /* Firmware Handle */
};
struct ehea_fw_handle_array {
struct ehea_fw_handle_entry *arr;
int num_entries;
struct semaphore lock;
};
struct ehea_bcmc_reg_entry {
u64 adh; /* Adapter Handle */
u32 port_id; /* Logical Port Id */
u8 reg_type; /* Registration Type */
u64 macaddr;
};
struct ehea_bcmc_reg_array {
struct ehea_bcmc_reg_entry *arr;
int num_entries;
struct semaphore lock;
};
#define EHEA_PORT_UP 1
#define EHEA_PORT_DOWN 0
#define EHEA_PHY_LINK_UP 1

281
drivers/net/ehea/ehea_main.c
View File

@ -35,6 +35,7 @@
#include <linux/if_ether.h>
#include <linux/notifier.h>
#include <linux/reboot.h>
#include <asm/kexec.h>
#include <net/ip.h>
@ -98,8 +99,10 @@ static int port_name_cnt;
static LIST_HEAD(adapter_list);
u64 ehea_driver_flags;
struct work_struct ehea_rereg_mr_task;
struct semaphore dlpar_mem_lock;
struct ehea_fw_handle_array ehea_fw_handles;
struct ehea_bcmc_reg_array ehea_bcmc_regs;
static int __devinit ehea_probe_adapter(struct of_device *dev,
const struct of_device_id *id);
@ -132,6 +135,160 @@ void ehea_dump(void *adr, int len, char *msg)
}
}
static void ehea_update_firmware_handles(void)
{
struct ehea_fw_handle_entry *arr = NULL;
struct ehea_adapter *adapter;
int num_adapters = 0;
int num_ports = 0;
int num_portres = 0;
int i = 0;
int num_fw_handles, k, l;
/* Determine number of handles */
list_for_each_entry(adapter, &adapter_list, list) {
num_adapters++;
for (k = 0; k < EHEA_MAX_PORTS; k++) {
struct ehea_port *port = adapter->port[k];
if (!port || (port->state != EHEA_PORT_UP))
continue;
num_ports++;
num_portres += port->num_def_qps + port->num_add_tx_qps;
}
}
num_fw_handles = num_adapters * EHEA_NUM_ADAPTER_FW_HANDLES +
num_ports * EHEA_NUM_PORT_FW_HANDLES +
num_portres * EHEA_NUM_PORTRES_FW_HANDLES;
if (num_fw_handles) {
arr = kzalloc(num_fw_handles * sizeof(*arr), GFP_KERNEL);
if (!arr)
return; /* Keep the existing array */
} else
goto out_update;
list_for_each_entry(adapter, &adapter_list, list) {
for (k = 0; k < EHEA_MAX_PORTS; k++) {
struct ehea_port *port = adapter->port[k];
if (!port || (port->state != EHEA_PORT_UP))
continue;
for (l = 0;
l < port->num_def_qps + port->num_add_tx_qps;
l++) {
struct ehea_port_res *pr = &port->port_res[l];
arr[i].adh = adapter->handle;
arr[i++].fwh = pr->qp->fw_handle;
arr[i].adh = adapter->handle;
arr[i++].fwh = pr->send_cq->fw_handle;
arr[i].adh = adapter->handle;
arr[i++].fwh = pr->recv_cq->fw_handle;
arr[i].adh = adapter->handle;
arr[i++].fwh = pr->eq->fw_handle;
arr[i].adh = adapter->handle;
arr[i++].fwh = pr->send_mr.handle;
arr[i].adh = adapter->handle;
arr[i++].fwh = pr->recv_mr.handle;
}
arr[i].adh = adapter->handle;
arr[i++].fwh = port->qp_eq->fw_handle;
}
arr[i].adh = adapter->handle;
arr[i++].fwh = adapter->neq->fw_handle;
if (adapter->mr.handle) {
arr[i].adh = adapter->handle;
arr[i++].fwh = adapter->mr.handle;
}
}
out_update:
kfree(ehea_fw_handles.arr);
ehea_fw_handles.arr = arr;
ehea_fw_handles.num_entries = i;
}
static void ehea_update_bcmc_registrations(void)
{
struct ehea_bcmc_reg_entry *arr = NULL;
struct ehea_adapter *adapter;
struct ehea_mc_list *mc_entry;
int num_registrations = 0;
int i = 0;
int k;
/* Determine number of registrations */
list_for_each_entry(adapter, &adapter_list, list)
for (k = 0; k < EHEA_MAX_PORTS; k++) {
struct ehea_port *port = adapter->port[k];
if (!port || (port->state != EHEA_PORT_UP))
continue;
num_registrations += 2; /* Broadcast registrations */
list_for_each_entry(mc_entry, &port->mc_list->list,list)
num_registrations += 2;
}
if (num_registrations) {
arr = kzalloc(num_registrations * sizeof(*arr), GFP_KERNEL);
if (!arr)
return; /* Keep the existing array */
} else
goto out_update;
list_for_each_entry(adapter, &adapter_list, list) {
for (k = 0; k < EHEA_MAX_PORTS; k++) {
struct ehea_port *port = adapter->port[k];
if (!port || (port->state != EHEA_PORT_UP))
continue;
arr[i].adh = adapter->handle;
arr[i].port_id = port->logical_port_id;
arr[i].reg_type = EHEA_BCMC_BROADCAST |
EHEA_BCMC_UNTAGGED;
arr[i++].macaddr = port->mac_addr;
arr[i].adh = adapter->handle;
arr[i].port_id = port->logical_port_id;
arr[i].reg_type = EHEA_BCMC_BROADCAST |
EHEA_BCMC_VLANID_ALL;
arr[i++].macaddr = port->mac_addr;
list_for_each_entry(mc_entry,
&port->mc_list->list, list) {
arr[i].adh = adapter->handle;
arr[i].port_id = port->logical_port_id;
arr[i].reg_type = EHEA_BCMC_SCOPE_ALL |
EHEA_BCMC_MULTICAST |
EHEA_BCMC_UNTAGGED;
arr[i++].macaddr = mc_entry->macaddr;
arr[i].adh = adapter->handle;
arr[i].port_id = port->logical_port_id;
arr[i].reg_type = EHEA_BCMC_SCOPE_ALL |
EHEA_BCMC_MULTICAST |
EHEA_BCMC_VLANID_ALL;
arr[i++].macaddr = mc_entry->macaddr;
}
}
}
out_update:
kfree(ehea_bcmc_regs.arr);
ehea_bcmc_regs.arr = arr;
ehea_bcmc_regs.num_entries = i;
}
static struct net_device_stats *ehea_get_stats(struct net_device *dev)
{
struct ehea_port *port = netdev_priv(dev);
@ -1601,19 +1758,25 @@ static int ehea_set_mac_addr(struct net_device *dev, void *sa)
memcpy(dev->dev_addr, mac_addr->sa_data, dev->addr_len);
down(&ehea_bcmc_regs.lock);
/* Deregister old MAC in pHYP */
ret = ehea_broadcast_reg_helper(port, H_DEREG_BCMC);
if (ret)
goto out_free;
goto out_upregs;
port->mac_addr = cb0->port_mac_addr << 16;
/* Register new MAC in pHYP */
ret = ehea_broadcast_reg_helper(port, H_REG_BCMC);
if (ret)
goto out_free;
goto out_upregs;
ret = 0;
out_upregs:
ehea_update_bcmc_registrations();
up(&ehea_bcmc_regs.lock);
out_free:
kfree(cb0);
out:
@ -1775,9 +1938,11 @@ static void ehea_set_multicast_list(struct net_device *dev)
}
ehea_promiscuous(dev, 0);
down(&ehea_bcmc_regs.lock);
if (dev->flags & IFF_ALLMULTI) {
ehea_allmulti(dev, 1);
return;
goto out;
}
ehea_allmulti(dev, 0);
@ -1803,6 +1968,8 @@ static void ehea_set_multicast_list(struct net_device *dev)
}
out:
ehea_update_bcmc_registrations();
up(&ehea_bcmc_regs.lock);
return;
}
@ -2285,6 +2452,8 @@ static int ehea_up(struct net_device *dev)
if (port->state == EHEA_PORT_UP)
return 0;
down(&ehea_fw_handles.lock);
ret = ehea_port_res_setup(port, port->num_def_qps,
port->num_add_tx_qps);
if (ret) {
@ -2321,8 +2490,17 @@ static int ehea_up(struct net_device *dev)
}
}
ret = 0;
down(&ehea_bcmc_regs.lock);
ret = ehea_broadcast_reg_helper(port, H_REG_BCMC);
if (ret) {
ret = -EIO;
goto out_free_irqs;
}
port->state = EHEA_PORT_UP;
ret = 0;
goto out;
out_free_irqs:
@ -2334,6 +2512,12 @@ out:
if (ret)
ehea_info("Failed starting %s. ret=%i", dev->name, ret);
ehea_update_bcmc_registrations();
up(&ehea_bcmc_regs.lock);
ehea_update_firmware_handles();
up(&ehea_fw_handles.lock);
return ret;
}
@ -2382,16 +2566,27 @@ static int ehea_down(struct net_device *dev)
if (port->state == EHEA_PORT_DOWN)
return 0;
down(&ehea_bcmc_regs.lock);
ehea_drop_multicast_list(dev);
ehea_broadcast_reg_helper(port, H_DEREG_BCMC);
ehea_free_interrupts(dev);
down(&ehea_fw_handles.lock);
port->state = EHEA_PORT_DOWN;
ehea_update_bcmc_registrations();
up(&ehea_bcmc_regs.lock);
ret = ehea_clean_all_portres(port);
if (ret)
ehea_info("Failed freeing resources for %s. ret=%i",
dev->name, ret);
ehea_update_firmware_handles();
up(&ehea_fw_handles.lock);
return ret;
}
@ -2920,19 +3115,12 @@ struct ehea_port *ehea_setup_single_port(struct ehea_adapter *adapter,
dev->watchdog_timeo = EHEA_WATCH_DOG_TIMEOUT;
INIT_WORK(&port->reset_task, ehea_reset_port);
ret = ehea_broadcast_reg_helper(port, H_REG_BCMC);
if (ret) {
ret = -EIO;
goto out_unreg_port;
}
ehea_set_ethtool_ops(dev);
ret = register_netdev(dev);
if (ret) {
ehea_error("register_netdev failed. ret=%d", ret);
goto out_dereg_bc;
goto out_unreg_port;
}
port->lro_max_aggr = lro_max_aggr;
@ -2949,9 +3137,6 @@ struct ehea_port *ehea_setup_single_port(struct ehea_adapter *adapter,
return port;
out_dereg_bc:
ehea_broadcast_reg_helper(port, H_DEREG_BCMC);
out_unreg_port:
ehea_unregister_port(port);
@ -2971,7 +3156,6 @@ static void ehea_shutdown_single_port(struct ehea_port *port)
{
unregister_netdev(port->netdev);
ehea_unregister_port(port);
ehea_broadcast_reg_helper(port, H_DEREG_BCMC);
kfree(port->mc_list);
free_netdev(port->netdev);
port->adapter->active_ports--;
@ -3014,7 +3198,6 @@ static int ehea_setup_ports(struct ehea_adapter *adapter)
i++;
};
return 0;
}
@ -3159,6 +3342,7 @@ static int __devinit ehea_probe_adapter(struct of_device *dev,
ehea_error("Invalid ibmebus device probed");
return -EINVAL;
}
down(&ehea_fw_handles.lock);
adapter = kzalloc(sizeof(*adapter), GFP_KERNEL);
if (!adapter) {
@ -3239,7 +3423,10 @@ out_kill_eq:
out_free_ad:
kfree(adapter);
out:
ehea_update_firmware_handles();
up(&ehea_fw_handles.lock);
return ret;
}
@ -3258,18 +3445,41 @@ static int __devexit ehea_remove(struct of_device *dev)
flush_scheduled_work();
down(&ehea_fw_handles.lock);
ibmebus_free_irq(adapter->neq->attr.ist1, adapter);
tasklet_kill(&adapter->neq_tasklet);
ehea_destroy_eq(adapter->neq);
ehea_remove_adapter_mr(adapter);
list_del(&adapter->list);
kfree(adapter);
ehea_update_firmware_handles();
up(&ehea_fw_handles.lock);
return 0;
}
void ehea_crash_handler(void)
{
int i;
if (ehea_fw_handles.arr)
for (i = 0; i < ehea_fw_handles.num_entries; i++)
ehea_h_free_resource(ehea_fw_handles.arr[i].adh,
ehea_fw_handles.arr[i].fwh,
FORCE_FREE);
if (ehea_bcmc_regs.arr)
for (i = 0; i < ehea_bcmc_regs.num_entries; i++)
ehea_h_reg_dereg_bcmc(ehea_bcmc_regs.arr[i].adh,
ehea_bcmc_regs.arr[i].port_id,
ehea_bcmc_regs.arr[i].reg_type,
ehea_bcmc_regs.arr[i].macaddr,
0, H_DEREG_BCMC);
}
static int ehea_reboot_notifier(struct notifier_block *nb,
unsigned long action, void *unused)
{
@ -3330,7 +3540,12 @@ int __init ehea_module_init(void)
INIT_WORK(&ehea_rereg_mr_task, ehea_rereg_mrs);
memset(&ehea_fw_handles, 0, sizeof(ehea_fw_handles));
memset(&ehea_bcmc_regs, 0, sizeof(ehea_bcmc_regs));
sema_init(&dlpar_mem_lock, 1);
sema_init(&ehea_fw_handles.lock, 1);
sema_init(&ehea_bcmc_regs.lock, 1);
ret = check_module_parm();
if (ret)
@ -3340,12 +3555,18 @@ int __init ehea_module_init(void)
if (ret)
goto out;
register_reboot_notifier(&ehea_reboot_nb);
ret = register_reboot_notifier(&ehea_reboot_nb);
if (ret)
ehea_info("failed registering reboot notifier");
ret = crash_shutdown_register(&ehea_crash_handler);
if (ret)
ehea_info("failed registering crash handler");
ret = ibmebus_register_driver(&ehea_driver);
if (ret) {
ehea_error("failed registering eHEA device driver on ebus");
goto out;
goto out2;
}
ret = driver_create_file(&ehea_driver.driver,
@ -3353,21 +3574,33 @@ int __init ehea_module_init(void)
if (ret) {
ehea_error("failed to register capabilities attribute, ret=%d",
ret);
unregister_reboot_notifier(&ehea_reboot_nb);
ibmebus_unregister_driver(&ehea_driver);
goto out;
goto out3;
}
return ret;
out3:
ibmebus_unregister_driver(&ehea_driver);
out2:
unregister_reboot_notifier(&ehea_reboot_nb);
crash_shutdown_unregister(&ehea_crash_handler);
out:
return ret;
}
static void __exit ehea_module_exit(void)
{
int ret;
flush_scheduled_work();
driver_remove_file(&ehea_driver.driver, &driver_attr_capabilities);
ibmebus_unregister_driver(&ehea_driver);
unregister_reboot_notifier(&ehea_reboot_nb);
ret = crash_shutdown_unregister(&ehea_crash_handler);
if (ret)
ehea_info("failed unregistering crash handler");
kfree(ehea_fw_handles.arr);
kfree(ehea_bcmc_regs.arr);
ehea_destroy_busmap();
}

7
drivers/net/fs_enet/fs_enet-main.c
View File

@ -946,16 +946,11 @@ static int fs_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
{
struct fs_enet_private *fep = netdev_priv(dev);
struct mii_ioctl_data *mii = (struct mii_ioctl_data *)&rq->ifr_data;
unsigned long flags;
int rc;
if (!netif_running(dev))
return -EINVAL;
spin_lock_irqsave(&fep->lock, flags);
rc = phy_mii_ioctl(fep->phydev, mii, cmd);
spin_unlock_irqrestore(&fep->lock, flags);
return rc;
return phy_mii_ioctl(fep->phydev, mii, cmd);
}
extern int fs_mii_connect(struct net_device *dev);

14
drivers/net/gianfar.c
View File

@ -605,7 +605,7 @@ void stop_gfar(struct net_device *dev)
free_skb_resources(priv);
dma_free_coherent(NULL,
dma_free_coherent(&dev->dev,
sizeof(struct txbd8)*priv->tx_ring_size
+ sizeof(struct rxbd8)*priv->rx_ring_size,
priv->tx_bd_base,
@ -626,7 +626,7 @@ static void free_skb_resources(struct gfar_private *priv)
for (i = 0; i < priv->tx_ring_size; i++) {
if (priv->tx_skbuff[i]) {
dma_unmap_single(NULL, txbdp->bufPtr,
dma_unmap_single(&priv->dev->dev, txbdp->bufPtr,
txbdp->length,
DMA_TO_DEVICE);
dev_kfree_skb_any(priv->tx_skbuff[i]);
@ -643,7 +643,7 @@ static void free_skb_resources(struct gfar_private *priv)
if(priv->rx_skbuff != NULL) {
for (i = 0; i < priv->rx_ring_size; i++) {
if (priv->rx_skbuff[i]) {
dma_unmap_single(NULL, rxbdp->bufPtr,
dma_unmap_single(&priv->dev->dev, rxbdp->bufPtr,
priv->rx_buffer_size,
DMA_FROM_DEVICE);
@ -708,7 +708,7 @@ int startup_gfar(struct net_device *dev)
gfar_write(&regs->imask, IMASK_INIT_CLEAR);
/* Allocate memory for the buffer descriptors */
vaddr = (unsigned long) dma_alloc_coherent(NULL,
vaddr = (unsigned long) dma_alloc_coherent(&dev->dev,
sizeof (struct txbd8) * priv->tx_ring_size +
sizeof (struct rxbd8) * priv->rx_ring_size,
&addr, GFP_KERNEL);
@ -919,7 +919,7 @@ err_irq_fail:
rx_skb_fail:
free_skb_resources(priv);
tx_skb_fail:
dma_free_coherent(NULL,
dma_free_coherent(&dev->dev,
sizeof(struct txbd8)*priv->tx_ring_size
+ sizeof(struct rxbd8)*priv->rx_ring_size,
priv->tx_bd_base,
@ -1053,7 +1053,7 @@ static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
/* Set buffer length and pointer */
txbdp->length = skb->len;
txbdp->bufPtr = dma_map_single(NULL, skb->data,
txbdp->bufPtr = dma_map_single(&dev->dev, skb->data,
skb->len, DMA_TO_DEVICE);
/* Save the skb pointer so we can free it later */
@ -1332,7 +1332,7 @@ struct sk_buff * gfar_new_skb(struct net_device *dev, struct rxbd8 *bdp)
*/
skb_reserve(skb, alignamount);
bdp->bufPtr = dma_map_single(NULL, skb->data,
bdp->bufPtr = dma_map_single(&dev->dev, skb->data,
priv->rx_buffer_size, DMA_FROM_DEVICE);
bdp->length = 0;

15
drivers/net/igb/igb_main.c
View File

@ -439,7 +439,7 @@ static int igb_request_irq(struct igb_adapter *adapter)
err = igb_request_msix(adapter);
if (!err) {
/* enable IAM, auto-mask,
* DO NOT USE EIAME or IAME in legacy mode */
* DO NOT USE EIAM or IAM in legacy mode */
wr32(E1000_IAM, IMS_ENABLE_MASK);
goto request_done;
}
@ -465,14 +465,9 @@ static int igb_request_irq(struct igb_adapter *adapter)
err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
netdev->name, netdev);
if (err) {
if (err)
dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
err);
goto request_done;
}
/* enable IAM, auto-mask */
wr32(E1000_IAM, IMS_ENABLE_MASK);
request_done:
return err;
@ -821,7 +816,8 @@ void igb_reset(struct igb_adapter *adapter)
wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
igb_reset_adaptive(&adapter->hw);
adapter->hw.phy.ops.get_phy_info(&adapter->hw);
if (adapter->hw.phy.ops.get_phy_info)
adapter->hw.phy.ops.get_phy_info(&adapter->hw);
}
/**
@ -2057,7 +2053,8 @@ static void igb_set_multi(struct net_device *netdev)
static void igb_update_phy_info(unsigned long data)
{
struct igb_adapter *adapter = (struct igb_adapter *) data;
adapter->hw.phy.ops.get_phy_info(&adapter->hw);
if (adapter->hw.phy.ops.get_phy_info)
adapter->hw.phy.ops.get_phy_info(&adapter->hw);
}
/**

1
drivers/net/ixgb/ixgb_ethtool.c
View File

@ -67,6 +67,7 @@ static struct ixgb_stats ixgb_gstrings_stats[] = {
{"rx_over_errors", IXGB_STAT(net_stats.rx_over_errors)},
{"rx_crc_errors", IXGB_STAT(net_stats.rx_crc_errors)},
{"rx_frame_errors", IXGB_STAT(net_stats.rx_frame_errors)},
{"rx_no_buffer_count", IXGB_STAT(stats.rnbc)},
{"rx_fifo_errors", IXGB_STAT(net_stats.rx_fifo_errors)},
{"rx_missed_errors", IXGB_STAT(net_stats.rx_missed_errors)},
{"tx_aborted_errors", IXGB_STAT(net_stats.tx_aborted_errors)},

2
drivers/net/macb.c
View File

@ -148,7 +148,7 @@ static void macb_handle_link_change(struct net_device *dev)
if (phydev->duplex)
reg |= MACB_BIT(FD);
if (phydev->speed)
if (phydev->speed == SPEED_100)
reg |= MACB_BIT(SPD);
macb_writel(bp, NCFGR, reg);

10
drivers/net/pcmcia/pcnet_cs.c
View File

@ -590,6 +590,13 @@ static int pcnet_config(struct pcmcia_device *link)
dev->if_port = 0;
}
if ((link->conf.ConfigBase == 0x03c0)
&& (link->manf_id == 0x149) && (link->card_id = 0xc1ab)) {
printk(KERN_INFO "pcnet_cs: this is an AX88190 card!\n");
printk(KERN_INFO "pcnet_cs: use axnet_cs instead.\n");
goto failed;
}
local_hw_info = get_hwinfo(link);
if (local_hw_info == NULL)
local_hw_info = get_prom(link);
@ -1567,12 +1574,11 @@ static struct pcmcia_device_id pcnet_ids[] = {
PCMCIA_DEVICE_MANF_CARD(0x0104, 0x0145),
PCMCIA_DEVICE_MANF_CARD(0x0149, 0x0230),
PCMCIA_DEVICE_MANF_CARD(0x0149, 0x4530),
/* PCMCIA_DEVICE_MANF_CARD(0x0149, 0xc1ab), conflict with axnet_cs */
PCMCIA_DEVICE_MANF_CARD(0x0149, 0xc1ab),
PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0110),
PCMCIA_DEVICE_MANF_CARD(0x01bf, 0x2328),
PCMCIA_DEVICE_MANF_CARD(0x01bf, 0x8041),
PCMCIA_DEVICE_MANF_CARD(0x0213, 0x2452),
/* PCMCIA_DEVICE_MANF_CARD(0x021b, 0x0202), conflict with axnet_cs */
PCMCIA_DEVICE_MANF_CARD(0x026f, 0x0300),
PCMCIA_DEVICE_MANF_CARD(0x026f, 0x0307),
PCMCIA_DEVICE_MANF_CARD(0x026f, 0x030a),

4
drivers/net/phy/mdio_bus.c
View File

@ -49,13 +49,13 @@ int mdiobus_register(struct mii_bus *bus)
int i;
int err = 0;
mutex_init(&bus->mdio_lock);
if (NULL == bus || NULL == bus->name ||
NULL == bus->read ||
NULL == bus->write)
return -EINVAL;
mutex_init(&bus->mdio_lock);
if (bus->reset)
bus->reset(bus);

1
drivers/net/ps3_gelic_wireless.c
View File

@ -2690,6 +2690,7 @@ int gelic_wl_driver_probe(struct gelic_card *card)
return -ENOMEM;
/* setup net_device structure */
SET_NETDEV_DEV(netdev, &card->dev->core);
gelic_wl_setup_netdev_ops(netdev);
/* setup some of net_device and register it */

15
drivers/net/sis190.c
View File

@ -1633,13 +1633,18 @@ static inline void sis190_init_rxfilter(struct net_device *dev)
static int __devinit sis190_get_mac_addr(struct pci_dev *pdev,
struct net_device *dev)
{
u8 from;
int rc;
pci_read_config_byte(pdev, 0x73, &from);
rc = sis190_get_mac_addr_from_eeprom(pdev, dev);
if (rc < 0) {
u8 reg;
return (from & 0x00000001) ?
sis190_get_mac_addr_from_apc(pdev, dev) :
sis190_get_mac_addr_from_eeprom(pdev, dev);
pci_read_config_byte(pdev, 0x73, &reg);
if (reg & 0x00000001)
rc = sis190_get_mac_addr_from_apc(pdev, dev);
}
return rc;
}
static void sis190_set_speed_auto(struct net_device *dev)

123
drivers/net/sky2.c
View File

@ -572,8 +572,9 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
default:
/* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
/* turn off the Rx LED (LED_RX) */
ledover &= ~PHY_M_LED_MO_RX;
ledover |= PHY_M_LED_MO_RX(MO_LED_OFF);
}
if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
@ -602,7 +603,7 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) {
/* turn on 100 Mbps LED (LED_LINK100) */
ledover |= PHY_M_LED_MO_100;
ledover |= PHY_M_LED_MO_100(MO_LED_ON);
}
if (ledover)
@ -3322,82 +3323,80 @@ static void sky2_set_multicast(struct net_device *dev)
/* Can have one global because blinking is controlled by
* ethtool and that is always under RTNL mutex
*/
static void sky2_led(struct sky2_hw *hw, unsigned port, int on)
static void sky2_led(struct sky2_port *sky2, enum led_mode mode)
{
u16 pg;
struct sky2_hw *hw = sky2->hw;
unsigned port = sky2->port;
switch (hw->chip_id) {
case CHIP_ID_YUKON_XL:
spin_lock_bh(&sky2->phy_lock);
if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
hw->chip_id == CHIP_ID_YUKON_EX ||
hw->chip_id == CHIP_ID_YUKON_SUPR) {
u16 pg;
pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
on ? (PHY_M_LEDC_LOS_CTRL(1) |
PHY_M_LEDC_INIT_CTRL(7) |
PHY_M_LEDC_STA1_CTRL(7) |
PHY_M_LEDC_STA0_CTRL(7))
: 0);
switch (mode) {
case MO_LED_OFF:
gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
PHY_M_LEDC_LOS_CTRL(8) |
PHY_M_LEDC_INIT_CTRL(8) |
PHY_M_LEDC_STA1_CTRL(8) |
PHY_M_LEDC_STA0_CTRL(8));
break;
case MO_LED_ON:
gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
PHY_M_LEDC_LOS_CTRL(9) |
PHY_M_LEDC_INIT_CTRL(9) |
PHY_M_LEDC_STA1_CTRL(9) |
PHY_M_LEDC_STA0_CTRL(9));
break;
case MO_LED_BLINK:
gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
PHY_M_LEDC_LOS_CTRL(0xa) |
PHY_M_LEDC_INIT_CTRL(0xa) |
PHY_M_LEDC_STA1_CTRL(0xa) |
PHY_M_LEDC_STA0_CTRL(0xa));
break;
case MO_LED_NORM:
gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
PHY_M_LEDC_LOS_CTRL(1) |
PHY_M_LEDC_INIT_CTRL(8) |
PHY_M_LEDC_STA1_CTRL(7) |
PHY_M_LEDC_STA0_CTRL(7));
}
gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
break;
default:
gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0);
} else
gm_phy_write(hw, port, PHY_MARV_LED_OVER,
on ? PHY_M_LED_ALL : 0);
}
PHY_M_LED_MO_DUP(mode) |
PHY_M_LED_MO_10(mode) |
PHY_M_LED_MO_100(mode) |
PHY_M_LED_MO_1000(mode) |
PHY_M_LED_MO_RX(mode) |
PHY_M_LED_MO_TX(mode));
spin_unlock_bh(&sky2->phy_lock);
}
/* blink LED's for finding board */
static int sky2_phys_id(struct net_device *dev, u32 data)
{
struct sky2_port *sky2 = netdev_priv(dev);
struct sky2_hw *hw = sky2->hw;
unsigned port = sky2->port;
u16 ledctrl, ledover = 0;
long ms;
int interrupted;
int onoff = 1;
unsigned int i;
if (!data || data > (u32) (MAX_SCHEDULE_TIMEOUT / HZ))
ms = jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT);
else
ms = data * 1000;
if (data == 0)
data = UINT_MAX;
/* save initial values */
spin_lock_bh(&sky2->phy_lock);
if (hw->chip_id == CHIP_ID_YUKON_XL) {
u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
ledctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
} else {
ledctrl = gm_phy_read(hw, port, PHY_MARV_LED_CTRL);
ledover = gm_phy_read(hw, port, PHY_MARV_LED_OVER);
for (i = 0; i < data; i++) {
sky2_led(sky2, MO_LED_ON);
if (msleep_interruptible(500))
break;
sky2_led(sky2, MO_LED_OFF);
if (msleep_interruptible(500))
break;
}
interrupted = 0;
while (!interrupted && ms > 0) {
sky2_led(hw, port, onoff);
onoff = !onoff;
spin_unlock_bh(&sky2->phy_lock);
interrupted = msleep_interruptible(250);
spin_lock_bh(&sky2->phy_lock);
ms -= 250;
}
/* resume regularly scheduled programming */
if (hw->chip_id == CHIP_ID_YUKON_XL) {
u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ledctrl);
gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
} else {
gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
}
spin_unlock_bh(&sky2->phy_lock);
sky2_led(sky2, MO_LED_NORM);
return 0;
}

25
drivers/net/sky2.h
View File

@ -1318,18 +1318,21 @@ enum {
BLINK_670MS = 4,/* 670 ms */
};
/**** PHY_MARV_LED_OVER 16 bit r/w LED control */
enum {
PHY_M_LED_MO_DUP = 3<<10,/* Bit 11..10: Duplex */
PHY_M_LED_MO_10 = 3<<8, /* Bit 9.. 8: Link 10 */
PHY_M_LED_MO_100 = 3<<6, /* Bit 7.. 6: Link 100 */
PHY_M_LED_MO_1000 = 3<<4, /* Bit 5.. 4: Link 1000 */
PHY_M_LED_MO_RX = 3<<2, /* Bit 3.. 2: Rx */
PHY_M_LED_MO_TX = 3<<0, /* Bit 1.. 0: Tx */
/***** PHY_MARV_LED_OVER 16 bit r/w Manual LED Override Reg *****/
#define PHY_M_LED_MO_SGMII(x) ((x)<<14) /* Bit 15..14: SGMII AN Timer */
PHY_M_LED_ALL = PHY_M_LED_MO_DUP | PHY_M_LED_MO_10
| PHY_M_LED_MO_100 | PHY_M_LED_MO_1000
| PHY_M_LED_MO_RX,
#define PHY_M_LED_MO_DUP(x) ((x)<<10) /* Bit 11..10: Duplex */
#define PHY_M_LED_MO_10(x) ((x)<<8) /* Bit 9.. 8: Link 10 */
#define PHY_M_LED_MO_100(x) ((x)<<6) /* Bit 7.. 6: Link 100 */
#define PHY_M_LED_MO_1000(x) ((x)<<4) /* Bit 5.. 4: Link 1000 */
#define PHY_M_LED_MO_RX(x) ((x)<<2) /* Bit 3.. 2: Rx */
#define PHY_M_LED_MO_TX(x) ((x)<<0) /* Bit 1.. 0: Tx */
enum led_mode {
MO_LED_NORM = 0,
MO_LED_BLINK = 1,
MO_LED_OFF = 2,
MO_LED_ON = 3,
};
/***** PHY_MARV_EXT_CTRL_2 16 bit r/w Ext. PHY Specific Ctrl 2 *****/

64
drivers/net/tlan.c
View File

@ -1400,7 +1400,7 @@ static void TLan_SetMulticastList( struct net_device *dev )
*
**************************************************************/
u32 TLan_HandleInvalid( struct net_device *dev, u16 host_int )
static u32 TLan_HandleInvalid( struct net_device *dev, u16 host_int )
{
/* printk( "TLAN: Invalid interrupt on %s.\n", dev->name ); */
return 0;
@ -1432,7 +1432,7 @@ u32 TLan_HandleInvalid( struct net_device *dev, u16 host_int )
*
**************************************************************/
u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int )
static u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int )
{
TLanPrivateInfo *priv = netdev_priv(dev);
int eoc = 0;
@ -1518,7 +1518,7 @@ u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int )
*
**************************************************************/
u32 TLan_HandleStatOverflow( struct net_device *dev, u16 host_int )
static u32 TLan_HandleStatOverflow( struct net_device *dev, u16 host_int )
{
TLan_ReadAndClearStats( dev, TLAN_RECORD );
@ -1554,7 +1554,7 @@ u32 TLan_HandleStatOverflow( struct net_device *dev, u16 host_int )
*
**************************************************************/
u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int )
static u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int )
{
TLanPrivateInfo *priv = netdev_priv(dev);
u32 ack = 0;
@ -1689,7 +1689,7 @@ u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int )
*
**************************************************************/
u32 TLan_HandleDummy( struct net_device *dev, u16 host_int )
static u32 TLan_HandleDummy( struct net_device *dev, u16 host_int )
{
printk( "TLAN: Test interrupt on %s.\n", dev->name );
return 1;
@ -1719,7 +1719,7 @@ u32 TLan_HandleDummy( struct net_device *dev, u16 host_int )
*
**************************************************************/
u32 TLan_HandleTxEOC( struct net_device *dev, u16 host_int )
static u32 TLan_HandleTxEOC( struct net_device *dev, u16 host_int )
{
TLanPrivateInfo *priv = netdev_priv(dev);
TLanList *head_list;
@ -1767,7 +1767,7 @@ u32 TLan_HandleTxEOC( struct net_device *dev, u16 host_int )
*
**************************************************************/
u32 TLan_HandleStatusCheck( struct net_device *dev, u16 host_int )
static u32 TLan_HandleStatusCheck( struct net_device *dev, u16 host_int )
{
TLanPrivateInfo *priv = netdev_priv(dev);
u32 ack;
@ -1842,7 +1842,7 @@ u32 TLan_HandleStatusCheck( struct net_device *dev, u16 host_int )
*
**************************************************************/
u32 TLan_HandleRxEOC( struct net_device *dev, u16 host_int )
static u32 TLan_HandleRxEOC( struct net_device *dev, u16 host_int )
{
TLanPrivateInfo *priv = netdev_priv(dev);
dma_addr_t head_list_phys;
@ -1902,7 +1902,7 @@ u32 TLan_HandleRxEOC( struct net_device *dev, u16 host_int )
*
**************************************************************/
void TLan_Timer( unsigned long data )
static void TLan_Timer( unsigned long data )
{
struct net_device *dev = (struct net_device *) data;
TLanPrivateInfo *priv = netdev_priv(dev);
@ -1983,7 +1983,7 @@ void TLan_Timer( unsigned long data )
*
**************************************************************/
void TLan_ResetLists( struct net_device *dev )
static void TLan_ResetLists( struct net_device *dev )
{
TLanPrivateInfo *priv = netdev_priv(dev);
int i;
@ -2043,7 +2043,7 @@ void TLan_ResetLists( struct net_device *dev )
} /* TLan_ResetLists */
void TLan_FreeLists( struct net_device *dev )
static void TLan_FreeLists( struct net_device *dev )
{
TLanPrivateInfo *priv = netdev_priv(dev);
int i;
@ -2092,7 +2092,7 @@ void TLan_FreeLists( struct net_device *dev )
*
**************************************************************/
void TLan_PrintDio( u16 io_base )
static void TLan_PrintDio( u16 io_base )
{
u32 data0, data1;
int i;
@ -2127,7 +2127,7 @@ void TLan_PrintDio( u16 io_base )
*
**************************************************************/
void TLan_PrintList( TLanList *list, char *type, int num)
static void TLan_PrintList( TLanList *list, char *type, int num)
{
int i;
@ -2163,7 +2163,7 @@ void TLan_PrintList( TLanList *list, char *type, int num)
*
**************************************************************/
void TLan_ReadAndClearStats( struct net_device *dev, int record )
static void TLan_ReadAndClearStats( struct net_device *dev, int record )
{
TLanPrivateInfo *priv = netdev_priv(dev);
u32 tx_good, tx_under;
@ -2238,7 +2238,7 @@ void TLan_ReadAndClearStats( struct net_device *dev, int record )
*
**************************************************************/
void
static void
TLan_ResetAdapter( struct net_device *dev )
{
TLanPrivateInfo *priv = netdev_priv(dev);
@ -2324,7 +2324,7 @@ TLan_ResetAdapter( struct net_device *dev )
void
static void
TLan_FinishReset( struct net_device *dev )
{
TLanPrivateInfo *priv = netdev_priv(dev);
@ -2448,7 +2448,7 @@ TLan_FinishReset( struct net_device *dev )
*
**************************************************************/
void TLan_SetMac( struct net_device *dev, int areg, char *mac )
static void TLan_SetMac( struct net_device *dev, int areg, char *mac )
{
int i;
@ -2490,7 +2490,7 @@ void TLan_SetMac( struct net_device *dev, int areg, char *mac )
*
********************************************************************/
void TLan_PhyPrint( struct net_device *dev )
static void TLan_PhyPrint( struct net_device *dev )
{
TLanPrivateInfo *priv = netdev_priv(dev);
u16 i, data0, data1, data2, data3, phy;
@ -2539,7 +2539,7 @@ void TLan_PhyPrint( struct net_device *dev )
*
********************************************************************/
void TLan_PhyDetect( struct net_device *dev )
static void TLan_PhyDetect( struct net_device *dev )
{
TLanPrivateInfo *priv = netdev_priv(dev);
u16 control;
@ -2586,7 +2586,7 @@ void TLan_PhyDetect( struct net_device *dev )
void TLan_PhyPowerDown( struct net_device *dev )
static void TLan_PhyPowerDown( struct net_device *dev )
{
TLanPrivateInfo *priv = netdev_priv(dev);
u16 value;
@ -2611,7 +2611,7 @@ void TLan_PhyPowerDown( struct net_device *dev )
void TLan_PhyPowerUp( struct net_device *dev )
static void TLan_PhyPowerUp( struct net_device *dev )
{
TLanPrivateInfo *priv = netdev_priv(dev);
u16 value;
@ -2632,7 +2632,7 @@ void TLan_PhyPowerUp( struct net_device *dev )
void TLan_PhyReset( struct net_device *dev )
static void TLan_PhyReset( struct net_device *dev )
{
TLanPrivateInfo *priv = netdev_priv(dev);
u16 phy;
@ -2660,7 +2660,7 @@ void TLan_PhyReset( struct net_device *dev )
void TLan_PhyStartLink( struct net_device *dev )
static void TLan_PhyStartLink( struct net_device *dev )
{
TLanPrivateInfo *priv = netdev_priv(dev);
u16 ability;
@ -2747,7 +2747,7 @@ void TLan_PhyStartLink( struct net_device *dev )
void TLan_PhyFinishAutoNeg( struct net_device *dev )
static void TLan_PhyFinishAutoNeg( struct net_device *dev )
{
TLanPrivateInfo *priv = netdev_priv(dev);
u16 an_adv;
@ -2903,7 +2903,7 @@ void TLan_PhyMonitor( struct net_device *dev )
*
**************************************************************/
int TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val )
static int TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val )
{
u8 nack;
u16 sio, tmp;
@ -2993,7 +2993,7 @@ int TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val )
*
**************************************************************/
void TLan_MiiSendData( u16 base_port, u32 data, unsigned num_bits )
static void TLan_MiiSendData( u16 base_port, u32 data, unsigned num_bits )
{
u16 sio;
u32 i;
@ -3035,7 +3035,7 @@ void TLan_MiiSendData( u16 base_port, u32 data, unsigned num_bits )
*
**************************************************************/
void TLan_MiiSync( u16 base_port )
static void TLan_MiiSync( u16 base_port )
{
int i;
u16 sio;
@ -3074,7 +3074,7 @@ void TLan_MiiSync( u16 base_port )
*
**************************************************************/
void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val )
static void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val )
{
u16 sio;
int minten;
@ -3144,7 +3144,7 @@ void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val )
*
**************************************************************/
void TLan_EeSendStart( u16 io_base )
static void TLan_EeSendStart( u16 io_base )
{
u16 sio;
@ -3184,7 +3184,7 @@ void TLan_EeSendStart( u16 io_base )
*
**************************************************************/
int TLan_EeSendByte( u16 io_base, u8 data, int stop )
static int TLan_EeSendByte( u16 io_base, u8 data, int stop )
{
int err;
u8 place;
@ -3245,7 +3245,7 @@ int TLan_EeSendByte( u16 io_base, u8 data, int stop )
*
**************************************************************/
void TLan_EeReceiveByte( u16 io_base, u8 *data, int stop )
static void TLan_EeReceiveByte( u16 io_base, u8 *data, int stop )
{
u8 place;
u16 sio;
@ -3303,7 +3303,7 @@ void TLan_EeReceiveByte( u16 io_base, u8 *data, int stop )
*
**************************************************************/
int TLan_EeReadByte( struct net_device *dev, u8 ee_addr, u8 *data )
static int TLan_EeReadByte( struct net_device *dev, u8 ee_addr, u8 *data )
{
int err;
TLanPrivateInfo *priv = netdev_priv(dev);

12
drivers/net/tulip/uli526x.c
View File

@ -482,9 +482,11 @@ static void uli526x_init(struct net_device *dev)
struct uli526x_board_info *db = netdev_priv(dev);
unsigned long ioaddr = db->ioaddr;
u8 phy_tmp;
u8 timeout;
u16 phy_value;
u16 phy_reg_reset;
ULI526X_DBUG(0, "uli526x_init()", 0);
/* Reset M526x MAC controller */
@ -509,11 +511,19 @@ static void uli526x_init(struct net_device *dev)
/* Parser SROM and media mode */
db->media_mode = uli526x_media_mode;
/* Phyxcer capability setting */
/* phyxcer capability setting */
phy_reg_reset = phy_read(db->ioaddr, db->phy_addr, 0, db->chip_id);
phy_reg_reset = (phy_reg_reset | 0x8000);
phy_write(db->ioaddr, db->phy_addr, 0, phy_reg_reset, db->chip_id);
/* See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management
* functions") or phy data sheet for details on phy reset
*/
udelay(500);
timeout = 10;
while (timeout-- &&
phy_read(db->ioaddr, db->phy_addr, 0, db->chip_id) & 0x8000)
udelay(100);
/* Process Phyxcer Media Mode */
uli526x_set_phyxcer(db);

2
drivers/net/via-rhine.c
View File

@ -1893,7 +1893,7 @@ static void rhine_shutdown (struct pci_dev *pdev)
/* Make sure we use pattern 0, 1 and not 4, 5 */
if (rp->quirks & rq6patterns)
iowrite8(0x04, ioaddr + 0xA7);
iowrite8(0x04, ioaddr + WOLcgClr);
if (rp->wolopts & WAKE_MAGIC) {
iowrite8(WOLmagic, ioaddr + WOLcrSet);

2
drivers/net/virtio_net.c
View File

@ -361,6 +361,7 @@ static int virtnet_probe(struct virtio_device *vdev)
netif_napi_add(dev, &vi->napi, virtnet_poll, napi_weight);
vi->dev = dev;
vi->vdev = vdev;
vdev->priv = vi;
/* We expect two virtqueues, receive then send. */
vi->rvq = vdev->config->find_vq(vdev, 0, skb_recv_done);
@ -395,7 +396,6 @@ static int virtnet_probe(struct virtio_device *vdev)
}
pr_debug("virtnet: registered device %s\n", dev->name);
vdev->priv = vi;
return 0;
unregister:

1
drivers/net/wireless/b43/Kconfig
View File

@ -32,6 +32,7 @@ config B43_PCI_AUTOSELECT
bool
depends on B43 && SSB_PCIHOST_POSSIBLE
select SSB_PCIHOST
select SSB_B43_PCI_BRIDGE
default y
# Auto-select SSB PCICORE driver, if possible

1
drivers/net/wireless/b43legacy/Kconfig
View File

@ -25,6 +25,7 @@ config B43LEGACY_PCI_AUTOSELECT
bool
depends on B43LEGACY && SSB_PCIHOST_POSSIBLE
select SSB_PCIHOST
select SSB_B43_PCI_BRIDGE
default y
# Auto-select SSB PCICORE driver, if possible

2
drivers/net/wireless/bcm43xx/Kconfig
View File

@ -1,6 +1,6 @@
config BCM43XX
tristate "Broadcom BCM43xx wireless support (DEPRECATED)"
depends on PCI && IEEE80211 && IEEE80211_SOFTMAC && WLAN_80211 && EXPERIMENTAL
depends on PCI && IEEE80211 && IEEE80211_SOFTMAC && WLAN_80211 && (!SSB_B43_PCI_BRIDGE || SSB != y) && EXPERIMENTAL
select WIRELESS_EXT
select FW_LOADER
select HW_RANDOM

2
drivers/net/wireless/libertas/cmd.c
View File

@ -1040,7 +1040,6 @@ int lbs_mesh_access(struct lbs_private *priv, uint16_t cmd_action,
lbs_deb_leave(LBS_DEB_CMD);
return ret;
}
EXPORT_SYMBOL_GPL(lbs_mesh_access);
int lbs_mesh_config(struct lbs_private *priv, uint16_t enable, uint16_t chan)
{
@ -1576,7 +1575,6 @@ done:
lbs_deb_leave_args(LBS_DEB_HOST, "ret %d", ret);
return ret;
}
EXPORT_SYMBOL_GPL(lbs_prepare_and_send_command);
/**
* @brief This function allocates the command buffer and link

1
drivers/net/wireless/libertas/decl.h
View File

@ -69,7 +69,6 @@ struct lbs_private *lbs_add_card(void *card, struct device *dmdev);
int lbs_remove_card(struct lbs_private *priv);
int lbs_start_card(struct lbs_private *priv);
int lbs_stop_card(struct lbs_private *priv);
int lbs_reset_device(struct lbs_private *priv);
void lbs_host_to_card_done(struct lbs_private *priv);
int lbs_update_channel(struct lbs_private *priv);

17
drivers/net/wireless/libertas/main.c
View File

@ -1351,8 +1351,6 @@ done:
lbs_deb_leave_args(LBS_DEB_MESH, "ret %d", ret);
return ret;
}
EXPORT_SYMBOL_GPL(lbs_add_mesh);
static void lbs_remove_mesh(struct lbs_private *priv)
{
@ -1372,7 +1370,6 @@ static void lbs_remove_mesh(struct lbs_private *priv)
free_netdev(mesh_dev);
lbs_deb_leave(LBS_DEB_MESH);
}
EXPORT_SYMBOL_GPL(lbs_remove_mesh);
/**
* @brief This function finds the CFP in
@ -1458,20 +1455,6 @@ void lbs_interrupt(struct lbs_private *priv)
}
EXPORT_SYMBOL_GPL(lbs_interrupt);
int lbs_reset_device(struct lbs_private *priv)
{
int ret;
lbs_deb_enter(LBS_DEB_MAIN);
ret = lbs_prepare_and_send_command(priv, CMD_802_11_RESET,
CMD_ACT_HALT, 0, 0, NULL);
msleep_interruptible(10);
lbs_deb_leave_args(LBS_DEB_MAIN, "ret %d", ret);
return ret;
}
EXPORT_SYMBOL_GPL(lbs_reset_device);
static int __init lbs_init_module(void)
{
lbs_deb_enter(LBS_DEB_MAIN);

14
drivers/net/wireless/rndis_wlan.c
View File

@ -228,9 +228,9 @@ struct NDIS_WLAN_BSSID_EX {
struct NDIS_802_11_SSID Ssid;
__le32 Privacy;
__le32 Rssi;
enum NDIS_802_11_NETWORK_TYPE NetworkTypeInUse;
__le32 NetworkTypeInUse;
struct NDIS_802_11_CONFIGURATION Configuration;
enum NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode;
__le32 InfrastructureMode;
u8 SupportedRates[NDIS_802_11_LENGTH_RATES_EX];
__le32 IELength;
u8 IEs[0];
@ -279,11 +279,11 @@ struct RNDIS_CONFIG_PARAMETER_INFOBUFFER {
} __attribute__((packed));
/* these have to match what is in wpa_supplicant */
enum { WPA_ALG_NONE, WPA_ALG_WEP, WPA_ALG_TKIP, WPA_ALG_CCMP } wpa_alg;
enum { CIPHER_NONE, CIPHER_WEP40, CIPHER_TKIP, CIPHER_CCMP, CIPHER_WEP104 }
wpa_cipher;
enum { KEY_MGMT_802_1X, KEY_MGMT_PSK, KEY_MGMT_NONE, KEY_MGMT_802_1X_NO_WPA,
KEY_MGMT_WPA_NONE } wpa_key_mgmt;
enum wpa_alg { WPA_ALG_NONE, WPA_ALG_WEP, WPA_ALG_TKIP, WPA_ALG_CCMP };
enum wpa_cipher { CIPHER_NONE, CIPHER_WEP40, CIPHER_TKIP, CIPHER_CCMP,
CIPHER_WEP104 };
enum wpa_key_mgmt { KEY_MGMT_802_1X, KEY_MGMT_PSK, KEY_MGMT_NONE,
KEY_MGMT_802_1X_NO_WPA, KEY_MGMT_WPA_NONE };
/*
* private data

6
drivers/net/wireless/rt2x00/rt2400pci.c
View File

@ -960,8 +960,12 @@ static int rt2400pci_set_device_state(struct rt2x00_dev *rt2x00dev,
rt2400pci_disable_radio(rt2x00dev);
break;
case STATE_RADIO_RX_ON:
case STATE_RADIO_RX_ON_LINK:
rt2400pci_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
break;
case STATE_RADIO_RX_OFF:
rt2400pci_toggle_rx(rt2x00dev, state);
case STATE_RADIO_RX_OFF_LINK:
rt2400pci_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF);
break;
case STATE_DEEP_SLEEP:
case STATE_SLEEP:

6
drivers/net/wireless/rt2x00/rt2500pci.c
View File

@ -1112,8 +1112,12 @@ static int rt2500pci_set_device_state(struct rt2x00_dev *rt2x00dev,
rt2500pci_disable_radio(rt2x00dev);
break;
case STATE_RADIO_RX_ON:
case STATE_RADIO_RX_ON_LINK:
rt2500pci_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
break;
case STATE_RADIO_RX_OFF:
rt2500pci_toggle_rx(rt2x00dev, state);
case STATE_RADIO_RX_OFF_LINK:
rt2500pci_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF);
break;
case STATE_DEEP_SLEEP:
case STATE_SLEEP:

6
drivers/net/wireless/rt2x00/rt2500usb.c
View File

@ -1001,8 +1001,12 @@ static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
rt2500usb_disable_radio(rt2x00dev);
break;
case STATE_RADIO_RX_ON:
case STATE_RADIO_RX_ON_LINK:
rt2500usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
break;
case STATE_RADIO_RX_OFF:
rt2500usb_toggle_rx(rt2x00dev, state);
case STATE_RADIO_RX_OFF_LINK:
rt2500usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF);
break;
case STATE_DEEP_SLEEP:
case STATE_SLEEP:

8
drivers/net/wireless/rt2x00/rt2x00config.c
View File

@ -97,12 +97,16 @@ void rt2x00lib_config_antenna(struct rt2x00_dev *rt2x00dev,
libconf.ant.rx = rx;
libconf.ant.tx = tx;
if (rx == rt2x00dev->link.ant.active.rx &&
tx == rt2x00dev->link.ant.active.tx)
return;
/*
* Antenna setup changes require the RX to be disabled,
* else the changes will be ignored by the device.
*/
if (test_bit(DEVICE_ENABLED_RADIO, &rt2x00dev->flags))
rt2x00lib_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF);
rt2x00lib_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF_LINK);
/*
* Write new antenna setup to device and reset the link tuner.
@ -116,7 +120,7 @@ void rt2x00lib_config_antenna(struct rt2x00_dev *rt2x00dev,
rt2x00dev->link.ant.active.tx = libconf.ant.tx;
if (test_bit(DEVICE_ENABLED_RADIO, &rt2x00dev->flags))
rt2x00lib_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
rt2x00lib_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON_LINK);
}
void rt2x00lib_config(struct rt2x00_dev *rt2x00dev,

73
drivers/net/wireless/rt2x00/rt2x00dev.c
View File

@ -61,11 +61,33 @@ EXPORT_SYMBOL_GPL(rt2x00lib_get_ring);
/*
* Link tuning handlers
*/
static void rt2x00lib_start_link_tuner(struct rt2x00_dev *rt2x00dev)
void rt2x00lib_reset_link_tuner(struct rt2x00_dev *rt2x00dev)
{
if (!test_bit(DEVICE_ENABLED_RADIO, &rt2x00dev->flags))
return;
/*
* Reset link information.
* Both the currently active vgc level as well as
* the link tuner counter should be reset. Resetting
* the counter is important for devices where the
* device should only perform link tuning during the
* first minute after being enabled.
*/
rt2x00dev->link.count = 0;
rt2x00dev->link.vgc_level = 0;
/*
* Reset the link tuner.
*/
rt2x00dev->ops->lib->reset_tuner(rt2x00dev);
}
static void rt2x00lib_start_link_tuner(struct rt2x00_dev *rt2x00dev)
{
/*
* Clear all (possibly) pre-existing quality statistics.
*/
memset(&rt2x00dev->link.qual, 0, sizeof(rt2x00dev->link.qual));
/*
@ -79,10 +101,7 @@ static void rt2x00lib_start_link_tuner(struct rt2x00_dev *rt2x00dev)
rt2x00dev->link.qual.rx_percentage = 50;
rt2x00dev->link.qual.tx_percentage = 50;
/*
* Reset the link tuner.
*/
rt2x00dev->ops->lib->reset_tuner(rt2x00dev);
rt2x00lib_reset_link_tuner(rt2x00dev);
queue_delayed_work(rt2x00dev->hw->workqueue,
&rt2x00dev->link.work, LINK_TUNE_INTERVAL);
@ -93,15 +112,6 @@ static void rt2x00lib_stop_link_tuner(struct rt2x00_dev *rt2x00dev)
cancel_delayed_work_sync(&rt2x00dev->link.work);
}
void rt2x00lib_reset_link_tuner(struct rt2x00_dev *rt2x00dev)
{
if (!test_bit(DEVICE_ENABLED_RADIO, &rt2x00dev->flags))
return;
rt2x00lib_stop_link_tuner(rt2x00dev);
rt2x00lib_start_link_tuner(rt2x00dev);
}
/*
* Ring initialization
*/
@ -260,19 +270,11 @@ static void rt2x00lib_evaluate_antenna_sample(struct rt2x00_dev *rt2x00dev)
if (sample_a == sample_b)
return;
if (rt2x00dev->link.ant.flags & ANTENNA_RX_DIVERSITY) {
if (sample_a > sample_b && rx == ANTENNA_B)
rx = ANTENNA_A;
else if (rx == ANTENNA_A)
rx = ANTENNA_B;
}
if (rt2x00dev->link.ant.flags & ANTENNA_RX_DIVERSITY)
rx = (sample_a > sample_b) ? ANTENNA_A : ANTENNA_B;
if (rt2x00dev->link.ant.flags & ANTENNA_TX_DIVERSITY) {
if (sample_a > sample_b && tx == ANTENNA_B)
tx = ANTENNA_A;
else if (tx == ANTENNA_A)
tx = ANTENNA_B;
}
if (rt2x00dev->link.ant.flags & ANTENNA_TX_DIVERSITY)
tx = (sample_a > sample_b) ? ANTENNA_A : ANTENNA_B;
rt2x00lib_config_antenna(rt2x00dev, rx, tx);
}
@ -293,7 +295,7 @@ static void rt2x00lib_evaluate_antenna_eval(struct rt2x00_dev *rt2x00dev)
* sample the rssi from the other antenna to make a valid
* comparison between the 2 antennas.
*/
if ((rssi_curr - rssi_old) > -5 || (rssi_curr - rssi_old) < 5)
if (abs(rssi_curr - rssi_old) < 5)
return;
rt2x00dev->link.ant.flags |= ANTENNA_MODE_SAMPLE;
@ -319,15 +321,15 @@ static void rt2x00lib_evaluate_antenna(struct rt2x00_dev *rt2x00dev)
rt2x00dev->link.ant.flags &= ~ANTENNA_TX_DIVERSITY;
if (rt2x00dev->hw->conf.antenna_sel_rx == 0 &&
rt2x00dev->default_ant.rx != ANTENNA_SW_DIVERSITY)
rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
rt2x00dev->link.ant.flags |= ANTENNA_RX_DIVERSITY;
if (rt2x00dev->hw->conf.antenna_sel_tx == 0 &&
rt2x00dev->default_ant.tx != ANTENNA_SW_DIVERSITY)
rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
rt2x00dev->link.ant.flags |= ANTENNA_TX_DIVERSITY;
if (!(rt2x00dev->link.ant.flags & ANTENNA_RX_DIVERSITY) &&
!(rt2x00dev->link.ant.flags & ANTENNA_TX_DIVERSITY)) {
rt2x00dev->link.ant.flags &= ~ANTENNA_MODE_SAMPLE;
rt2x00dev->link.ant.flags = 0;
return;
}
@ -440,17 +442,18 @@ static void rt2x00lib_link_tuner(struct work_struct *work)
if (!test_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags))
rt2x00dev->ops->lib->link_tuner(rt2x00dev);
/*
* Evaluate antenna setup.
*/
rt2x00lib_evaluate_antenna(rt2x00dev);
/*
* Precalculate a portion of the link signal which is
* in based on the tx/rx success/failure counters.
*/
rt2x00lib_precalculate_link_signal(&rt2x00dev->link.qual);
/*
* Evaluate antenna setup, make this the last step since this could
* possibly reset some statistics.
*/
rt2x00lib_evaluate_antenna(rt2x00dev);
/*
* Increase tuner counter, and reschedule the next link tuner run.
*/

2
drivers/net/wireless/rt2x00/rt2x00reg.h
View File

@ -85,6 +85,8 @@ enum dev_state {
STATE_RADIO_OFF,
STATE_RADIO_RX_ON,
STATE_RADIO_RX_OFF,
STATE_RADIO_RX_ON_LINK,
STATE_RADIO_RX_OFF_LINK,
STATE_RADIO_IRQ_ON,
STATE_RADIO_IRQ_OFF,
};

6
drivers/net/wireless/rt2x00/rt61pci.c
View File

@ -1482,8 +1482,12 @@ static int rt61pci_set_device_state(struct rt2x00_dev *rt2x00dev,
rt61pci_disable_radio(rt2x00dev);
break;
case STATE_RADIO_RX_ON:
case STATE_RADIO_RX_ON_LINK:
rt61pci_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
break;
case STATE_RADIO_RX_OFF:
rt61pci_toggle_rx(rt2x00dev, state);
case STATE_RADIO_RX_OFF_LINK:
rt61pci_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF);
break;
case STATE_DEEP_SLEEP:
case STATE_SLEEP:

6
drivers/net/wireless/rt2x00/rt73usb.c
View File

@ -1208,8 +1208,12 @@ static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
rt73usb_disable_radio(rt2x00dev);
break;
case STATE_RADIO_RX_ON:
case STATE_RADIO_RX_ON_LINK:
rt73usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
break;
case STATE_RADIO_RX_OFF:
rt73usb_toggle_rx(rt2x00dev, state);
case STATE_RADIO_RX_OFF_LINK:
rt73usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF);
break;
case STATE_DEEP_SLEEP:
case STATE_SLEEP:

39
drivers/s390/net/claw.c
View File

@ -1851,8 +1851,7 @@ claw_hw_tx(struct sk_buff *skb, struct net_device *dev, long linkid)
}
}
/* See how many write buffers are required to hold this data */
numBuffers= ( skb->len + privptr->p_env->write_size - 1) /
( privptr->p_env->write_size);
numBuffers = DIV_ROUND_UP(skb->len, privptr->p_env->write_size);
/* If that number of buffers isn't available, give up for now */
if (privptr->write_free_count < numBuffers ||
@ -2114,8 +2113,7 @@ init_ccw_bk(struct net_device *dev)
*/
ccw_blocks_perpage= PAGE_SIZE / CCWBK_SIZE;
ccw_pages_required=
(ccw_blocks_required+ccw_blocks_perpage -1) /
ccw_blocks_perpage;
DIV_ROUND_UP(ccw_blocks_required, ccw_blocks_perpage);
#ifdef DEBUGMSG
printk(KERN_INFO "%s: %s() > ccw_blocks_perpage=%d\n",
@ -2131,30 +2129,29 @@ init_ccw_bk(struct net_device *dev)
* provide good performance. With packing buffers support 32k
* buffers are used.
*/
if (privptr->p_env->read_size < PAGE_SIZE) {
claw_reads_perpage= PAGE_SIZE / privptr->p_env->read_size;
claw_read_pages= (privptr->p_env->read_buffers +
claw_reads_perpage -1) / claw_reads_perpage;
if (privptr->p_env->read_size < PAGE_SIZE) {
claw_reads_perpage = PAGE_SIZE / privptr->p_env->read_size;
claw_read_pages = DIV_ROUND_UP(privptr->p_env->read_buffers,
claw_reads_perpage);
}
else { /* > or equal */
privptr->p_buff_pages_perread=
(privptr->p_env->read_size + PAGE_SIZE - 1) / PAGE_SIZE;
claw_read_pages=
privptr->p_env->read_buffers * privptr->p_buff_pages_perread;
privptr->p_buff_pages_perread =
DIV_ROUND_UP(privptr->p_env->read_size, PAGE_SIZE);
claw_read_pages = privptr->p_env->read_buffers *
privptr->p_buff_pages_perread;
}
if (privptr->p_env->write_size < PAGE_SIZE) {
claw_writes_perpage=
PAGE_SIZE / privptr->p_env->write_size;
claw_write_pages=
(privptr->p_env->write_buffers + claw_writes_perpage -1) /
claw_writes_perpage;
claw_writes_perpage =
PAGE_SIZE / privptr->p_env->write_size;
claw_write_pages = DIV_ROUND_UP(privptr->p_env->write_buffers,
claw_writes_perpage);
}
else { /* > or equal */
privptr->p_buff_pages_perwrite=
(privptr->p_env->read_size + PAGE_SIZE - 1) / PAGE_SIZE;
claw_write_pages=
privptr->p_env->write_buffers * privptr->p_buff_pages_perwrite;
privptr->p_buff_pages_perwrite =
DIV_ROUND_UP(privptr->p_env->read_size, PAGE_SIZE);
claw_write_pages = privptr->p_env->write_buffers *
privptr->p_buff_pages_perwrite;
}
#ifdef DEBUGMSG
if (privptr->p_env->read_size < PAGE_SIZE) {

5
drivers/ssb/Kconfig
View File

@ -35,6 +35,11 @@ config SSB_PCIHOST
If unsure, say Y
config SSB_B43_PCI_BRIDGE
bool
depends on SSB_PCIHOST
default n
config SSB_PCMCIAHOST_POSSIBLE
bool
depends on SSB && (PCMCIA = y || PCMCIA = SSB) && EXPERIMENTAL

2
drivers/ssb/Makefile
View File

@ -14,6 +14,6 @@ ssb-$(CONFIG_SSB_DRIVER_PCICORE) += driver_pcicore.o
# b43 pci-ssb-bridge driver
# Not strictly a part of SSB, but kept here for convenience
ssb-$(CONFIG_SSB_PCIHOST) += b43_pci_bridge.o
ssb-$(CONFIG_SSB_B43_PCI_BRIDGE) += b43_pci_bridge.o
obj-$(CONFIG_SSB) += ssb.o

2
drivers/ssb/driver_pcicore.c
View File

@ -393,7 +393,7 @@ static int pcicore_is_in_hostmode(struct ssb_pcicore *pc)
chipid_top != 0x5300)
return 0;
if (bus->sprom.r1.boardflags_lo & SSB_PCICORE_BFL_NOPCI)
if (bus->sprom.boardflags_lo & SSB_PCICORE_BFL_NOPCI)
return 0;
/* The 200-pin BCM4712 package does not bond out PCI. Even when

4
drivers/ssb/ssb_private.h
View File

@ -120,10 +120,10 @@ extern int ssb_devices_thaw(struct ssb_bus *bus);
extern struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev);
/* b43_pci_bridge.c */
#ifdef CONFIG_SSB_PCIHOST
#ifdef CONFIG_SSB_B43_PCI_BRIDGE
extern int __init b43_pci_ssb_bridge_init(void);
extern void __exit b43_pci_ssb_bridge_exit(void);
#else /* CONFIG_SSB_PCIHOST */
#else /* CONFIG_SSB_B43_PCI_BRIDGR */
static inline int b43_pci_ssb_bridge_init(void)
{
return 0;

2
include/linux/connector.h
View File

@ -170,7 +170,5 @@ int cn_cb_equal(struct cb_id *, struct cb_id *);
void cn_queue_wrapper(struct work_struct *work);
extern int cn_already_initialized;
#endif /* __KERNEL__ */
#endif /* __CONNECTOR_H */

2
include/linux/netfilter.h
View File

@ -31,7 +31,7 @@
#define NF_VERDICT_QMASK 0xffff0000
#define NF_VERDICT_QBITS 16
#define NF_QUEUE_NR(x) (((x << NF_VERDICT_QBITS) & NF_VERDICT_QMASK) | NF_QUEUE)
#define NF_QUEUE_NR(x) ((((x) << NF_VERDICT_BITS) & NF_VERDICT_QMASK) | NF_QUEUE)
/* only for userspace compatibility */
#ifndef __KERNEL__

10
include/net/sctp/user.h
View File

@ -411,6 +411,7 @@ struct sctp_event_subscribe {
__u8 sctp_shutdown_event;
__u8 sctp_partial_delivery_event;
__u8 sctp_adaptation_layer_event;
__u8 sctp_authentication_event;
};
/*
@ -587,7 +588,7 @@ struct sctp_authchunk {
* endpoint requires the peer to use.
*/
struct sctp_hmacalgo {
__u16 shmac_num_idents;
__u32 shmac_num_idents;
__u16 shmac_idents[];
};
@ -600,7 +601,7 @@ struct sctp_hmacalgo {
struct sctp_authkey {
sctp_assoc_t sca_assoc_id;
__u16 sca_keynumber;
__u16 sca_keylen;
__u16 sca_keylength;
__u8 sca_key[];
};
@ -693,8 +694,9 @@ struct sctp_status {
* the peer requires to be received authenticated only.
*/
struct sctp_authchunks {
sctp_assoc_t gauth_assoc_id;
uint8_t gauth_chunks[];
sctp_assoc_t gauth_assoc_id;
__u32 gauth_number_of_chunks;
uint8_t gauth_chunks[];
};
/*

11
net/8021q/vlanproc.c
View File

@ -161,11 +161,10 @@ int __init vlan_proc_init(void)
if (!proc_vlan_dir)
goto err;
proc_vlan_conf = create_proc_entry(name_conf, S_IFREG|S_IRUSR|S_IWUSR,
proc_vlan_dir);
proc_vlan_conf = proc_create(name_conf, S_IFREG|S_IRUSR|S_IWUSR,
proc_vlan_dir, &vlan_fops);
if (!proc_vlan_conf)
goto err;
proc_vlan_conf->proc_fops = &vlan_fops;
return 0;
err:
@ -182,13 +181,11 @@ int vlan_proc_add_dev(struct net_device *vlandev)
{
struct vlan_dev_info *dev_info = vlan_dev_info(vlandev);
dev_info->dent = create_proc_entry(vlandev->name,
S_IFREG|S_IRUSR|S_IWUSR,
proc_vlan_dir);
dev_info->dent = proc_create(vlandev->name, S_IFREG|S_IRUSR|S_IWUSR,
proc_vlan_dir, &vlandev_fops);
if (!dev_info->dent)
return -ENOBUFS;
dev_info->dent->proc_fops = &vlandev_fops;
dev_info->dent->data = vlandev;
return 0;
}

15
net/appletalk/atalk_proc.c
View File

@ -283,25 +283,24 @@ int __init atalk_proc_init(void)
goto out;
atalk_proc_dir->owner = THIS_MODULE;
p = create_proc_entry("interface", S_IRUGO, atalk_proc_dir);
p = proc_create("interface", S_IRUGO, atalk_proc_dir,
&atalk_seq_interface_fops);
if (!p)
goto out_interface;
p->proc_fops = &atalk_seq_interface_fops;
p = create_proc_entry("route", S_IRUGO, atalk_proc_dir);
p = proc_create("route", S_IRUGO, atalk_proc_dir,
&atalk_seq_route_fops);
if (!p)
goto out_route;
p->proc_fops = &atalk_seq_route_fops;
p = create_proc_entry("socket", S_IRUGO, atalk_proc_dir);
p = proc_create("socket", S_IRUGO, atalk_proc_dir,
&atalk_seq_socket_fops);
if (!p)
goto out_socket;
p->proc_fops = &atalk_seq_socket_fops;
p = create_proc_entry("arp", S_IRUGO, atalk_proc_dir);
p = proc_create("arp", S_IRUGO, atalk_proc_dir, &atalk_seq_arp_fops);
if (!p)
goto out_arp;
p->proc_fops = &atalk_seq_arp_fops;
rc = 0;
out:

4
net/atm/br2684.c
View File

@ -742,9 +742,9 @@ static int __init br2684_init(void)
{
#ifdef CONFIG_PROC_FS
struct proc_dir_entry *p;
if ((p = create_proc_entry("br2684", 0, atm_proc_root)) == NULL)
p = proc_create("br2684", 0, atm_proc_root, &br2684_proc_ops);
if (p == NULL)
return -ENOMEM;
p->proc_fops = &br2684_proc_ops;
#endif
register_atm_ioctl(&br2684_ioctl_ops);
return 0;

4
net/atm/clip.c
View File

@ -962,9 +962,7 @@ static int __init atm_clip_init(void)
{
struct proc_dir_entry *p;
p = create_proc_entry("arp", S_IRUGO, atm_proc_root);
if (p)
p->proc_fops = &arp_seq_fops;
p = proc_create("arp", S_IRUGO, atm_proc_root, &arp_seq_fops);
}
#endif

4
net/atm/lec.c
View File

@ -1249,9 +1249,7 @@ static int __init lane_module_init(void)
#ifdef CONFIG_PROC_FS
struct proc_dir_entry *p;
p = create_proc_entry("lec", S_IRUGO, atm_proc_root);
if (p)
p->proc_fops = &lec_seq_fops;
p = proc_create("lec", S_IRUGO, atm_proc_root, &lec_seq_fops);
#endif
register_atm_ioctl(&lane_ioctl_ops);

3
net/atm/mpoa_proc.c
View File

@ -276,12 +276,11 @@ int mpc_proc_init(void)
{
struct proc_dir_entry *p;
p = create_proc_entry(STAT_FILE_NAME, 0, atm_proc_root);
p = proc_create(STAT_FILE_NAME, 0, atm_proc_root, &mpc_file_operations);
if (!p) {
printk(KERN_ERR "Unable to initialize /proc/atm/%s\n", STAT_FILE_NAME);
return -ENOMEM;
}
p->proc_fops = &mpc_file_operations;
p->owner = THIS_MODULE;
return 0;
}

8
net/atm/proc.c
View File

@ -435,11 +435,11 @@ int atm_proc_dev_register(struct atm_dev *dev)
goto err_out;
sprintf(dev->proc_name,"%s:%d",dev->type, dev->number);
dev->proc_entry = create_proc_entry(dev->proc_name, 0, atm_proc_root);
dev->proc_entry = proc_create(dev->proc_name, 0, atm_proc_root,
&proc_atm_dev_ops);
if (!dev->proc_entry)
goto err_free_name;
dev->proc_entry->data = dev;
dev->proc_entry->proc_fops = &proc_atm_dev_ops;
dev->proc_entry->owner = THIS_MODULE;
return 0;
err_free_name:
@ -492,10 +492,10 @@ int __init atm_proc_init(void)
for (e = atm_proc_ents; e->name; e++) {
struct proc_dir_entry *dirent;
dirent = create_proc_entry(e->name, S_IRUGO, atm_proc_root);
dirent = proc_create(e->name, S_IRUGO,
atm_proc_root, e->proc_fops);
if (!dirent)
goto err_out_remove;
dirent->proc_fops = e->proc_fops;
dirent->owner = THIS_MODULE;
e->dirent = dirent;
}

2
net/bluetooth/l2cap.c
View File

@ -417,6 +417,8 @@ static void l2cap_conn_del(struct hci_conn *hcon, int err)
l2cap_sock_kill(sk);
}
del_timer_sync(&conn->info_timer);
hcon->l2cap_data = NULL;
kfree(conn);
}

4
net/core/neighbour.c
View File

@ -1389,10 +1389,10 @@ void neigh_table_init_no_netlink(struct neigh_table *tbl)
panic("cannot create neighbour cache statistics");
#ifdef CONFIG_PROC_FS
tbl->pde = create_proc_entry(tbl->id, 0, init_net.proc_net_stat);
tbl->pde = proc_create(tbl->id, 0, init_net.proc_net_stat,
&neigh_stat_seq_fops);
if (!tbl->pde)
panic("cannot create neighbour proc dir entry");
tbl->pde->proc_fops = &neigh_stat_seq_fops;
tbl->pde->data = tbl;
#endif

10
net/core/pktgen.c
View File

@ -3570,14 +3570,14 @@ static int pktgen_add_device(struct pktgen_thread *t, const char *ifname)
if (err)
goto out1;
pkt_dev->entry = create_proc_entry(ifname, 0600, pg_proc_dir);
pkt_dev->entry = proc_create(ifname, 0600,
pg_proc_dir, &pktgen_if_fops);
if (!pkt_dev->entry) {
printk(KERN_ERR "pktgen: cannot create %s/%s procfs entry.\n",
PG_PROC_DIR, ifname);
err = -EINVAL;
goto out2;
}
pkt_dev->entry->proc_fops = &pktgen_if_fops;
pkt_dev->entry->data = pkt_dev;
#ifdef CONFIG_XFRM
pkt_dev->ipsmode = XFRM_MODE_TRANSPORT;
@ -3628,7 +3628,7 @@ static int __init pktgen_create_thread(int cpu)
kthread_bind(p, cpu);
t->tsk = p;
pe = create_proc_entry(t->tsk->comm, 0600, pg_proc_dir);
pe = proc_create(t->tsk->comm, 0600, pg_proc_dir, &pktgen_thread_fops);
if (!pe) {
printk(KERN_ERR "pktgen: cannot create %s/%s procfs entry.\n",
PG_PROC_DIR, t->tsk->comm);
@ -3638,7 +3638,6 @@ static int __init pktgen_create_thread(int cpu)
return -EINVAL;
}
pe->proc_fops = &pktgen_thread_fops;
pe->data = t;
wake_up_process(p);
@ -3709,7 +3708,7 @@ static int __init pg_init(void)
return -ENODEV;
pg_proc_dir->owner = THIS_MODULE;
pe = create_proc_entry(PGCTRL, 0600, pg_proc_dir);
pe = proc_create(PGCTRL, 0600, pg_proc_dir, &pktgen_fops);
if (pe == NULL) {
printk(KERN_ERR "pktgen: ERROR: cannot create %s "
"procfs entry.\n", PGCTRL);
@ -3717,7 +3716,6 @@ static int __init pg_init(void)
return -EINVAL;
}
pe->proc_fops = &pktgen_fops;
pe->data = NULL;
/* Register us to receive netdevice events */

1
net/ipv4/devinet.c
View File

@ -752,6 +752,7 @@ int devinet_ioctl(unsigned int cmd, void __user *arg)
inet_del_ifa(in_dev, ifap, 0);
ifa->ifa_broadcast = 0;
ifa->ifa_anycast = 0;
ifa->ifa_scope = 0;
}
ifa->ifa_address = ifa->ifa_local = sin->sin_addr.s_addr;

14
net/ipv4/ip_gre.c
View File

@ -266,20 +266,24 @@ static struct ip_tunnel * ipgre_tunnel_locate(struct ip_tunnel_parm *parms, int
if (!dev)
return NULL;
if (strchr(name, '%')) {
if (dev_alloc_name(dev, name) < 0)
goto failed_free;
}
dev->init = ipgre_tunnel_init;
nt = netdev_priv(dev);
nt->parms = *parms;
if (register_netdevice(dev) < 0) {
free_netdev(dev);
goto failed;
}
if (register_netdevice(dev) < 0)
goto failed_free;
dev_hold(dev);
ipgre_tunnel_link(nt);
return nt;
failed:
failed_free:
free_netdev(dev);
return NULL;
}

5
net/ipv4/ipcomp.c
View File

@ -108,8 +108,11 @@ static int ipcomp_compress(struct xfrm_state *x, struct sk_buff *skb)
const int cpu = get_cpu();
u8 *scratch = *per_cpu_ptr(ipcomp_scratches, cpu);
struct crypto_comp *tfm = *per_cpu_ptr(ipcd->tfms, cpu);
int err = crypto_comp_compress(tfm, start, plen, scratch, &dlen);
int err;
local_bh_disable();
err = crypto_comp_compress(tfm, start, plen, scratch, &dlen);
local_bh_enable();
if (err)
goto out;

14
net/ipv4/ipip.c
View File

@ -228,20 +228,24 @@ static struct ip_tunnel * ipip_tunnel_locate(struct ip_tunnel_parm *parms, int c
if (dev == NULL)
return NULL;
if (strchr(name, '%')) {
if (dev_alloc_name(dev, name) < 0)
goto failed_free;
}
nt = netdev_priv(dev);
dev->init = ipip_tunnel_init;
nt->parms = *parms;
if (register_netdevice(dev) < 0) {
free_netdev(dev);
goto failed;
}
if (register_netdevice(dev) < 0)
goto failed_free;
dev_hold(dev);
ipip_tunnel_link(nt);
return nt;
failed:
failed_free:
free_netdev(dev);
return NULL;
}

5
net/ipv4/route.c
View File

@ -542,12 +542,11 @@ static __init int ip_rt_proc_init(struct net *net)
if (!pde)
goto err1;
pde = create_proc_entry("rt_cache", S_IRUGO, net->proc_net_stat);
pde = proc_create("rt_cache", S_IRUGO,
net->proc_net_stat, &rt_cpu_seq_fops);
if (!pde)
goto err2;
pde->proc_fops = &rt_cpu_seq_fops;
#ifdef CONFIG_NET_CLS_ROUTE
pde = create_proc_read_entry("rt_acct", 0, net->proc_net,
ip_rt_acct_read, NULL);

3
net/ipv6/addrconf.c
View File

@ -1557,6 +1557,7 @@ addrconf_prefix_route(struct in6_addr *pfx, int plen, struct net_device *dev,
.fc_expires = expires,
.fc_dst_len = plen,
.fc_flags = RTF_UP | flags,
.fc_nlinfo.nl_net = &init_net,
};
ipv6_addr_copy(&cfg.fc_dst, pfx);
@ -1583,6 +1584,7 @@ static void addrconf_add_mroute(struct net_device *dev)
.fc_ifindex = dev->ifindex,
.fc_dst_len = 8,
.fc_flags = RTF_UP,
.fc_nlinfo.nl_net = &init_net,
};
ipv6_addr_set(&cfg.fc_dst, htonl(0xFF000000), 0, 0, 0);
@ -1599,6 +1601,7 @@ static void sit_route_add(struct net_device *dev)
.fc_ifindex = dev->ifindex,
.fc_dst_len = 96,
.fc_flags = RTF_UP | RTF_NONEXTHOP,
.fc_nlinfo.nl_net = &init_net,
};
/* prefix length - 96 bits "::d.d.d.d" */

15
net/ipv6/ip6_tunnel.c
View File

@ -238,17 +238,24 @@ static struct ip6_tnl *ip6_tnl_create(struct ip6_tnl_parm *p)
if (dev == NULL)
goto failed;
if (strchr(name, '%')) {
if (dev_alloc_name(dev, name) < 0)
goto failed_free;
}
t = netdev_priv(dev);
dev->init = ip6_tnl_dev_init;
t->parms = *p;
if ((err = register_netdevice(dev)) < 0) {
free_netdev(dev);
goto failed;
}
if ((err = register_netdevice(dev)) < 0)
goto failed_free;
dev_hold(dev);
ip6_tnl_link(t);
return t;
failed_free:
free_netdev(dev);
failed:
return NULL;
}

2
net/ipv6/ipcomp6.c
View File

@ -146,7 +146,9 @@ static int ipcomp6_output(struct xfrm_state *x, struct sk_buff *skb)
scratch = *per_cpu_ptr(ipcomp6_scratches, cpu);
tfm = *per_cpu_ptr(ipcd->tfms, cpu);
local_bh_disable();
err = crypto_comp_compress(tfm, start, plen, scratch, &dlen);
local_bh_enable();
if (err || (dlen + sizeof(*ipch)) >= plen) {
put_cpu();
goto out_ok;

4
net/ipv6/proc.c
View File

@ -217,12 +217,12 @@ int snmp6_register_dev(struct inet6_dev *idev)
if (!proc_net_devsnmp6)
return -ENOENT;
p = create_proc_entry(idev->dev->name, S_IRUGO, proc_net_devsnmp6);
p = proc_create(idev->dev->name, S_IRUGO,
proc_net_devsnmp6, &snmp6_seq_fops);
if (!p)
return -ENOMEM;
p->data = idev;
p->proc_fops = &snmp6_seq_fops;
idev->stats.proc_dir_entry = p;
return 0;

2
net/ipv6/route.c
View File

@ -1719,6 +1719,8 @@ static void rtmsg_to_fib6_config(struct in6_rtmsg *rtmsg,
cfg->fc_src_len = rtmsg->rtmsg_src_len;
cfg->fc_flags = rtmsg->rtmsg_flags;
cfg->fc_nlinfo.nl_net = &init_net;
ipv6_addr_copy(&cfg->fc_dst, &rtmsg->rtmsg_dst);
ipv6_addr_copy(&cfg->fc_src, &rtmsg->rtmsg_src);
ipv6_addr_copy(&cfg->fc_gateway, &rtmsg->rtmsg_gateway);

13
net/ipv6/sit.c
View File

@ -171,6 +171,11 @@ static struct ip_tunnel * ipip6_tunnel_locate(struct ip_tunnel_parm *parms, int
if (dev == NULL)
return NULL;
if (strchr(name, '%')) {
if (dev_alloc_name(dev, name) < 0)
goto failed_free;
}
nt = netdev_priv(dev);
dev->init = ipip6_tunnel_init;
nt->parms = *parms;
@ -178,16 +183,16 @@ static struct ip_tunnel * ipip6_tunnel_locate(struct ip_tunnel_parm *parms, int
if (parms->i_flags & SIT_ISATAP)
dev->priv_flags |= IFF_ISATAP;
if (register_netdevice(dev) < 0) {
free_netdev(dev);
goto failed;
}
if (register_netdevice(dev) < 0)
goto failed_free;
dev_hold(dev);
ipip6_tunnel_link(nt);
return nt;
failed_free:
free_netdev(dev);
failed:
return NULL;
}

3
net/ipv6/sysctl_net_ipv6.c
View File

@ -101,9 +101,6 @@ static int ipv6_sysctl_net_init(struct net *net)
net->ipv6.sysctl.table = register_net_sysctl_table(net, net_ipv6_ctl_path,
ipv6_table);
if (!net->ipv6.sysctl.table)
return -ENOMEM;
if (!net->ipv6.sysctl.table)
goto out_ipv6_icmp_table;

11
net/ipx/ipx_proc.c
View File

@ -358,22 +358,19 @@ int __init ipx_proc_init(void)
if (!ipx_proc_dir)
goto out;
p = create_proc_entry("interface", S_IRUGO, ipx_proc_dir);
p = proc_create("interface", S_IRUGO,
ipx_proc_dir, &ipx_seq_interface_fops);
if (!p)
goto out_interface;
p->proc_fops = &ipx_seq_interface_fops;
p = create_proc_entry("route", S_IRUGO, ipx_proc_dir);
p = proc_create("route", S_IRUGO, ipx_proc_dir, &ipx_seq_route_fops);
if (!p)
goto out_route;
p->proc_fops = &ipx_seq_route_fops;
p = create_proc_entry("socket", S_IRUGO, ipx_proc_dir);
p = proc_create("socket", S_IRUGO, ipx_proc_dir, &ipx_seq_socket_fops);
if (!p)
goto out_socket;
p->proc_fops = &ipx_seq_socket_fops;
rc = 0;
out:
return rc;

5
net/key/af_key.c
View File

@ -3807,17 +3807,16 @@ static int pfkey_init_proc(void)
{
struct proc_dir_entry *e;
e = create_proc_entry("pfkey", 0, init_net.proc_net);
e = proc_net_fops_create(&init_net, "pfkey", 0, &pfkey_proc_ops);
if (e == NULL)
return -ENOMEM;
e->proc_fops = &pfkey_proc_ops;
return 0;
}
static void pfkey_exit_proc(void)
{
remove_proc_entry("net/pfkey", NULL);
proc_net_remove(&init_net, "pfkey");
}
#else
static inline int pfkey_init_proc(void)

8
net/llc/llc_proc.c
View File

@ -239,18 +239,14 @@ int __init llc_proc_init(void)
goto out;
llc_proc_dir->owner = THIS_MODULE;
p = create_proc_entry("socket", S_IRUGO, llc_proc_dir);
p = proc_create("socket", S_IRUGO, llc_proc_dir, &llc_seq_socket_fops);
if (!p)
goto out_socket;
p->proc_fops = &llc_seq_socket_fops;
p = create_proc_entry("core", S_IRUGO, llc_proc_dir);
p = proc_create("core", S_IRUGO, llc_proc_dir, &llc_seq_core_fops);
if (!p)
goto out_core;
p->proc_fops = &llc_seq_core_fops;
rc = 0;
out:
return rc;

7
net/mac80211/ieee80211_sta.c
View File

@ -1116,9 +1116,10 @@ static void ieee80211_sta_process_addba_request(struct net_device *dev,
/* prepare reordering buffer */
tid_agg_rx->reorder_buf =
kmalloc(buf_size * sizeof(struct sk_buf *), GFP_ATOMIC);
if ((!tid_agg_rx->reorder_buf) && net_ratelimit()) {
printk(KERN_ERR "can not allocate reordering buffer "
"to tid %d\n", tid);
if (!tid_agg_rx->reorder_buf) {
if (net_ratelimit())
printk(KERN_ERR "can not allocate reordering buffer "
"to tid %d\n", tid);
goto end;
}
memset(tid_agg_rx->reorder_buf, 0,

15
net/netfilter/nf_conntrack_core.c
View File

@ -256,13 +256,19 @@ __nf_conntrack_find(const struct nf_conntrack_tuple *tuple)
struct hlist_node *n;
unsigned int hash = hash_conntrack(tuple);
/* Disable BHs the entire time since we normally need to disable them
* at least once for the stats anyway.
*/
local_bh_disable();
hlist_for_each_entry_rcu(h, n, &nf_conntrack_hash[hash], hnode) {
if (nf_ct_tuple_equal(tuple, &h->tuple)) {
NF_CT_STAT_INC(found);
local_bh_enable();
return h;
}
NF_CT_STAT_INC(searched);
}
local_bh_enable();
return NULL;
}
@ -400,17 +406,20 @@ nf_conntrack_tuple_taken(const struct nf_conntrack_tuple *tuple,
struct hlist_node *n;
unsigned int hash = hash_conntrack(tuple);
rcu_read_lock();
/* Disable BHs the entire time since we need to disable them at
* least once for the stats anyway.
*/
rcu_read_lock_bh();
hlist_for_each_entry_rcu(h, n, &nf_conntrack_hash[hash], hnode) {
if (nf_ct_tuplehash_to_ctrack(h) != ignored_conntrack &&
nf_ct_tuple_equal(tuple, &h->tuple)) {
NF_CT_STAT_INC(found);
rcu_read_unlock();
rcu_read_unlock_bh();
return 1;
}
NF_CT_STAT_INC(searched);
}
rcu_read_unlock();
rcu_read_unlock_bh();
return 0;
}

4
net/netfilter/xt_conntrack.c
View File

@ -122,7 +122,7 @@ conntrack_addrcmp(const union nf_inet_addr *kaddr,
const union nf_inet_addr *umask, unsigned int l3proto)
{
if (l3proto == AF_INET)
return (kaddr->ip & umask->ip) == uaddr->ip;
return ((kaddr->ip ^ uaddr->ip) & umask->ip) == 0;
else if (l3proto == AF_INET6)
return ipv6_masked_addr_cmp(&kaddr->in6, &umask->in6,
&uaddr->in6) == 0;
@ -231,7 +231,7 @@ conntrack_mt(const struct sk_buff *skb, const struct net_device *in,
if (test_bit(IPS_DST_NAT_BIT, &ct->status))
statebit |= XT_CONNTRACK_STATE_DNAT;
}
if ((info->state_mask & statebit) ^
if (!!(info->state_mask & statebit) ^
!(info->invert_flags & XT_CONNTRACK_STATE))
return false;
}

4
net/sctp/auth.c
View File

@ -838,11 +838,11 @@ int sctp_auth_set_key(struct sctp_endpoint *ep,
}
/* Create a new key data based on the info passed in */
key = sctp_auth_create_key(auth_key->sca_keylen, GFP_KERNEL);
key = sctp_auth_create_key(auth_key->sca_keylength, GFP_KERNEL);
if (!key)
goto nomem;
memcpy(key->data, &auth_key->sca_key[0], auth_key->sca_keylen);
memcpy(key->data, &auth_key->sca_key[0], auth_key->sca_keylength);
/* If we are replacing, remove the old keys data from the
* key id. If we are adding new key id, add it to the

12
net/sctp/ipv6.c
View File

@ -966,7 +966,7 @@ static struct inet6_protocol sctpv6_protocol = {
.flags = INET6_PROTO_NOPOLICY | INET6_PROTO_FINAL,
};
static struct sctp_af sctp_ipv6_specific = {
static struct sctp_af sctp_af_inet6 = {
.sa_family = AF_INET6,
.sctp_xmit = sctp_v6_xmit,
.setsockopt = ipv6_setsockopt,
@ -998,7 +998,7 @@ static struct sctp_af sctp_ipv6_specific = {
#endif
};
static struct sctp_pf sctp_pf_inet6_specific = {
static struct sctp_pf sctp_pf_inet6 = {
.event_msgname = sctp_inet6_event_msgname,
.skb_msgname = sctp_inet6_skb_msgname,
.af_supported = sctp_inet6_af_supported,
@ -1008,7 +1008,7 @@ static struct sctp_pf sctp_pf_inet6_specific = {
.supported_addrs = sctp_inet6_supported_addrs,
.create_accept_sk = sctp_v6_create_accept_sk,
.addr_v4map = sctp_v6_addr_v4map,
.af = &sctp_ipv6_specific,
.af = &sctp_af_inet6,
};
/* Initialize IPv6 support and register with socket layer. */
@ -1017,10 +1017,10 @@ int sctp_v6_init(void)
int rc;
/* Register the SCTP specific PF_INET6 functions. */
sctp_register_pf(&sctp_pf_inet6_specific, PF_INET6);
sctp_register_pf(&sctp_pf_inet6, PF_INET6);
/* Register the SCTP specific AF_INET6 functions. */
sctp_register_af(&sctp_ipv6_specific);
sctp_register_af(&sctp_af_inet6);
rc = proto_register(&sctpv6_prot, 1);
if (rc)
@ -1051,7 +1051,7 @@ void sctp_v6_exit(void)
inet6_unregister_protosw(&sctpv6_seqpacket_protosw);
inet6_unregister_protosw(&sctpv6_stream_protosw);
proto_unregister(&sctpv6_prot);
list_del(&sctp_ipv6_specific.list);
list_del(&sctp_af_inet6.list);
}
/* Unregister with inet6 layer. */

5
net/sctp/objcnt.c
View File

@ -132,12 +132,11 @@ void sctp_dbg_objcnt_init(void)
{
struct proc_dir_entry *ent;
ent = create_proc_entry("sctp_dbg_objcnt", 0, proc_net_sctp);
ent = proc_create("sctp_dbg_objcnt", 0,
proc_net_sctp, &sctp_objcnt_ops);
if (!ent)
printk(KERN_WARNING
"sctp_dbg_objcnt: Unable to create /proc entry.\n");
else
ent->proc_fops = &sctp_objcnt_ops;
}
/* Cleanup the objcount entry in the proc filesystem. */

4
net/sctp/proc.c
View File

@ -108,12 +108,10 @@ int __init sctp_snmp_proc_init(void)
{
struct proc_dir_entry *p;
p = create_proc_entry("snmp", S_IRUGO, proc_net_sctp);
p = proc_create("snmp", S_IRUGO, proc_net_sctp, &sctp_snmp_seq_fops);
if (!p)
return -ENOMEM;
p->proc_fops = &sctp_snmp_seq_fops;
return 0;
}

12
net/sctp/protocol.c
View File

@ -832,7 +832,7 @@ static inline int sctp_v4_xmit(struct sk_buff *skb,
return ip_queue_xmit(skb, ipfragok);
}
static struct sctp_af sctp_ipv4_specific;
static struct sctp_af sctp_af_inet;
static struct sctp_pf sctp_pf_inet = {
.event_msgname = sctp_inet_event_msgname,
@ -844,7 +844,7 @@ static struct sctp_pf sctp_pf_inet = {
.supported_addrs = sctp_inet_supported_addrs,
.create_accept_sk = sctp_v4_create_accept_sk,
.addr_v4map = sctp_v4_addr_v4map,
.af = &sctp_ipv4_specific,
.af = &sctp_af_inet
};
/* Notifier for inetaddr addition/deletion events. */
@ -906,7 +906,7 @@ static struct net_protocol sctp_protocol = {
};
/* IPv4 address related functions. */
static struct sctp_af sctp_ipv4_specific = {
static struct sctp_af sctp_af_inet = {
.sa_family = AF_INET,
.sctp_xmit = sctp_v4_xmit,
.setsockopt = ip_setsockopt,
@ -1192,7 +1192,7 @@ SCTP_STATIC __init int sctp_init(void)
sctp_sysctl_register();
INIT_LIST_HEAD(&sctp_address_families);
sctp_register_af(&sctp_ipv4_specific);
sctp_register_af(&sctp_af_inet);
status = proto_register(&sctp_prot, 1);
if (status)
@ -1249,7 +1249,7 @@ err_v6_init:
proto_unregister(&sctp_prot);
err_proto_register:
sctp_sysctl_unregister();
list_del(&sctp_ipv4_specific.list);
list_del(&sctp_af_inet.list);
free_pages((unsigned long)sctp_port_hashtable,
get_order(sctp_port_hashsize *
sizeof(struct sctp_bind_hashbucket)));
@ -1299,7 +1299,7 @@ SCTP_STATIC __exit void sctp_exit(void)
inet_unregister_protosw(&sctp_seqpacket_protosw);
sctp_sysctl_unregister();
list_del(&sctp_ipv4_specific.list);
list_del(&sctp_af_inet.list);
free_pages((unsigned long)sctp_assoc_hashtable,
get_order(sctp_assoc_hashsize *

18
net/sctp/socket.c
View File

@ -1964,7 +1964,7 @@ static int sctp_setsockopt_disable_fragments(struct sock *sk,
static int sctp_setsockopt_events(struct sock *sk, char __user *optval,
int optlen)
{
if (optlen != sizeof(struct sctp_event_subscribe))
if (optlen > sizeof(struct sctp_event_subscribe))
return -EINVAL;
if (copy_from_user(&sctp_sk(sk)->subscribe, optval, optlen))
return -EFAULT;
@ -5070,6 +5070,7 @@ static int sctp_getsockopt_peer_auth_chunks(struct sock *sk, int len,
struct sctp_authchunks val;
struct sctp_association *asoc;
struct sctp_chunks_param *ch;
u32 num_chunks;
char __user *to;
if (len <= sizeof(struct sctp_authchunks))
@ -5086,12 +5087,15 @@ static int sctp_getsockopt_peer_auth_chunks(struct sock *sk, int len,
ch = asoc->peer.peer_chunks;
/* See if the user provided enough room for all the data */
if (len < ntohs(ch->param_hdr.length))
num_chunks = ntohs(ch->param_hdr.length) - sizeof(sctp_paramhdr_t);
if (len < num_chunks)
return -EINVAL;
len = ntohs(ch->param_hdr.length);
len = num_chunks;
if (put_user(len, optlen))
return -EFAULT;
if (put_user(num_chunks, &p->gauth_number_of_chunks))
return -EFAULT;
if (copy_to_user(to, ch->chunks, len))
return -EFAULT;
@ -5105,6 +5109,7 @@ static int sctp_getsockopt_local_auth_chunks(struct sock *sk, int len,
struct sctp_authchunks val;
struct sctp_association *asoc;
struct sctp_chunks_param *ch;
u32 num_chunks;
char __user *to;
if (len <= sizeof(struct sctp_authchunks))
@ -5123,12 +5128,15 @@ static int sctp_getsockopt_local_auth_chunks(struct sock *sk, int len,
else
ch = sctp_sk(sk)->ep->auth_chunk_list;
if (len < ntohs(ch->param_hdr.length))
num_chunks = ntohs(ch->param_hdr.length) - sizeof(sctp_paramhdr_t);
if (len < num_chunks)
return -EINVAL;
len = ntohs(ch->param_hdr.length);
len = num_chunks;
if (put_user(len, optlen))
return -EFAULT;
if (put_user(num_chunks, &p->gauth_number_of_chunks))
return -EFAULT;
if (copy_to_user(to, ch->chunks, len))
return -EFAULT;

2
net/sctp/ulpevent.c
View File

@ -206,7 +206,7 @@ struct sctp_ulpevent *sctp_ulpevent_make_assoc_change(
* This field is the total length of the notification data, including
* the notification header.
*/
sac->sac_length = sizeof(struct sctp_assoc_change);
sac->sac_length = skb->len;
/* Socket Extensions for SCTP
* 5.3.1.1 SCTP_ASSOC_CHANGE

14
net/sunrpc/cache.c
View File

@ -316,31 +316,29 @@ static int create_cache_proc_entries(struct cache_detail *cd)
cd->proc_ent->owner = cd->owner;
cd->channel_ent = cd->content_ent = NULL;
p = create_proc_entry("flush", S_IFREG|S_IRUSR|S_IWUSR, cd->proc_ent);
p = proc_create("flush", S_IFREG|S_IRUSR|S_IWUSR,
cd->proc_ent, &cache_flush_operations);
cd->flush_ent = p;
if (p == NULL)
goto out_nomem;
p->proc_fops = &cache_flush_operations;
p->owner = cd->owner;
p->data = cd;
if (cd->cache_request || cd->cache_parse) {
p = create_proc_entry("channel", S_IFREG|S_IRUSR|S_IWUSR,
cd->proc_ent);
p = proc_create("channel", S_IFREG|S_IRUSR|S_IWUSR,
cd->proc_ent, &cache_file_operations);
cd->channel_ent = p;
if (p == NULL)
goto out_nomem;
p->proc_fops = &cache_file_operations;
p->owner = cd->owner;
p->data = cd;
}
if (cd->cache_show) {
p = create_proc_entry("content", S_IFREG|S_IRUSR|S_IWUSR,
cd->proc_ent);
p = proc_create("content", S_IFREG|S_IRUSR|S_IWUSR,
cd->proc_ent, &content_file_operations);
cd->content_ent = p;
if (p == NULL)
goto out_nomem;
p->proc_fops = &content_file_operations;
p->owner = cd->owner;
p->data = cd;
}

3
net/sunrpc/stats.c
View File

@ -229,9 +229,8 @@ do_register(const char *name, void *data, const struct file_operations *fops)
rpc_proc_init();
dprintk("RPC: registering /proc/net/rpc/%s\n", name);
ent = create_proc_entry(name, 0, proc_net_rpc);
ent = proc_create(name, 0, proc_net_rpc, fops);
if (ent) {
ent->proc_fops = fops;
ent->data = data;
}
return ent;

2
net/tipc/cluster.c
View File

@ -142,7 +142,7 @@ void tipc_cltr_attach_node(struct cluster *c_ptr, struct node *n_ptr)
max_n_num = tipc_highest_allowed_slave;
assert(n_num > 0);
assert(n_num <= max_n_num);
assert(c_ptr->nodes[n_num] == 0);
assert(c_ptr->nodes[n_num] == NULL);
c_ptr->nodes[n_num] = n_ptr;
if (n_num > c_ptr->highest_node)
c_ptr->highest_node = n_num;

2
net/tipc/link.c
View File

@ -3251,7 +3251,7 @@ static void link_print(struct link *l_ptr, struct print_buf *buf,
if ((mod(msg_seqno(buf_msg(l_ptr->last_out)) -
msg_seqno(buf_msg(l_ptr->first_out)))
!= (l_ptr->out_queue_size - 1))
|| (l_ptr->last_out->next != 0)) {
|| (l_ptr->last_out->next != NULL)) {
tipc_printf(buf, "\nSend queue inconsistency\n");
tipc_printf(buf, "first_out= %x ", l_ptr->first_out);
tipc_printf(buf, "next_out= %x ", l_ptr->next_out);

2
net/tipc/ref.c
View File

@ -148,7 +148,7 @@ u32 tipc_ref_acquire(void *object, spinlock_t **lock)
reference = (next_plus_upper & ~index_mask) + index;
entry->data.reference = reference;
entry->object = object;
if (lock != 0)
if (lock != NULL)
*lock = &entry->lock;
spin_unlock_bh(&entry->lock);
}

2
net/tipc/zone.c
View File

@ -82,7 +82,7 @@ void tipc_zone_attach_cluster(struct _zone *z_ptr, struct cluster *c_ptr)
assert(c_ptr->addr);
assert(c_num <= tipc_max_clusters);
assert(z_ptr->clusters[c_num] == 0);
assert(z_ptr->clusters[c_num] == NULL);
z_ptr->clusters[c_num] = c_ptr;
}

10
net/wanrouter/wanproc.c
View File

@ -292,14 +292,12 @@ int __init wanrouter_proc_init(void)
if (!proc_router)
goto fail;
p = create_proc_entry("config", S_IRUGO, proc_router);
p = proc_create("config", S_IRUGO, proc_router, &config_fops);
if (!p)
goto fail_config;
p->proc_fops = &config_fops;
p = create_proc_entry("status", S_IRUGO, proc_router);
p = proc_create("status", S_IRUGO, proc_router, &status_fops);
if (!p)
goto fail_stat;
p->proc_fops = &status_fops;
return 0;
fail_stat:
remove_proc_entry("config", proc_router);
@ -329,10 +327,10 @@ int wanrouter_proc_add(struct wan_device* wandev)
if (wandev->magic != ROUTER_MAGIC)
return -EINVAL;
wandev->dent = create_proc_entry(wandev->name, S_IRUGO, proc_router);
wandev->dent = proc_create(wandev->name, S_IRUGO,
proc_router, &wandev_fops);
if (!wandev->dent)
return -ENOMEM;
wandev->dent->proc_fops = &wandev_fops;
wandev->dent->data = wandev;
return 0;
}

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