drm/i915: Transform WaDisablePooledEuLoadBalancingFix into a simple register write
FF_SLICE_CS_CHICKEN2 does not belong to the context image. Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> Reviewed-by: Michał Winiarski <michal.winiarski@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1504798809-5653-6-git-send-email-oscar.mateo@intel.com Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -1024,8 +1024,8 @@ static int bxt_init_workarounds(struct intel_engine_cs *engine)
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/* WaDisablePooledEuLoadBalancingFix:bxt */
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if (IS_BXT_REVID(dev_priv, BXT_REVID_B0, REVID_FOREVER)) {
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WA_SET_BIT_MASKED(FF_SLICE_CS_CHICKEN2,
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GEN9_POOLED_EU_LOAD_BALANCING_FIX_DISABLE);
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I915_WRITE(FF_SLICE_CS_CHICKEN2,
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_MASKED_BIT_ENABLE(GEN9_POOLED_EU_LOAD_BALANCING_FIX_DISABLE));
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}
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/* WaDisableSbeCacheDispatchPortSharing:bxt */
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