arm64: dts: ti: k3-j721s2-main: Add support for USB
Add support for single instance of USB 3.0 controller in J721S2 SoC. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Matt Ranostay <mranostay@ti.com> Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20230331090028.8373-2-r-gunasekaran@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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@ -26,6 +26,21 @@
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scm_conf: syscon@104000 {
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compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
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reg = <0x00 0x00104000 0x00 0x18000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00 0x00 0x00104000 0x18000>;
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usb_serdes_mux: mux-controller@0 {
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compatible = "mmio-mux";
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reg = <0x0 0x4>;
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#mux-control-cells = <1>;
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mux-reg-masks = <0x0 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */
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};
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};
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gic500: interrupt-controller@1800000 {
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compatible = "arm,gic-v3";
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#address-cells = <2>;
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@ -745,6 +760,36 @@
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};
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};
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usbss0: cdns-usb@4104000 {
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compatible = "ti,j721e-usb";
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reg = <0x00 0x04104000 0x00 0x100>;
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clocks = <&k3_clks 360 16>, <&k3_clks 360 15>;
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clock-names = "ref", "lpm";
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assigned-clocks = <&k3_clks 360 16>; /* USB2_REFCLK */
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assigned-clock-parents = <&k3_clks 360 17>;
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power-domains = <&k3_pds 360 TI_SCI_PD_EXCLUSIVE>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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dma-coherent;
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status = "disabled"; /* Needs pinmux */
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usb0: usb@6000000 {
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compatible = "cdns,usb3";
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reg = <0x00 0x06000000 0x00 0x10000>,
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<0x00 0x06010000 0x00 0x10000>,
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<0x00 0x06020000 0x00 0x10000>;
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reg-names = "otg", "xhci", "dev";
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "host", "peripheral", "otg";
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maximum-speed = "super-speed";
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dr_mode = "otg";
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};
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};
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main_mcan0: can@2701000 {
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compatible = "bosch,m_can";
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reg = <0x00 0x02701000 0x00 0x200>,
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