gpio: move the pin ranges into gpio_device
Instead of keeping this reference to the pin ranges in the client driver-supplied gpio_chip, move it to the internal gpio_device as the drivers have no need to inspect this. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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4e6fd26dcf
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20ec3e39fc
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@ -71,29 +71,29 @@ static int acpi_gpiochip_find(struct gpio_chip *gc, void *data)
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* controller uses pin controller and the mapping is not contiguous the
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* offset might be different.
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*/
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static int acpi_gpiochip_pin_to_gpio_offset(struct gpio_chip *chip, int pin)
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static int acpi_gpiochip_pin_to_gpio_offset(struct gpio_device *gdev, int pin)
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{
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struct gpio_pin_range *pin_range;
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/* If there are no ranges in this chip, use 1:1 mapping */
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if (list_empty(&chip->pin_ranges))
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if (list_empty(&gdev->pin_ranges))
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return pin;
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list_for_each_entry(pin_range, &chip->pin_ranges, node) {
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list_for_each_entry(pin_range, &gdev->pin_ranges, node) {
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const struct pinctrl_gpio_range *range = &pin_range->range;
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int i;
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if (range->pins) {
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for (i = 0; i < range->npins; i++) {
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if (range->pins[i] == pin)
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return range->base + i - chip->base;
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return range->base + i - gdev->base;
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}
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} else {
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if (pin >= range->pin_base &&
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pin < range->pin_base + range->npins) {
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unsigned gpio_base;
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gpio_base = range->base - chip->base;
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gpio_base = range->base - gdev->base;
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return gpio_base + pin - range->pin_base;
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}
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}
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@ -102,7 +102,7 @@ static int acpi_gpiochip_pin_to_gpio_offset(struct gpio_chip *chip, int pin)
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return -EINVAL;
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}
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#else
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static inline int acpi_gpiochip_pin_to_gpio_offset(struct gpio_chip *chip,
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static inline int acpi_gpiochip_pin_to_gpio_offset(struct gpio_device *gdev,
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int pin)
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{
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return pin;
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@ -134,7 +134,7 @@ static struct gpio_desc *acpi_get_gpiod(char *path, int pin)
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if (!chip)
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return ERR_PTR(-EPROBE_DEFER);
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offset = acpi_gpiochip_pin_to_gpio_offset(chip, pin);
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offset = acpi_gpiochip_pin_to_gpio_offset(chip->gpiodev, pin);
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if (offset < 0)
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return ERR_PTR(offset);
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@ -202,7 +202,7 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares,
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if (!handler)
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return AE_BAD_PARAMETER;
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pin = acpi_gpiochip_pin_to_gpio_offset(chip, pin);
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pin = acpi_gpiochip_pin_to_gpio_offset(chip->gpiodev, pin);
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if (pin < 0)
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return AE_BAD_PARAMETER;
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@ -673,7 +673,7 @@ acpi_gpio_adr_space_handler(u32 function, acpi_physical_address address,
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struct gpio_desc *desc;
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bool found;
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pin = acpi_gpiochip_pin_to_gpio_offset(chip, pin);
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pin = acpi_gpiochip_pin_to_gpio_offset(chip->gpiodev, pin);
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if (pin < 0) {
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status = AE_BAD_PARAMETER;
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goto out;
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@ -532,8 +532,7 @@ int gpiochip_add_data(struct gpio_chip *chip, void *data)
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spin_unlock_irqrestore(&gpio_lock, flags);
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#ifdef CONFIG_PINCTRL
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/* FIXME: move pin ranges to gpio_device */
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INIT_LIST_HEAD(&chip->pin_ranges);
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INIT_LIST_HEAD(&gdev->pin_ranges);
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#endif
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status = gpiochip_set_desc_names(chip);
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@ -1036,7 +1035,7 @@ int gpiochip_add_pingroup_range(struct gpio_chip *chip,
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gpio_offset, gpio_offset + pin_range->range.npins - 1,
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pinctrl_dev_get_devname(pctldev), pin_group);
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list_add_tail(&pin_range->node, &chip->pin_ranges);
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list_add_tail(&pin_range->node, &gdev->pin_ranges);
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return 0;
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}
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@ -1085,7 +1084,7 @@ int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
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pinctl_name,
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pin_offset, pin_offset + npins - 1);
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list_add_tail(&pin_range->node, &chip->pin_ranges);
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list_add_tail(&pin_range->node, &gdev->pin_ranges);
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return 0;
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}
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@ -1098,8 +1097,9 @@ EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
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void gpiochip_remove_pin_ranges(struct gpio_chip *chip)
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{
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struct gpio_pin_range *pin_range, *tmp;
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struct gpio_device *gdev = chip->gpiodev;
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list_for_each_entry_safe(pin_range, tmp, &chip->pin_ranges, node) {
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list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
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list_del(&pin_range->node);
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pinctrl_remove_gpio_range(pin_range->pctldev,
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&pin_range->range);
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@ -55,6 +55,16 @@ struct gpio_device {
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int base;
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u16 ngpio;
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struct list_head list;
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#ifdef CONFIG_PINCTRL
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/*
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* If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
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* describe the actual pin range which they serve in an SoC. This
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* information would be used by pinctrl subsystem to configure
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* corresponding pins for gpio usage.
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*/
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struct list_head pin_ranges;
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#endif
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};
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/**
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@ -181,15 +181,6 @@ struct gpio_chip {
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int (*of_xlate)(struct gpio_chip *gc,
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const struct of_phandle_args *gpiospec, u32 *flags);
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#endif
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#ifdef CONFIG_PINCTRL
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/*
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* If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
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* describe the actual pin range which they serve in an SoC. This
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* information would be used by pinctrl subsystem to configure
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* corresponding pins for gpio usage.
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*/
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struct list_head pin_ranges;
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#endif
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};
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extern const char *gpiochip_is_requested(struct gpio_chip *chip,
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