drm/i915: Reduce PSR re-activation time for VLV/CHV.
With 'commit 30886c5a
("drm/i915: VLV/CHV PSR: Increase wait delay
time before active PSR.")' we fixed a blank screen when first
activation was happening immediately after PSR being enabled.
There we gave more time for idleness by increasing the delay
between re-activating sequences.
However, commit "drm/i915: Delay first PSR activation."
delay the first activation in a better way keeping a good PSR
residency. So, we can now reduce the delay on re-enable.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
parent
d0ac896a47
commit
20bb97fe0e
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@ -729,7 +729,6 @@ void intel_psr_flush(struct drm_device *dev,
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_crtc *crtc;
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enum pipe pipe;
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int delay_ms = HAS_DDI(dev) ? 100 : 500;
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mutex_lock(&dev_priv->psr.lock);
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if (!dev_priv->psr.enabled) {
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@ -766,7 +765,7 @@ void intel_psr_flush(struct drm_device *dev,
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if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits)
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if (!work_busy(&dev_priv->psr.work.work))
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schedule_delayed_work(&dev_priv->psr.work,
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msecs_to_jiffies(delay_ms));
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msecs_to_jiffies(100));
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mutex_unlock(&dev_priv->psr.lock);
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}
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