drm/i915: gen 9 h/w w/a (WaEnableForceRestoreInCtxtDescForVCS)
Add: WaEnableForceRestoreInCtxtDescForVCS v2: Add stepping check. v3: Fixed stepping check direction. Cleaned up indentation. Signed-off-by: Nick Hoath <nicholas.hoath@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -254,8 +254,10 @@ u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj)
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return lrca >> 12;
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}
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static uint64_t execlists_ctx_descriptor(struct drm_i915_gem_object *ctx_obj)
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static uint64_t execlists_ctx_descriptor(struct intel_engine_cs *ring,
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struct drm_i915_gem_object *ctx_obj)
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{
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struct drm_device *dev = ring->dev;
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uint64_t desc;
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uint64_t lrca = i915_gem_obj_ggtt_offset(ctx_obj);
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@ -272,6 +274,13 @@ static uint64_t execlists_ctx_descriptor(struct drm_i915_gem_object *ctx_obj)
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* signalling between Command Streamers */
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/* desc |= GEN8_CTX_FORCE_RESTORE; */
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/* WaEnableForceRestoreInCtxtDescForVCS:skl */
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if (IS_GEN9(dev) &&
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INTEL_REVID(dev) <= SKL_REVID_B0 &&
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(ring->id == BCS || ring->id == VCS ||
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ring->id == VECS || ring->id == VCS2))
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desc |= GEN8_CTX_FORCE_RESTORE;
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return desc;
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}
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@ -286,13 +295,13 @@ static void execlists_elsp_write(struct intel_engine_cs *ring,
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/* XXX: You must always write both descriptors in the order below. */
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if (ctx_obj1)
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temp = execlists_ctx_descriptor(ctx_obj1);
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temp = execlists_ctx_descriptor(ring, ctx_obj1);
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else
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temp = 0;
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desc[1] = (u32)(temp >> 32);
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desc[0] = (u32)temp;
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temp = execlists_ctx_descriptor(ctx_obj0);
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temp = execlists_ctx_descriptor(ring, ctx_obj0);
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desc[3] = (u32)(temp >> 32);
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desc[2] = (u32)temp;
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