MIPS: BCM63xx: fix 6328 boot selection bit
MISC_STRAP_BUS_BOOT_SEL_SHIFT is 18 according to Broadcom's GPL source code. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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@ -1367,8 +1367,8 @@
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#define MISC_STRAPBUS_6328_REG 0x240
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#define STRAPBUS_6328_FCVO_SHIFT 7
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#define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
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#define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 28)
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#define STRAPBUS_6328_BOOT_SEL_NAND (0 << 28)
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#define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 18)
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#define STRAPBUS_6328_BOOT_SEL_NAND (0 << 18)
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/*************************************************************************
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* _REG relative to RSET_PCIE
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