iio: dac: ltc2688: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes: 832cb9eeb9
("iio: dac: add support for ltc2688")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-60-jic23@kernel.org
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@ -91,10 +91,10 @@ struct ltc2688_state {
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struct mutex lock;
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int vref;
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/*
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* DMA (thus cache coherency maintenance) requires the
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* DMA (thus cache coherency maintenance) may require the
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* transfer buffers to live in their own cache lines.
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*/
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u8 tx_data[6] ____cacheline_aligned;
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u8 tx_data[6] __aligned(IIO_DMA_MINALIGN);
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u8 rx_data[3];
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};
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