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drm/amd/powerplay: support VCN powergate status retrieval on Raven 

Enable VCN powergate status report on Raven.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan 2019-07-22 09:55:36 +08:00 committed by Alex Deucher
parent a02709818f
commit 201cd702b7
1 changed files with 9 additions and 0 deletions
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9
drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
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@ -1111,6 +1111,7 @@ static int smu10_thermal_get_temperature(struct pp_hwmgr *hwmgr)
static int smu10_read_sensor(struct pp_hwmgr *hwmgr, int idx, static int smu10_read_sensor(struct pp_hwmgr *hwmgr, int idx,
void *value, int *size) void *value, int *size)
{ {
struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend);
uint32_t sclk, mclk; uint32_t sclk, mclk;
int ret = 0; int ret = 0;
@ -1132,6 +1133,10 @@ static int smu10_read_sensor(struct pp_hwmgr *hwmgr, int idx,
case AMDGPU_PP_SENSOR_GPU_TEMP: case AMDGPU_PP_SENSOR_GPU_TEMP:
*((uint32_t *)value) = smu10_thermal_get_temperature(hwmgr); *((uint32_t *)value) = smu10_thermal_get_temperature(hwmgr);
break; break;
case AMDGPU_PP_SENSOR_VCN_POWER_STATE:
*(uint32_t *)value = smu10_data->vcn_power_gated ? 0 : 1;
*size = 4;
break;
default: default:
ret = -EINVAL; ret = -EINVAL;
break; break;
@ -1175,18 +1180,22 @@ static int smu10_powergate_sdma(struct pp_hwmgr *hwmgr, bool gate)
static void smu10_powergate_vcn(struct pp_hwmgr *hwmgr, bool bgate) static void smu10_powergate_vcn(struct pp_hwmgr *hwmgr, bool bgate)
{ {
struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend);
if (bgate) { if (bgate) {
amdgpu_device_ip_set_powergating_state(hwmgr->adev, amdgpu_device_ip_set_powergating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_VCN, AMD_IP_BLOCK_TYPE_VCN,
AMD_PG_STATE_GATE); AMD_PG_STATE_GATE);
smum_send_msg_to_smc_with_parameter(hwmgr, smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_PowerDownVcn, 0); PPSMC_MSG_PowerDownVcn, 0);
smu10_data->vcn_power_gated = true;
} else { } else {
smum_send_msg_to_smc_with_parameter(hwmgr, smum_send_msg_to_smc_with_parameter(hwmgr,
PPSMC_MSG_PowerUpVcn, 0); PPSMC_MSG_PowerUpVcn, 0);
amdgpu_device_ip_set_powergating_state(hwmgr->adev, amdgpu_device_ip_set_powergating_state(hwmgr->adev,
AMD_IP_BLOCK_TYPE_VCN, AMD_IP_BLOCK_TYPE_VCN,
AMD_PG_STATE_UNGATE); AMD_PG_STATE_UNGATE);
smu10_data->vcn_power_gated = false;
} }
} }