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drm/nouveau/mc: switch to instanced constructor 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
This commit is contained in:
Ben Skeggs 2020-12-04 12:28:41 +10:00
parent 3b9e93f7d7
commit 1fc2fddfbc
22 changed files with 147 additions and 150 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
View File

@ -60,7 +60,6 @@ struct nvkm_device {
struct notifier_block nb;
} acpi;
struct nvkm_mc *mc;
struct nvkm_mmu *mmu;
struct nvkm_subdev *mxm;
struct nvkm_pci *pci;
@ -132,7 +131,6 @@ struct nvkm_device_chip {
#include <core/layout.h>
#undef NVKM_LAYOUT_INST
#undef NVKM_LAYOUT_ONCE
int (*mc )(struct nvkm_device *, int idx, struct nvkm_mc **);
int (*mmu )(struct nvkm_device *, int idx, struct nvkm_mmu **);
int (*mxm )(struct nvkm_device *, int idx, struct nvkm_subdev **);
int (*pci )(struct nvkm_device *, int idx, struct nvkm_pci **);

1
drivers/gpu/drm/nouveau/include/nvkm/core/layout.h
View File

@ -5,6 +5,7 @@ NVKM_LAYOUT_ONCE(NVKM_SUBDEV_IBUS , struct nvkm_subdev , ibus)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_GPIO , struct nvkm_gpio , gpio)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_I2C , struct nvkm_i2c , i2c)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_FUSE , struct nvkm_fuse , fuse)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_MC , struct nvkm_mc , mc)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_BUS , struct nvkm_bus , bus)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_INSTMEM , struct nvkm_instmem , imem)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_FB , struct nvkm_fb , fb)

30
drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h
View File

@ -18,19 +18,19 @@ void nvkm_mc_intr_rearm(struct nvkm_device *);
void nvkm_mc_intr_mask(struct nvkm_device *, enum nvkm_devidx, bool enable);
void nvkm_mc_unk260(struct nvkm_device *, u32 data);
int nv04_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
int nv11_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
int nv17_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
int nv44_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
int nv50_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
int g84_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
int g98_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
int gt215_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
int gf100_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
int gk104_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
int gk20a_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
int gp100_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
int gp10b_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
int tu102_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
int ga100_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
int nv04_mc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_mc **);
int nv11_mc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_mc **);
int nv17_mc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_mc **);
int nv44_mc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_mc **);
int nv50_mc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_mc **);
int g84_mc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_mc **);
int g98_mc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_mc **);
int gt215_mc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_mc **);
int gf100_mc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_mc **);
int gk104_mc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_mc **);
int gk20a_mc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_mc **);
int gp100_mc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_mc **);
int gp10b_mc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_mc **);
int tu102_mc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_mc **);
int ga100_mc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_mc **);
#endif

1
drivers/gpu/drm/nouveau/nvkm/core/subdev.c
View File

@ -33,7 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = {
#include <core/layout.h>
#undef NVKM_LAYOUT_ONCE
#undef NVKM_LAYOUT_INST
[NVKM_SUBDEV_MC ] = "mc",
[NVKM_SUBDEV_MMU ] = "mmu",
[NVKM_SUBDEV_MXM ] = "mxm",
[NVKM_SUBDEV_PCI ] = "pci",

175
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
View File

@ -84,7 +84,7 @@ nv4_chipset = {
.fb = { 0x00000001, nv04_fb_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv04_mc_new,
.mc = { 0x00000001, nv04_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -105,7 +105,7 @@ nv5_chipset = {
.fb = { 0x00000001, nv04_fb_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv04_mc_new,
.mc = { 0x00000001, nv04_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -127,7 +127,7 @@ nv10_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv04_mc_new,
.mc = { 0x00000001, nv04_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -147,7 +147,7 @@ nv11_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv11_mc_new,
.mc = { 0x00000001, nv11_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -169,7 +169,7 @@ nv15_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv04_mc_new,
.mc = { 0x00000001, nv04_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -191,7 +191,7 @@ nv17_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -213,7 +213,7 @@ nv18_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -235,7 +235,7 @@ nv1a_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv04_mc_new,
.mc = { 0x00000001, nv04_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -257,7 +257,7 @@ nv1f_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -279,7 +279,7 @@ nv20_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -301,7 +301,7 @@ nv25_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -323,7 +323,7 @@ nv28_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -345,7 +345,7 @@ nv2a_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -367,7 +367,7 @@ nv30_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -389,7 +389,7 @@ nv31_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -412,7 +412,7 @@ nv34_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -435,7 +435,7 @@ nv35_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -457,7 +457,7 @@ nv36_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv04_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv04_mmu_new,
.pci = nv04_pci_new,
.timer = nv04_timer_new,
@ -480,7 +480,7 @@ nv40_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv04_mmu_new,
.pci = nv40_pci_new,
.therm = nv40_therm_new,
@ -506,7 +506,7 @@ nv41_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv41_mmu_new,
.pci = nv40_pci_new,
.therm = nv40_therm_new,
@ -532,7 +532,7 @@ nv42_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv41_mmu_new,
.pci = nv40_pci_new,
.therm = nv40_therm_new,
@ -558,7 +558,7 @@ nv43_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv41_mmu_new,
.pci = nv40_pci_new,
.therm = nv40_therm_new,
@ -584,7 +584,7 @@ nv44_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv44_mc_new,
.mc = { 0x00000001, nv44_mc_new },
.mmu = nv44_mmu_new,
.pci = nv40_pci_new,
.therm = nv40_therm_new,
@ -610,7 +610,7 @@ nv45_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv04_mmu_new,
.pci = nv40_pci_new,
.therm = nv40_therm_new,
@ -636,7 +636,7 @@ nv46_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv44_mc_new,
.mc = { 0x00000001, nv44_mc_new },
.mmu = nv44_mmu_new,
.pci = nv46_pci_new,
.therm = nv40_therm_new,
@ -662,7 +662,7 @@ nv47_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv41_mmu_new,
.pci = nv40_pci_new,
.therm = nv40_therm_new,
@ -688,7 +688,7 @@ nv49_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv41_mmu_new,
.pci = nv40_pci_new,
.therm = nv40_therm_new,
@ -714,7 +714,7 @@ nv4a_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv44_mc_new,
.mc = { 0x00000001, nv44_mc_new },
.mmu = nv04_mmu_new,
.pci = nv40_pci_new,
.therm = nv40_therm_new,
@ -740,7 +740,7 @@ nv4b_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv17_mc_new,
.mc = { 0x00000001, nv17_mc_new },
.mmu = nv41_mmu_new,
.pci = nv40_pci_new,
.therm = nv40_therm_new,
@ -766,7 +766,7 @@ nv4c_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv44_mc_new,
.mc = { 0x00000001, nv44_mc_new },
.mmu = nv44_mmu_new,
.pci = nv4c_pci_new,
.therm = nv40_therm_new,
@ -792,7 +792,7 @@ nv4e_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv4e_i2c_new },
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv44_mc_new,
.mc = { 0x00000001, nv44_mc_new },
.mmu = nv44_mmu_new,
.pci = nv4c_pci_new,
.therm = nv40_therm_new,
@ -820,7 +820,7 @@ nv50_chipset = {
.gpio = { 0x00000001, nv50_gpio_new },
.i2c = { 0x00000001, nv50_i2c_new },
.imem = { 0x00000001, nv50_instmem_new },
.mc = nv50_mc_new,
.mc = { 0x00000001, nv50_mc_new },
.mmu = nv50_mmu_new,
.mxm = nv50_mxm_new,
.pci = nv46_pci_new,
@ -847,7 +847,7 @@ nv63_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv44_mc_new,
.mc = { 0x00000001, nv44_mc_new },
.mmu = nv44_mmu_new,
.pci = nv4c_pci_new,
.therm = nv40_therm_new,
@ -873,7 +873,7 @@ nv67_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv44_mc_new,
.mc = { 0x00000001, nv44_mc_new },
.mmu = nv44_mmu_new,
.pci = nv4c_pci_new,
.therm = nv40_therm_new,
@ -899,7 +899,7 @@ nv68_chipset = {
.gpio = { 0x00000001, nv10_gpio_new },
.i2c = { 0x00000001, nv04_i2c_new },
.imem = { 0x00000001, nv40_instmem_new },
.mc = nv44_mc_new,
.mc = { 0x00000001, nv44_mc_new },
.mmu = nv44_mmu_new,
.pci = nv4c_pci_new,
.therm = nv40_therm_new,
@ -927,7 +927,7 @@ nv84_chipset = {
.gpio = { 0x00000001, nv50_gpio_new },
.i2c = { 0x00000001, nv50_i2c_new },
.imem = { 0x00000001, nv50_instmem_new },
.mc = g84_mc_new,
.mc = { 0x00000001, g84_mc_new },
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
.pci = g84_pci_new,
@ -959,7 +959,7 @@ nv86_chipset = {
.gpio = { 0x00000001, nv50_gpio_new },
.i2c = { 0x00000001, nv50_i2c_new },
.imem = { 0x00000001, nv50_instmem_new },
.mc = g84_mc_new,
.mc = { 0x00000001, g84_mc_new },
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
.pci = g84_pci_new,
@ -991,7 +991,7 @@ nv92_chipset = {
.gpio = { 0x00000001, nv50_gpio_new },
.i2c = { 0x00000001, nv50_i2c_new },
.imem = { 0x00000001, nv50_instmem_new },
.mc = g84_mc_new,
.mc = { 0x00000001, g84_mc_new },
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
.pci = g92_pci_new,
@ -1023,7 +1023,7 @@ nv94_chipset = {
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = { 0x00000001, nv50_instmem_new },
.mc = g84_mc_new,
.mc = { 0x00000001, g84_mc_new },
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
.pci = g94_pci_new,
@ -1055,7 +1055,7 @@ nv96_chipset = {
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = { 0x00000001, nv50_instmem_new },
.mc = g84_mc_new,
.mc = { 0x00000001, g84_mc_new },
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
.pci = g94_pci_new,
@ -1087,7 +1087,7 @@ nv98_chipset = {
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = { 0x00000001, nv50_instmem_new },
.mc = g98_mc_new,
.mc = { 0x00000001, g98_mc_new },
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
.pci = g94_pci_new,
@ -1119,7 +1119,7 @@ nva0_chipset = {
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, nv50_i2c_new },
.imem = { 0x00000001, nv50_instmem_new },
.mc = g84_mc_new,
.mc = { 0x00000001, g84_mc_new },
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
.pci = g94_pci_new,
@ -1151,7 +1151,7 @@ nva3_chipset = {
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = { 0x00000001, nv50_instmem_new },
.mc = gt215_mc_new,
.mc = { 0x00000001, gt215_mc_new },
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
.pci = g94_pci_new,
@ -1185,7 +1185,7 @@ nva5_chipset = {
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = { 0x00000001, nv50_instmem_new },
.mc = gt215_mc_new,
.mc = { 0x00000001, gt215_mc_new },
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
.pci = g94_pci_new,
@ -1218,7 +1218,7 @@ nva8_chipset = {
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = { 0x00000001, nv50_instmem_new },
.mc = gt215_mc_new,
.mc = { 0x00000001, gt215_mc_new },
.mmu = g84_mmu_new,
.mxm = nv50_mxm_new,
.pci = g94_pci_new,
@ -1251,7 +1251,7 @@ nvaa_chipset = {
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = { 0x00000001, nv50_instmem_new },
.mc = g98_mc_new,
.mc = { 0x00000001, g98_mc_new },
.mmu = mcp77_mmu_new,
.mxm = nv50_mxm_new,
.pci = g94_pci_new,
@ -1283,7 +1283,7 @@ nvac_chipset = {
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = { 0x00000001, nv50_instmem_new },
.mc = g98_mc_new,
.mc = { 0x00000001, g98_mc_new },
.mmu = mcp77_mmu_new,
.mxm = nv50_mxm_new,
.pci = g94_pci_new,
@ -1315,7 +1315,7 @@ nvaf_chipset = {
.gpio = { 0x00000001, g94_gpio_new },
.i2c = { 0x00000001, g94_i2c_new },
.imem = { 0x00000001, nv50_instmem_new },
.mc = gt215_mc_new,
.mc = { 0x00000001, gt215_mc_new },
.mmu = mcp77_mmu_new,
.mxm = nv50_mxm_new,
.pci = g94_pci_new,
@ -1351,7 +1351,7 @@ nvc0_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gf100_ltc_new },
.mc = gf100_mc_new,
.mc = { 0x00000001, gf100_mc_new },
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
.pci = gf100_pci_new,
@ -1388,7 +1388,7 @@ nvc1_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gf100_ltc_new },
.mc = gf100_mc_new,
.mc = { 0x00000001, gf100_mc_new },
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
.pci = gf106_pci_new,
@ -1424,7 +1424,7 @@ nvc3_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gf100_ltc_new },
.mc = gf100_mc_new,
.mc = { 0x00000001, gf100_mc_new },
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
.pci = gf106_pci_new,
@ -1460,7 +1460,7 @@ nvc4_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gf100_ltc_new },
.mc = gf100_mc_new,
.mc = { 0x00000001, gf100_mc_new },
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
.pci = gf100_pci_new,
@ -1497,7 +1497,7 @@ nvc8_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gf100_ltc_new },
.mc = gf100_mc_new,
.mc = { 0x00000001, gf100_mc_new },
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
.pci = gf100_pci_new,
@ -1534,7 +1534,7 @@ nvce_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gf100_ltc_new },
.mc = gf100_mc_new,
.mc = { 0x00000001, gf100_mc_new },
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
.pci = gf100_pci_new,
@ -1571,7 +1571,7 @@ nvcf_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gf100_ltc_new },
.mc = gf100_mc_new,
.mc = { 0x00000001, gf100_mc_new },
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
.pci = gf106_pci_new,
@ -1607,7 +1607,7 @@ nvd7_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gf100_ltc_new },
.mc = gf100_mc_new,
.mc = { 0x00000001, gf100_mc_new },
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
.pci = gf106_pci_new,
@ -1642,7 +1642,7 @@ nvd9_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gf100_ltc_new },
.mc = gf100_mc_new,
.mc = { 0x00000001, gf100_mc_new },
.mmu = gf100_mmu_new,
.mxm = nv50_mxm_new,
.pci = gf106_pci_new,
@ -1678,7 +1678,7 @@ nve4_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gk104_ltc_new },
.mc = gk104_mc_new,
.mc = { 0x00000001, gk104_mc_new },
.mmu = gk104_mmu_new,
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
@ -1717,7 +1717,7 @@ nve6_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gk104_ltc_new },
.mc = gk104_mc_new,
.mc = { 0x00000001, gk104_mc_new },
.mmu = gk104_mmu_new,
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
@ -1756,7 +1756,7 @@ nve7_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gk104_ltc_new },
.mc = gk104_mc_new,
.mc = { 0x00000001, gk104_mc_new },
.mmu = gk104_mmu_new,
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
@ -1790,7 +1790,7 @@ nvea_chipset = {
.ibus = { 0x00000001, gk20a_ibus_new },
.imem = { 0x00000001, gk20a_instmem_new },
.ltc = { 0x00000001, gk104_ltc_new },
.mc = gk20a_mc_new,
.mc = { 0x00000001, gk20a_mc_new },
.mmu = gk20a_mmu_new,
.pmu = gk20a_pmu_new,
.timer = gk20a_timer_new,
@ -1820,7 +1820,7 @@ nvf0_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gk104_ltc_new },
.mc = gk104_mc_new,
.mc = { 0x00000001, gk104_mc_new },
.mmu = gk104_mmu_new,
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
@ -1858,7 +1858,7 @@ nvf1_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gk104_ltc_new },
.mc = gk104_mc_new,
.mc = { 0x00000001, gk104_mc_new },
.mmu = gk104_mmu_new,
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
@ -1896,7 +1896,7 @@ nv106_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gk104_ltc_new },
.mc = gk20a_mc_new,
.mc = { 0x00000001, gk20a_mc_new },
.mmu = gk104_mmu_new,
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
@ -1934,7 +1934,7 @@ nv108_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gk104_ltc_new },
.mc = gk20a_mc_new,
.mc = { 0x00000001, gk20a_mc_new },
.mmu = gk104_mmu_new,
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
@ -1972,7 +1972,7 @@ nv117_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gm107_ltc_new },
.mc = gk20a_mc_new,
.mc = { 0x00000001, gk20a_mc_new },
.mmu = gk104_mmu_new,
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
@ -2008,7 +2008,7 @@ nv118_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gm107_ltc_new },
.mc = gk20a_mc_new,
.mc = { 0x00000001, gk20a_mc_new },
.mmu = gk104_mmu_new,
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
@ -2042,7 +2042,7 @@ nv120_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gm200_ltc_new },
.mc = gk20a_mc_new,
.mc = { 0x00000001, gk20a_mc_new },
.mmu = gm200_mmu_new,
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
@ -2080,7 +2080,7 @@ nv124_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gm200_ltc_new },
.mc = gk20a_mc_new,
.mc = { 0x00000001, gk20a_mc_new },
.mmu = gm200_mmu_new,
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
@ -2118,7 +2118,7 @@ nv126_chipset = {
.iccsense = { 0x00000001, gf100_iccsense_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gm200_ltc_new },
.mc = gk20a_mc_new,
.mc = { 0x00000001, gk20a_mc_new },
.mmu = gm200_mmu_new,
.mxm = nv50_mxm_new,
.pci = gk104_pci_new,
@ -2151,7 +2151,7 @@ nv12b_chipset = {
.ibus = { 0x00000001, gk20a_ibus_new },
.imem = { 0x00000001, gk20a_instmem_new },
.ltc = { 0x00000001, gm200_ltc_new },
.mc = gk20a_mc_new,
.mc = { 0x00000001, gk20a_mc_new },
.mmu = gm20b_mmu_new,
.pmu = gm20b_pmu_new,
.timer = gk20a_timer_new,
@ -2180,7 +2180,7 @@ nv130_chipset = {
.ibus = { 0x00000001, gm200_ibus_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gp100_ltc_new },
.mc = gp100_mc_new,
.mc = { 0x00000001, gp100_mc_new },
.mmu = gp100_mmu_new,
.therm = gp100_therm_new,
.pci = gp100_pci_new,
@ -2220,7 +2220,7 @@ nv132_chipset = {
.ibus = { 0x00000001, gm200_ibus_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gp102_ltc_new },
.mc = gp100_mc_new,
.mc = { 0x00000001, gp100_mc_new },
.mmu = gp100_mmu_new,
.therm = gp100_therm_new,
.pci = gp100_pci_new,
@ -2258,7 +2258,7 @@ nv134_chipset = {
.ibus = { 0x00000001, gm200_ibus_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gp102_ltc_new },
.mc = gp100_mc_new,
.mc = { 0x00000001, gp100_mc_new },
.mmu = gp100_mmu_new,
.therm = gp100_therm_new,
.pci = gp100_pci_new,
@ -2296,7 +2296,7 @@ nv136_chipset = {
.ibus = { 0x00000001, gm200_ibus_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gp102_ltc_new },
.mc = gp100_mc_new,
.mc = { 0x00000001, gp100_mc_new },
.mmu = gp100_mmu_new,
.therm = gp100_therm_new,
.pci = gp100_pci_new,
@ -2333,7 +2333,7 @@ nv137_chipset = {
.ibus = { 0x00000001, gm200_ibus_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gp102_ltc_new },
.mc = gp100_mc_new,
.mc = { 0x00000001, gp100_mc_new },
.mmu = gp100_mmu_new,
.therm = gp100_therm_new,
.pci = gp100_pci_new,
@ -2371,7 +2371,7 @@ nv138_chipset = {
.ibus = { 0x00000001, gm200_ibus_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gp102_ltc_new },
.mc = gp100_mc_new,
.mc = { 0x00000001, gp100_mc_new },
.mmu = gp100_mmu_new,
.therm = gp100_therm_new,
.pci = gp100_pci_new,
@ -2403,7 +2403,7 @@ nv13b_chipset = {
.ibus = { 0x00000001, gp10b_ibus_new },
.imem = { 0x00000001, gk20a_instmem_new },
.ltc = { 0x00000001, gp10b_ltc_new },
.mc = gp10b_mc_new,
.mc = { 0x00000001, gp10b_mc_new },
.mmu = gp10b_mmu_new,
.pmu = gp10b_pmu_new,
.timer = gk20a_timer_new,
@ -2432,7 +2432,7 @@ nv140_chipset = {
.ibus = { 0x00000001, gm200_ibus_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gp102_ltc_new },
.mc = gp100_mc_new,
.mc = { 0x00000001, gp100_mc_new },
.mmu = gv100_mmu_new,
.pci = gp100_pci_new,
.pmu = gp102_pmu_new,
@ -2476,7 +2476,7 @@ nv162_chipset = {
.ibus = { 0x00000001, gm200_ibus_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gp102_ltc_new },
.mc = tu102_mc_new,
.mc = { 0x00000001, tu102_mc_new },
.mmu = tu102_mmu_new,
.pci = gp100_pci_new,
.pmu = gp102_pmu_new,
@ -2514,7 +2514,7 @@ nv164_chipset = {
.ibus = { 0x00000001, gm200_ibus_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gp102_ltc_new },
.mc = tu102_mc_new,
.mc = { 0x00000001, tu102_mc_new },
.mmu = tu102_mmu_new,
.pci = gp100_pci_new,
.pmu = gp102_pmu_new,
@ -2553,7 +2553,7 @@ nv166_chipset = {
.ibus = { 0x00000001, gm200_ibus_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gp102_ltc_new },
.mc = tu102_mc_new,
.mc = { 0x00000001, tu102_mc_new },
.mmu = tu102_mmu_new,
.pci = gp100_pci_new,
.pmu = gp102_pmu_new,
@ -2593,7 +2593,7 @@ nv167_chipset = {
.ibus = { 0x00000001, gm200_ibus_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gp102_ltc_new },
.mc = tu102_mc_new,
.mc = { 0x00000001, tu102_mc_new },
.mmu = tu102_mmu_new,
.pci = gp100_pci_new,
.pmu = gp102_pmu_new,
@ -2631,7 +2631,7 @@ nv168_chipset = {
.ibus = { 0x00000001, gm200_ibus_new },
.imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, gp102_ltc_new },
.mc = tu102_mc_new,
.mc = { 0x00000001, tu102_mc_new },
.mmu = tu102_mmu_new,
.pci = gp100_pci_new,
.pmu = gp102_pmu_new,
@ -2663,7 +2663,7 @@ nv170_chipset = {
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = { 0x00000001, nv50_instmem_new },
.mc = ga100_mc_new,
.mc = { 0x00000001, ga100_mc_new },
.mmu = tu102_mmu_new,
.pci = gp100_pci_new,
.timer = gk20a_timer_new,
@ -2680,7 +2680,7 @@ nv172_chipset = {
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = { 0x00000001, nv50_instmem_new },
.mc = ga100_mc_new,
.mc = { 0x00000001, ga100_mc_new },
.mmu = tu102_mmu_new,
.pci = gp100_pci_new,
.timer = gk20a_timer_new,
@ -2699,7 +2699,7 @@ nv174_chipset = {
.i2c = { 0x00000001, gm200_i2c_new },
.ibus = { 0x00000001, gm200_ibus_new },
.imem = { 0x00000001, nv50_instmem_new },
.mc = ga100_mc_new,
.mc = { 0x00000001, ga100_mc_new },
.mmu = tu102_mmu_new,
.pci = gp100_pci_new,
.timer = gk20a_timer_new,
@ -3248,7 +3248,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
#include <core/layout.h>
#undef NVKM_LAYOUT_INST
#undef NVKM_LAYOUT_ONCE
_(NVKM_SUBDEV_MC , mc);
_(NVKM_SUBDEV_MMU , mmu);
_(NVKM_SUBDEV_MXM , mxm);
_(NVKM_SUBDEV_PCI , pci);

8
drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.c
View File

@ -203,19 +203,19 @@ nvkm_mc = {
void
nvkm_mc_ctor(const struct nvkm_mc_func *func, struct nvkm_device *device,
int index, struct nvkm_mc *mc)
enum nvkm_subdev_type type, int inst, struct nvkm_mc *mc)
{
nvkm_subdev_ctor(&nvkm_mc, device, index, &mc->subdev);
nvkm_subdev_ctor(&nvkm_mc, device, type, inst, &mc->subdev);
mc->func = func;
}
int
nvkm_mc_new_(const struct nvkm_mc_func *func, struct nvkm_device *device,
int index, struct nvkm_mc **pmc)
enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
struct nvkm_mc *mc;
if (!(mc = *pmc = kzalloc(sizeof(*mc), GFP_KERNEL)))
return -ENOMEM;
nvkm_mc_ctor(func, device, index, *pmc);
nvkm_mc_ctor(func, device, type, inst, *pmc);
return 0;
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/mc/g84.c
View File

@ -62,7 +62,7 @@ g84_mc = {
};
int
g84_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
g84_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
return nvkm_mc_new_(&g84_mc, device, index, pmc);
return nvkm_mc_new_(&g84_mc, device, type, inst, pmc);
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/mc/g98.c
View File

@ -62,7 +62,7 @@ g98_mc = {
};
int
g98_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
g98_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
return nvkm_mc_new_(&g98_mc, device, index, pmc);
return nvkm_mc_new_(&g98_mc, device, type, inst, pmc);
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/mc/ga100.c
View File

@ -68,7 +68,7 @@ ga100_mc = {
};
int
ga100_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
ga100_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
return nvkm_mc_new_(&ga100_mc, device, index, pmc);
return nvkm_mc_new_(&ga100_mc, device, type, inst, pmc);
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c
View File

@ -112,7 +112,7 @@ gf100_mc = {
};
int
gf100_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
gf100_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
return nvkm_mc_new_(&gf100_mc, device, index, pmc);
return nvkm_mc_new_(&gf100_mc, device, type, inst, pmc);
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.c
View File

@ -60,7 +60,7 @@ gk104_mc = {
};
int
gk104_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
gk104_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
return nvkm_mc_new_(&gk104_mc, device, index, pmc);
return nvkm_mc_new_(&gk104_mc, device, type, inst, pmc);
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.c
View File

@ -35,7 +35,7 @@ gk20a_mc = {
};
int
gk20a_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
gk20a_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
return nvkm_mc_new_(&gk20a_mc, device, index, pmc);
return nvkm_mc_new_(&gk20a_mc, device, type, inst, pmc);
}

8
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.c
View File

@ -106,13 +106,13 @@ gp100_mc = {
int
gp100_mc_new_(const struct nvkm_mc_func *func, struct nvkm_device *device,
int index, struct nvkm_mc **pmc)
enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
struct gp100_mc *mc;
if (!(mc = kzalloc(sizeof(*mc), GFP_KERNEL)))
return -ENOMEM;
nvkm_mc_ctor(func, device, index, &mc->base);
nvkm_mc_ctor(func, device, type, inst, &mc->base);
*pmc = &mc->base;
spin_lock_init(&mc->lock);
@ -122,7 +122,7 @@ gp100_mc_new_(const struct nvkm_mc_func *func, struct nvkm_device *device,
}
int
gp100_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
gp100_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
return gp100_mc_new_(&gp100_mc, device, index, pmc);
return gp100_mc_new_(&gp100_mc, device, type, inst, pmc);
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp10b.c
View File

@ -43,7 +43,7 @@ gp10b_mc = {
};
int
gp10b_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
gp10b_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
return gp100_mc_new_(&gp10b_mc, device, index, pmc);
return gp100_mc_new_(&gp10b_mc, device, type, inst, pmc);
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gt215.c
View File

@ -71,7 +71,7 @@ gt215_mc = {
};
int
gt215_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
gt215_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
return nvkm_mc_new_(&gt215_mc, device, index, pmc);
return nvkm_mc_new_(&gt215_mc, device, type, inst, pmc);
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c
View File

@ -80,7 +80,7 @@ nv04_mc = {
};
int
nv04_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
nv04_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
return nvkm_mc_new_(&nv04_mc, device, index, pmc);
return nvkm_mc_new_(&nv04_mc, device, type, inst, pmc);
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv11.c
View File

@ -44,7 +44,7 @@ nv11_mc = {
};
int
nv11_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
nv11_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
return nvkm_mc_new_(&nv11_mc, device, index, pmc);
return nvkm_mc_new_(&nv11_mc, device, type, inst, pmc);
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv17.c
View File

@ -53,7 +53,7 @@ nv17_mc = {
};
int
nv17_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
nv17_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
return nvkm_mc_new_(&nv17_mc, device, index, pmc);
return nvkm_mc_new_(&nv17_mc, device, type, inst, pmc);
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv44.c
View File

@ -48,7 +48,7 @@ nv44_mc = {
};
int
nv44_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
nv44_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
return nvkm_mc_new_(&nv44_mc, device, index, pmc);
return nvkm_mc_new_(&nv44_mc, device, type, inst, pmc);
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.c
View File

@ -55,7 +55,7 @@ nv50_mc = {
};
int
nv50_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
nv50_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
return nvkm_mc_new_(&nv50_mc, device, index, pmc);
return nvkm_mc_new_(&nv50_mc, device, type, inst, pmc);
}

10
drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h
View File

@ -4,10 +4,10 @@
#define nvkm_mc(p) container_of((p), struct nvkm_mc, subdev)
#include <subdev/mc.h>
void nvkm_mc_ctor(const struct nvkm_mc_func *, struct nvkm_device *,
int index, struct nvkm_mc *);
int nvkm_mc_new_(const struct nvkm_mc_func *, struct nvkm_device *,
int index, struct nvkm_mc **);
void nvkm_mc_ctor(const struct nvkm_mc_func *, struct nvkm_device *, enum nvkm_subdev_type, int,
struct nvkm_mc *);
int nvkm_mc_new_(const struct nvkm_mc_func *, struct nvkm_device *, enum nvkm_subdev_type, int,
struct nvkm_mc **);
struct nvkm_mc_map {
u32 stat;
@ -52,7 +52,7 @@ void gf100_mc_unk260(struct nvkm_mc *, u32);
void gp100_mc_intr_unarm(struct nvkm_mc *);
void gp100_mc_intr_rearm(struct nvkm_mc *);
void gp100_mc_intr_mask(struct nvkm_mc *, u32, u32);
int gp100_mc_new_(const struct nvkm_mc_func *, struct nvkm_device *, int,
int gp100_mc_new_(const struct nvkm_mc_func *, struct nvkm_device *, enum nvkm_subdev_type, int,
struct nvkm_mc **);
extern const struct nvkm_mc_map gk104_mc_intr[];

10
drivers/gpu/drm/nouveau/nvkm/subdev/mc/tu102.c
View File

@ -112,15 +112,15 @@ tu102_mc = {
.reset = gk104_mc_reset,
};
int
static int
tu102_mc_new_(const struct nvkm_mc_func *func, struct nvkm_device *device,
int index, struct nvkm_mc **pmc)
enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
struct tu102_mc *mc;
if (!(mc = kzalloc(sizeof(*mc), GFP_KERNEL)))
return -ENOMEM;
nvkm_mc_ctor(func, device, index, &mc->base);
nvkm_mc_ctor(func, device, type, inst, &mc->base);
*pmc = &mc->base;
spin_lock_init(&mc->lock);
@ -130,7 +130,7 @@ tu102_mc_new_(const struct nvkm_mc_func *func, struct nvkm_device *device,
}
int
tu102_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
tu102_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
{
return tu102_mc_new_(&tu102_mc, device, index, pmc);
return tu102_mc_new_(&tu102_mc, device, type, inst, pmc);
}