soc: qcom: llcc: Add configuration data for SM6350
Add LLCC configuration data for SM6350 SoC. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210820203105.229764-6-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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@ -142,6 +142,16 @@ static const struct llcc_slice_config sdm845_data[] = {
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{ LLCC_AUDHW, 22, 1024, 1, 1, 0xffc, 0x2, 0, 0, 1, 1, 0 },
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};
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static const struct llcc_slice_config sm6350_data[] = {
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{ LLCC_CPUSS, 1, 768, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 1 },
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{ LLCC_MDM, 8, 512, 2, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
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{ LLCC_GPUHTW, 11, 256, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
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{ LLCC_GPU, 12, 512, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
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{ LLCC_MDMPNG, 21, 768, 0, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
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{ LLCC_NPU, 23, 768, 1, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
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{ LLCC_MODPE, 29, 64, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 },
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};
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static const struct llcc_slice_config sm8150_data[] = {
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{ LLCC_CPUSS, 1, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 1 },
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{ LLCC_VIDSC0, 2, 512, 2, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 },
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@ -203,6 +213,11 @@ static const struct qcom_llcc_config sdm845_cfg = {
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.need_llcc_cfg = false,
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};
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static const struct qcom_llcc_config sm6350_cfg = {
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.sct_data = sm6350_data,
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.size = ARRAY_SIZE(sm6350_data),
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};
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static const struct qcom_llcc_config sm8150_cfg = {
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.sct_data = sm8150_data,
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.size = ARRAY_SIZE(sm8150_data),
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@ -626,6 +641,7 @@ static const struct of_device_id qcom_llcc_of_match[] = {
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{ .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfg },
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{ .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfg },
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{ .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfg },
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{ .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfg },
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{ .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfg },
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{ .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfg },
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{ }
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