[PATCH] lockdep: irqtrace subsystem, s390 support
irqtrace support for s390. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Arjan van de Ven <arjan@infradead.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -1,5 +1,9 @@
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menu "Kernel hacking"
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config TRACE_IRQFLAGS_SUPPORT
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bool
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default y
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source "lib/Kconfig.debug"
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endmenu
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@ -58,6 +58,21 @@ STACK_SIZE = 1 << STACK_SHIFT
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#define BASED(name) name-system_call(%r13)
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#ifdef CONFIG_TRACE_IRQFLAGS
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.macro TRACE_IRQS_ON
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l %r1,BASED(.Ltrace_irq_on)
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basr %r14,%r1
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.endm
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.macro TRACE_IRQS_OFF
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l %r1,BASED(.Ltrace_irq_off)
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basr %r14,%r1
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.endm
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#else
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#define TRACE_IRQS_ON
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#define TRACE_IRQS_OFF
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#endif
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/*
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* Register usage in interrupt handlers:
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* R9 - pointer to current task structure
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@ -361,6 +376,7 @@ ret_from_fork:
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st %r15,SP_R15(%r15) # store stack pointer for new kthread
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0: l %r1,BASED(.Lschedtail)
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basr %r14,%r1
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TRACE_IRQS_ON
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stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
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b BASED(sysc_return)
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@ -516,6 +532,7 @@ pgm_no_vtime3:
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mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
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mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
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oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
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TRACE_IRQS_ON
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stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
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b BASED(sysc_do_svc)
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@ -539,9 +556,11 @@ io_int_handler:
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io_no_vtime:
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#endif
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l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
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TRACE_IRQS_OFF
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l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
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la %r2,SP_PTREGS(%r15) # address of register-save area
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basr %r14,%r1 # branch to standard irq handler
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TRACE_IRQS_ON
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io_return:
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tm SP_PSW+1(%r15),0x01 # returning to user ?
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@ -651,10 +670,12 @@ ext_int_handler:
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ext_no_vtime:
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#endif
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l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
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TRACE_IRQS_OFF
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la %r2,SP_PTREGS(%r15) # address of register-save area
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lh %r3,__LC_EXT_INT_CODE # get interruption code
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l %r1,BASED(.Ldo_extint)
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basr %r14,%r1
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TRACE_IRQS_ON
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b BASED(io_return)
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__critical_end:
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@ -731,8 +752,10 @@ mcck_no_vtime:
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stosm __SF_EMPTY(%r15),0x04 # turn dat on
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tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
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bno BASED(mcck_return)
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TRACE_IRQS_OFF
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l %r1,BASED(.Ls390_handle_mcck)
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basr %r14,%r1 # call machine check handler
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TRACE_IRQS_ON
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mcck_return:
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mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
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ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
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@ -1012,7 +1035,11 @@ cleanup_io_leave_insn:
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.Lvfork: .long sys_vfork
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.Lschedtail: .long schedule_tail
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.Lsysc_table: .long sys_call_table
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#ifdef CONFIG_TRACE_IRQFLAGS
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.Ltrace_irq_on:.long trace_hardirqs_on
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.Ltrace_irq_off:
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.long trace_hardirqs_off
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#endif
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.Lcritical_start:
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.long __critical_start + 0x80000000
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.Lcritical_end:
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@ -58,6 +58,19 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
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#define BASED(name) name-system_call(%r13)
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#ifdef CONFIG_TRACE_IRQFLAGS
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.macro TRACE_IRQS_ON
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brasl %r14,trace_hardirqs_on
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.endm
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.macro TRACE_IRQS_OFF
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brasl %r14,trace_hardirqs_off
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.endm
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#else
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#define TRACE_IRQS_ON
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#define TRACE_IRQS_OFF
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#endif
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.macro STORE_TIMER lc_offset
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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stpt \lc_offset
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@ -354,6 +367,7 @@ ret_from_fork:
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jo 0f
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stg %r15,SP_R15(%r15) # store stack pointer for new kthread
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0: brasl %r14,schedule_tail
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TRACE_IRQS_ON
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stosm 24(%r15),0x03 # reenable interrupts
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j sysc_return
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@ -535,6 +549,7 @@ pgm_no_vtime3:
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mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
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mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
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oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
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TRACE_IRQS_ON
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stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
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j sysc_do_svc
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@ -557,8 +572,10 @@ io_int_handler:
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io_no_vtime:
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#endif
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lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
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TRACE_IRQS_OFF
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la %r2,SP_PTREGS(%r15) # address of register-save area
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brasl %r14,do_IRQ # call standard irq handler
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TRACE_IRQS_ON
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io_return:
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tm SP_PSW+1(%r15),0x01 # returning to user ?
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@ -665,9 +682,11 @@ ext_int_handler:
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ext_no_vtime:
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#endif
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lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
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TRACE_IRQS_OFF
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la %r2,SP_PTREGS(%r15) # address of register-save area
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llgh %r3,__LC_EXT_INT_CODE # get interruption code
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brasl %r14,do_extint
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TRACE_IRQS_ON
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j io_return
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__critical_end:
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@ -743,7 +762,9 @@ mcck_no_vtime:
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stosm __SF_EMPTY(%r15),0x04 # turn dat on
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tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
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jno mcck_return
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TRACE_IRQS_OFF
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brasl %r14,s390_handle_mcck
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TRACE_IRQS_ON
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mcck_return:
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mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
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ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
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@ -97,7 +97,7 @@ asmlinkage void do_softirq(void)
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account_system_vtime(current);
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__local_bh_enable();
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_local_bh_enable();
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local_irq_restore(flags);
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}
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@ -142,6 +142,7 @@ static void default_idle(void)
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return;
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}
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trace_hardirqs_on();
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/* Wait for external, I/O or machine check interrupt. */
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__load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_WAIT |
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PSW_MASK_IO | PSW_MASK_EXT);
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@ -383,6 +383,7 @@ void
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sclp_sync_wait(void)
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{
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unsigned long psw_mask;
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unsigned long flags;
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unsigned long cr0, cr0_sync;
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u64 timeout;
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@ -395,9 +396,11 @@ sclp_sync_wait(void)
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sclp_tod_from_jiffies(sclp_request_timer.expires -
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jiffies);
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}
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local_irq_save(flags);
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/* Prevent bottom half from executing once we force interrupts open */
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local_bh_disable();
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/* Enable service-signal interruption, disable timer interrupts */
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trace_hardirqs_on();
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__ctl_store(cr0, 0, 0);
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cr0_sync = cr0;
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cr0_sync |= 0x00000200;
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barrier();
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cpu_relax();
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}
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/* Restore interrupt settings */
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asm volatile ("SSM 0(%0)"
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: : "a" (&psw_mask) : "memory");
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local_irq_disable();
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__ctl_load(cr0, 0, 0);
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__local_bh_enable();
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_local_bh_enable();
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local_irq_restore(flags);
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}
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EXPORT_SYMBOL(sclp_sync_wait);
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@ -147,7 +147,7 @@ cio_tpi(void)
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sch->driver->irq(&sch->dev);
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spin_unlock(&sch->lock);
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irq_exit ();
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__local_bh_enable();
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_local_bh_enable();
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return 1;
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}
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@ -0,0 +1,50 @@
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/*
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* include/asm-s390/irqflags.h
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*
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* Copyright (C) IBM Corp. 2006
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* Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
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*/
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#ifndef __ASM_IRQFLAGS_H
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#define __ASM_IRQFLAGS_H
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#ifdef __KERNEL__
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/* interrupt control.. */
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#define raw_local_irq_enable() ({ \
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unsigned long __dummy; \
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__asm__ __volatile__ ( \
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"stosm 0(%1),0x03" \
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: "=m" (__dummy) : "a" (&__dummy) : "memory" ); \
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})
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#define raw_local_irq_disable() ({ \
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unsigned long __flags; \
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__asm__ __volatile__ ( \
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"stnsm 0(%1),0xfc" : "=m" (__flags) : "a" (&__flags) ); \
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__flags; \
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})
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#define raw_local_save_flags(x) \
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__asm__ __volatile__("stosm 0(%1),0" : "=m" (x) : "a" (&x), "m" (x) )
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#define raw_local_irq_restore(x) \
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__asm__ __volatile__("ssm 0(%0)" : : "a" (&x), "m" (x) : "memory")
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#define raw_irqs_disabled() \
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({ \
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unsigned long flags; \
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local_save_flags(flags); \
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!((flags >> __FLAG_SHIFT) & 3); \
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})
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static inline int raw_irqs_disabled_flags(unsigned long flags)
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{
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return !((flags >> __FLAG_SHIFT) & 3);
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}
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/* For spinlocks etc */
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#define raw_local_irq_save(x) ((x) = raw_local_irq_disable())
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#endif /* __KERNEL__ */
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#endif /* __ASM_IRQFLAGS_H */
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#define set_mb(var, value) do { var = value; mb(); } while (0)
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#define set_wmb(var, value) do { var = value; wmb(); } while (0)
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/* interrupt control.. */
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#define local_irq_enable() ({ \
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unsigned long __dummy; \
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__asm__ __volatile__ ( \
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"stosm 0(%1),0x03" \
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: "=m" (__dummy) : "a" (&__dummy) : "memory" ); \
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})
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#define local_irq_disable() ({ \
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unsigned long __flags; \
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__asm__ __volatile__ ( \
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"stnsm 0(%1),0xfc" : "=m" (__flags) : "a" (&__flags) ); \
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__flags; \
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})
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#define local_save_flags(x) \
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__asm__ __volatile__("stosm 0(%1),0" : "=m" (x) : "a" (&x), "m" (x) )
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#define local_irq_restore(x) \
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__asm__ __volatile__("ssm 0(%0)" : : "a" (&x), "m" (x) : "memory")
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#define irqs_disabled() \
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({ \
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unsigned long flags; \
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local_save_flags(flags); \
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!((flags >> __FLAG_SHIFT) & 3); \
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})
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#ifdef __s390x__
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#define __ctl_load(array, low, high) ({ \
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})
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#endif /* __s390x__ */
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/* For spinlocks etc */
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#define local_irq_save(x) ((x) = local_irq_disable())
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#include <linux/irqflags.h>
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/*
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* Use to set psw mask except for the first byte which
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#endif /* __KERNEL__ */
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#endif
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