ACPICA: Disassembler: Add new ACPI 5 interrupt sharing flags.

This changes adds the ShareAndWake and ExclusiveAndWake flags which
were added to the Irq, Interrupt, and Gpio resource descriptors
in ACPI 5.0.

Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This commit is contained in:
Bob Moore 2012-12-19 05:38:12 +00:00 committed by Rafael J. Wysocki
parent 886308ecea
commit 1f06c92110
2 changed files with 6 additions and 4 deletions

View File

@ -98,7 +98,7 @@ struct acpi_rsdump_info acpi_rs_dump_irq[7] = {
acpi_gbl_he_decode}, acpi_gbl_he_decode},
{ACPI_RSD_1BITFLAG, ACPI_RSD_OFFSET(irq.polarity), "Polarity", {ACPI_RSD_1BITFLAG, ACPI_RSD_OFFSET(irq.polarity), "Polarity",
acpi_gbl_ll_decode}, acpi_gbl_ll_decode},
{ACPI_RSD_1BITFLAG, ACPI_RSD_OFFSET(irq.sharable), "Sharing", {ACPI_RSD_2BITFLAG, ACPI_RSD_OFFSET(irq.sharable), "Sharing",
acpi_gbl_shr_decode}, acpi_gbl_shr_decode},
{ACPI_RSD_UINT8, ACPI_RSD_OFFSET(irq.interrupt_count), {ACPI_RSD_UINT8, ACPI_RSD_OFFSET(irq.interrupt_count),
"Interrupt Count", NULL}, "Interrupt Count", NULL},
@ -287,7 +287,7 @@ struct acpi_rsdump_info acpi_rs_dump_ext_irq[8] = {
"Triggering", acpi_gbl_he_decode}, "Triggering", acpi_gbl_he_decode},
{ACPI_RSD_1BITFLAG, ACPI_RSD_OFFSET(extended_irq.polarity), "Polarity", {ACPI_RSD_1BITFLAG, ACPI_RSD_OFFSET(extended_irq.polarity), "Polarity",
acpi_gbl_ll_decode}, acpi_gbl_ll_decode},
{ACPI_RSD_1BITFLAG, ACPI_RSD_OFFSET(extended_irq.sharable), "Sharing", {ACPI_RSD_2BITFLAG, ACPI_RSD_OFFSET(extended_irq.sharable), "Sharing",
acpi_gbl_shr_decode}, acpi_gbl_shr_decode},
{ACPI_RSD_SOURCE, ACPI_RSD_OFFSET(extended_irq.resource_source), NULL, {ACPI_RSD_SOURCE, ACPI_RSD_OFFSET(extended_irq.resource_source), NULL,
NULL}, NULL},
@ -320,7 +320,7 @@ struct acpi_rsdump_info acpi_rs_dump_gpio[16] = {
"ProducerConsumer", acpi_gbl_consume_decode}, "ProducerConsumer", acpi_gbl_consume_decode},
{ACPI_RSD_UINT8, ACPI_RSD_OFFSET(gpio.pin_config), "PinConfig", {ACPI_RSD_UINT8, ACPI_RSD_OFFSET(gpio.pin_config), "PinConfig",
acpi_gbl_ppc_decode}, acpi_gbl_ppc_decode},
{ACPI_RSD_2BITFLAG, ACPI_RSD_OFFSET(gpio.sharable), "Sharable", {ACPI_RSD_2BITFLAG, ACPI_RSD_OFFSET(gpio.sharable), "Sharing",
acpi_gbl_shr_decode}, acpi_gbl_shr_decode},
{ACPI_RSD_2BITFLAG, ACPI_RSD_OFFSET(gpio.io_restriction), {ACPI_RSD_2BITFLAG, ACPI_RSD_OFFSET(gpio.io_restriction),
"IoRestriction", acpi_gbl_ior_decode}, "IoRestriction", acpi_gbl_ior_decode},

View File

@ -127,7 +127,9 @@ const char *acpi_gbl_rw_decode[] = {
const char *acpi_gbl_shr_decode[] = { const char *acpi_gbl_shr_decode[] = {
"Exclusive", "Exclusive",
"Shared" "Shared",
"ExclusiveAndWake", /* ACPI 5.0 */
"SharedAndWake" /* ACPI 5.0 */
}; };
const char *acpi_gbl_siz_decode[] = { const char *acpi_gbl_siz_decode[] = {