x86/coco: Mark cc_platform_has() and descendants noinstr
Those will be used in code regions where instrumentation is not allowed so mark them as such. No functional changes. Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Link: https://lore.kernel.org/r/20230328201712.25852-2-bp@alien8.de
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@ -16,7 +16,7 @@
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enum cc_vendor cc_vendor __ro_after_init;
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static u64 cc_mask __ro_after_init;
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static bool intel_cc_platform_has(enum cc_attr attr)
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static bool noinstr intel_cc_platform_has(enum cc_attr attr)
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{
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switch (attr) {
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case CC_ATTR_GUEST_UNROLL_STRING_IO:
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@ -34,7 +34,7 @@ static bool intel_cc_platform_has(enum cc_attr attr)
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* the other levels of SME/SEV functionality, including C-bit
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* based SEV-SNP, are not enabled.
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*/
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static __maybe_unused bool amd_cc_platform_vtom(enum cc_attr attr)
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static __maybe_unused __always_inline bool amd_cc_platform_vtom(enum cc_attr attr)
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{
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switch (attr) {
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case CC_ATTR_GUEST_MEM_ENCRYPT:
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@ -58,7 +58,7 @@ static __maybe_unused bool amd_cc_platform_vtom(enum cc_attr attr)
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* the trampoline area must be encrypted.
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*/
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static bool amd_cc_platform_has(enum cc_attr attr)
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static bool noinstr amd_cc_platform_has(enum cc_attr attr)
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{
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#ifdef CONFIG_AMD_MEM_ENCRYPT
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@ -97,7 +97,7 @@ static bool amd_cc_platform_has(enum cc_attr attr)
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#endif
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}
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bool cc_platform_has(enum cc_attr attr)
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bool noinstr cc_platform_has(enum cc_attr attr)
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{
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switch (cc_vendor) {
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case CC_VENDOR_AMD:
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