drm/amdgpu: keep the prefered/allowed domains in the BO
Stop copying that to the bo list entry, it doesn't change anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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636ce25c30
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1ea863fd73
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@ -484,8 +484,6 @@ struct amdgpu_bo_list_entry {
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struct amdgpu_bo *robj;
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struct ttm_validate_buffer tv;
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struct amdgpu_bo_va *bo_va;
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unsigned prefered_domains;
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unsigned allowed_domains;
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uint32_t priority;
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};
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@ -522,7 +520,8 @@ struct amdgpu_bo {
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/* Protected by gem.mutex */
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struct list_head list;
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/* Protected by tbo.reserved */
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u32 initial_domain;
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u32 prefered_domains;
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u32 allowed_domains;
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struct ttm_place placements[AMDGPU_GEM_DOMAIN_MAX + 1];
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struct ttm_placement placement;
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struct ttm_buffer_object tbo;
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@ -111,23 +111,16 @@ static int amdgpu_bo_list_set(struct amdgpu_device *adev,
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drm_gem_object_unreference_unlocked(gobj);
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entry->priority = min(info[i].bo_priority,
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AMDGPU_BO_LIST_MAX_PRIORITY);
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entry->prefered_domains = entry->robj->initial_domain;
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entry->allowed_domains = entry->prefered_domains;
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if (entry->allowed_domains == AMDGPU_GEM_DOMAIN_VRAM)
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entry->allowed_domains |= AMDGPU_GEM_DOMAIN_GTT;
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if (amdgpu_ttm_tt_has_userptr(entry->robj->tbo.ttm)) {
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if (amdgpu_ttm_tt_has_userptr(entry->robj->tbo.ttm))
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has_userptr = true;
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entry->prefered_domains = AMDGPU_GEM_DOMAIN_GTT;
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entry->allowed_domains = AMDGPU_GEM_DOMAIN_GTT;
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}
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entry->tv.bo = &entry->robj->tbo;
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entry->tv.shared = true;
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if (entry->prefered_domains == AMDGPU_GEM_DOMAIN_GDS)
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if (entry->robj->prefered_domains == AMDGPU_GEM_DOMAIN_GDS)
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gds_obj = entry->robj;
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if (entry->prefered_domains == AMDGPU_GEM_DOMAIN_GWS)
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if (entry->robj->prefered_domains == AMDGPU_GEM_DOMAIN_GWS)
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gws_obj = entry->robj;
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if (entry->prefered_domains == AMDGPU_GEM_DOMAIN_OA)
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if (entry->robj->prefered_domains == AMDGPU_GEM_DOMAIN_OA)
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oa_obj = entry->robj;
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trace_amdgpu_bo_list_set(list, entry->robj);
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@ -107,8 +107,6 @@ static int amdgpu_cs_user_fence_chunk(struct amdgpu_cs_parser *p,
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}
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p->uf_entry.robj = amdgpu_bo_ref(p->uf.bo);
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p->uf_entry.prefered_domains = AMDGPU_GEM_DOMAIN_GTT;
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p->uf_entry.allowed_domains = AMDGPU_GEM_DOMAIN_GTT;
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p->uf_entry.priority = 0;
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p->uf_entry.tv.bo = &p->uf_entry.robj->tbo;
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p->uf_entry.tv.shared = true;
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@ -315,9 +313,9 @@ int amdgpu_cs_list_validate(struct amdgpu_cs_parser *p,
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* completely.
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*/
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if (p->bytes_moved <= p->bytes_moved_threshold)
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domain = lobj->prefered_domains;
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domain = bo->prefered_domains;
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else
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domain = lobj->allowed_domains;
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domain = bo->allowed_domains;
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retry:
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amdgpu_ttm_placement_from_domain(bo, domain);
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@ -327,8 +325,8 @@ int amdgpu_cs_list_validate(struct amdgpu_cs_parser *p,
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initial_bytes_moved;
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if (unlikely(r)) {
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if (r != -ERESTARTSYS && domain != lobj->allowed_domains) {
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domain = lobj->allowed_domains;
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if (r != -ERESTARTSYS && domain != bo->allowed_domains) {
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domain = bo->allowed_domains;
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goto retry;
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}
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return r;
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@ -252,6 +252,8 @@ int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data,
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goto handle_lockup;
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bo = gem_to_amdgpu_bo(gobj);
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bo->prefered_domains = AMDGPU_GEM_DOMAIN_GTT;
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bo->allowed_domains = AMDGPU_GEM_DOMAIN_GTT;
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r = amdgpu_ttm_tt_set_userptr(bo->tbo.ttm, args->addr, args->flags);
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if (r)
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goto release_object;
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@ -628,7 +630,7 @@ int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
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info.bo_size = robj->gem_base.size;
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info.alignment = robj->tbo.mem.page_alignment << PAGE_SHIFT;
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info.domains = robj->initial_domain;
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info.domains = robj->prefered_domains;
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info.domain_flags = robj->flags;
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amdgpu_bo_unreserve(robj);
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if (copy_to_user(out, &info, sizeof(info)))
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@ -641,9 +643,13 @@ int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
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amdgpu_bo_unreserve(robj);
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break;
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}
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robj->initial_domain = args->value & (AMDGPU_GEM_DOMAIN_VRAM |
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AMDGPU_GEM_DOMAIN_GTT |
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AMDGPU_GEM_DOMAIN_CPU);
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robj->prefered_domains = args->value & (AMDGPU_GEM_DOMAIN_VRAM |
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AMDGPU_GEM_DOMAIN_GTT |
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AMDGPU_GEM_DOMAIN_CPU);
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robj->allowed_domains = robj->prefered_domains;
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if (robj->allowed_domains == AMDGPU_GEM_DOMAIN_VRAM)
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robj->allowed_domains |= AMDGPU_GEM_DOMAIN_GTT;
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amdgpu_bo_unreserve(robj);
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break;
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default:
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@ -254,12 +254,15 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
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bo->adev = adev;
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INIT_LIST_HEAD(&bo->list);
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INIT_LIST_HEAD(&bo->va);
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bo->initial_domain = domain & (AMDGPU_GEM_DOMAIN_VRAM |
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AMDGPU_GEM_DOMAIN_GTT |
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AMDGPU_GEM_DOMAIN_CPU |
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AMDGPU_GEM_DOMAIN_GDS |
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AMDGPU_GEM_DOMAIN_GWS |
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AMDGPU_GEM_DOMAIN_OA);
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bo->prefered_domains = domain & (AMDGPU_GEM_DOMAIN_VRAM |
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AMDGPU_GEM_DOMAIN_GTT |
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AMDGPU_GEM_DOMAIN_CPU |
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AMDGPU_GEM_DOMAIN_GDS |
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AMDGPU_GEM_DOMAIN_GWS |
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AMDGPU_GEM_DOMAIN_OA);
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bo->allowed_domains = bo->prefered_domains;
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if (!kernel && bo->allowed_domains == AMDGPU_GEM_DOMAIN_VRAM)
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bo->allowed_domains |= AMDGPU_GEM_DOMAIN_GTT;
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bo->flags = flags;
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@ -89,8 +89,6 @@ void amdgpu_vm_get_pd_bo(struct amdgpu_vm *vm,
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struct amdgpu_bo_list_entry *entry)
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{
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entry->robj = vm->page_directory;
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entry->prefered_domains = AMDGPU_GEM_DOMAIN_VRAM;
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entry->allowed_domains = AMDGPU_GEM_DOMAIN_VRAM;
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entry->priority = 0;
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entry->tv.bo = &vm->page_directory->tbo;
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entry->tv.shared = true;
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@ -1124,8 +1122,6 @@ int amdgpu_vm_bo_map(struct amdgpu_device *adev,
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}
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entry->robj = pt;
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entry->prefered_domains = AMDGPU_GEM_DOMAIN_VRAM;
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entry->allowed_domains = AMDGPU_GEM_DOMAIN_VRAM;
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entry->priority = 0;
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entry->tv.bo = &entry->robj->tbo;
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entry->tv.shared = true;
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