Merge tag 'drm-fixes-5.3-2019-08-21' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
drm-fixes-5.3-2019-08-21: amdgpu: - Fix gfxoff logic on RV - Powerplay fixes - Fix a possible memory leak in CS ioctl - bpc fix for display Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190822021022.3356-1-alexander.deucher@amd.com
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1e85e6cad2
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@ -1143,6 +1143,9 @@ static int amdgpu_cs_process_syncobj_out_dep(struct amdgpu_cs_parser *p,
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num_deps = chunk->length_dw * 4 /
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sizeof(struct drm_amdgpu_cs_chunk_sem);
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if (p->post_deps)
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return -EINVAL;
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p->post_deps = kmalloc_array(num_deps, sizeof(*p->post_deps),
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GFP_KERNEL);
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p->num_post_deps = 0;
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@ -1166,8 +1169,7 @@ static int amdgpu_cs_process_syncobj_out_dep(struct amdgpu_cs_parser *p,
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static int amdgpu_cs_process_syncobj_timeline_out_dep(struct amdgpu_cs_parser *p,
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struct amdgpu_cs_chunk
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*chunk)
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struct amdgpu_cs_chunk *chunk)
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{
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struct drm_amdgpu_cs_chunk_syncobj *syncobj_deps;
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unsigned num_deps;
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@ -1177,6 +1179,9 @@ static int amdgpu_cs_process_syncobj_timeline_out_dep(struct amdgpu_cs_parser *p
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num_deps = chunk->length_dw * 4 /
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sizeof(struct drm_amdgpu_cs_chunk_syncobj);
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if (p->post_deps)
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return -EINVAL;
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p->post_deps = kmalloc_array(num_deps, sizeof(*p->post_deps),
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GFP_KERNEL);
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p->num_post_deps = 0;
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@ -604,6 +604,10 @@ static void gfx_v9_0_check_if_need_gfxoff(struct amdgpu_device *adev)
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(adev->gfx.rlc_feature_version < 1) ||
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!adev->gfx.rlc.is_rlc_v2_1)
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adev->pm.pp_feature &= ~PP_GFXOFF_MASK;
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if (adev->pm.pp_feature & PP_GFXOFF_MASK)
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adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG |
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AMD_PG_SUPPORT_CP |
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AMD_PG_SUPPORT_RLC_SMU_HS;
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break;
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default:
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break;
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@ -552,7 +552,6 @@ static int nv_common_early_init(void *handle)
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AMD_CG_SUPPORT_BIF_LS;
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adev->pg_flags = AMD_PG_SUPPORT_VCN |
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AMD_PG_SUPPORT_VCN_DPG |
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AMD_PG_SUPPORT_MMHUB |
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AMD_PG_SUPPORT_ATHUB;
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adev->external_rev_id = adev->rev_id + 0x1;
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break;
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@ -992,11 +992,6 @@ static int soc15_common_early_init(void *handle)
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adev->pg_flags = AMD_PG_SUPPORT_SDMA | AMD_PG_SUPPORT_VCN;
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}
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if (adev->pm.pp_feature & PP_GFXOFF_MASK)
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adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG |
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AMD_PG_SUPPORT_CP |
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AMD_PG_SUPPORT_RLC_SMU_HS;
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break;
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default:
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/* FIXME: not supported yet */
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@ -3131,13 +3131,25 @@ static enum dc_color_depth
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convert_color_depth_from_display_info(const struct drm_connector *connector,
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const struct drm_connector_state *state)
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{
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uint32_t bpc = connector->display_info.bpc;
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uint8_t bpc = (uint8_t)connector->display_info.bpc;
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/* Assume 8 bpc by default if no bpc is specified. */
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bpc = bpc ? bpc : 8;
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if (!state)
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state = connector->state;
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if (state) {
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bpc = state->max_bpc;
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/*
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* Cap display bpc based on the user requested value.
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*
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* The value for state->max_bpc may not correctly updated
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* depending on when the connector gets added to the state
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* or if this was called outside of atomic check, so it
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* can't be used directly.
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*/
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bpc = min(bpc, state->max_requested_bpc);
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/* Round down to the nearest even number. */
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bpc = bpc - (bpc & 1);
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}
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@ -907,8 +907,6 @@ struct smu_funcs
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((smu)->funcs->register_irq_handler ? (smu)->funcs->register_irq_handler(smu) : 0)
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#define smu_set_azalia_d3_pme(smu) \
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((smu)->funcs->set_azalia_d3_pme ? (smu)->funcs->set_azalia_d3_pme((smu)) : 0)
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#define smu_get_uclk_dpm_states(smu, clocks_in_khz, num_states) \
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((smu)->ppt_funcs->get_uclk_dpm_states ? (smu)->ppt_funcs->get_uclk_dpm_states((smu), (clocks_in_khz), (num_states)) : 0)
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#define smu_get_max_sustainable_clocks_by_dc(smu, max_clocks) \
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((smu)->funcs->get_max_sustainable_clocks_by_dc ? (smu)->funcs->get_max_sustainable_clocks_by_dc((smu), (max_clocks)) : 0)
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#define smu_get_uclk_dpm_states(smu, clocks_in_khz, num_states) \
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@ -327,6 +327,7 @@ static int smu_v11_0_setup_pptable(struct smu_context *smu)
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const struct smc_firmware_header_v1_0 *hdr;
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int ret, index;
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uint32_t size;
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uint16_t atom_table_size;
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uint8_t frev, crev;
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void *table;
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uint16_t version_major, version_minor;
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@ -354,10 +355,11 @@ static int smu_v11_0_setup_pptable(struct smu_context *smu)
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index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
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powerplayinfo);
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ret = smu_get_atom_data_table(smu, index, (uint16_t *)&size, &frev, &crev,
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ret = smu_get_atom_data_table(smu, index, &atom_table_size, &frev, &crev,
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(uint8_t **)&table);
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if (ret)
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return ret;
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size = atom_table_size;
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}
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if (!smu->smu_table.power_play_table)
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