arm64: dts: amlogic updates for v5.11
- AXG SoCs: add/enable PCIe & USB OTG support - AXG SoCs: add MIPI DSI support - Khadas VIM: add RTC - several cleanups & fixups -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl/GxC4ACgkQWTcYmtP7 xmUbdA/+IA2JJZg9q2u0xJmePsft6QTwLqIiDRp970jfooVSLqSPz7xYhdlWiXR5 Gxzyv6Kyd0Nw/G16Ffl6sPs30/lMI8OYsR/imOqc8SYTRvUE/4gy0xXEd8aLWSU4 2g4B8k985WIEeRNz/788SoGvtpA+zXMmS7EHNczoyQaihfywE56fYaM/TjT+pi+a prrCxdiRCX8DGOjB6ynR8efQyguUxRhOKx5sJZnaymY5NhaYl0ZUjRNR8iqhkFj0 SLSGghTal5PcweVSDWMuZbtxaCtf6v3dnZ9ohzS0w25U7xnNoVVQX/OMjA19ZLDt SX2QcS5fCr1BcTfSxsw8zXrbPAqGlrb1PlWdf9uneHf02ze38P7FZSQFhyjzM+1v L9aZgSbvg4jJ/H/p8HFyxuf3ynQMzadRkhcfGo5sUfGWDgwG6189tNjpTPD3BSub CguzUOSuIfml/8KnS0S5aI0NCXyESprHfNwZQyvz6FdgXxdtF38twwKgpmUHUoxA uw5bzpJgrpF7PM9OpmP/yCfETj4EQ++hQyosJNeAweIrt+VIkQ/OW4SZ5dBrwB3k R0rCU80E5gpNBrmmY7AvbjCv91DH2xzxz7/w2FZmt5vs5KBxRCPnCkeRwor0n+sT asQ0YMUoMnJqCbay8ditaARhCvNQCfNe8w+KDrr2MqnCi/PLYLw= =XtmV -----END PGP SIGNATURE----- Merge tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt arm64: dts: amlogic updates for v5.11 - AXG SoCs: add/enable PCIe & USB OTG support - AXG SoCs: add MIPI DSI support - Khadas VIM: add RTC - several cleanups & fixups * tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: meson-sm1: fix typo in opp table arm64: dts: meson: add KHAMSIN IR remote node to SML5442TW arm64: dts: meson: update the Khadas VIM3/3L LED bindings arm64: dts: meson: fix spi-max-frequency on Khadas VIM2 arm64: dts: meson: add rtc aliases to meson-khadas-vim3.dtsi arm64: dts: meson: Add capacity-dmips-mhz attributes to GXM arm64: dts: meson-axg-s400: enable PCIe M.2 Key E slots arm64: dts: meson-axg: add PCIe nodes arm64: dts: meson-axg: add MIPI DSI PHY nodes arm64: dts: meson-axg: add PWRC node arm64: dts: meson: enable rtc node on Khadas VIM1/VIM2 boards dt-bindings: clk: axg-clkc: add MIPI DSI Host clock binding dt-bindings: clk: axg-clkc: add Video Clocks arm64: dts: meson: add watchdog to g12-common dtsi arm64: dts: meson: remove empty lines from aml-s905x-cc v2 dts Link: https://lore.kernel.org/r/7heek9jgox.fsf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
1e3e7ca547
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@ -441,6 +441,16 @@
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status = "okay";
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};
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&pcieA {
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reset-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&pcieB {
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reset-gpios = <&gpio GPIOZ_10 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
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status = "okay";
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};
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&pwm_ab {
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status = "okay";
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pinctrl-0 = <&pwm_a_x20_pins>;
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@ -12,6 +12,7 @@
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
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#include <dt-bindings/reset/amlogic,meson-axg-reset.h>
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#include <dt-bindings/power/meson-axg-power.h>
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/ {
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compatible = "amlogic,meson-axg";
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@ -171,6 +172,58 @@
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#size-cells = <2>;
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ranges;
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pcieA: pcie@f9800000 {
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compatible = "amlogic,axg-pcie", "snps,dw-pcie";
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reg = <0x0 0xf9800000 0x0 0x400000>,
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<0x0 0xff646000 0x0 0x2000>,
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<0x0 0xf9f00000 0x0 0x100000>;
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reg-names = "elbi", "cfg", "config";
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interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 179 IRQ_TYPE_EDGE_RISING>;
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bus-range = <0x0 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges = <0x82000000 0 0xf9c00000 0x0 0xf9c00000 0 0x00300000>;
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clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_A>, <&clkc CLKID_PCIE_CML_EN0>;
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clock-names = "general", "pclk", "port";
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resets = <&reset RESET_PCIE_A>, <&reset RESET_PCIE_APB>;
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reset-names = "port", "apb";
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num-lanes = <1>;
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phys = <&pcie_phy>;
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phy-names = "pcie";
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status = "disabled";
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};
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pcieB: pcie@fa000000 {
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compatible = "amlogic,axg-pcie", "snps,dw-pcie";
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reg = <0x0 0xfa000000 0x0 0x400000>,
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<0x0 0xff648000 0x0 0x2000>,
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<0x0 0xfa400000 0x0 0x100000>;
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reg-names = "elbi", "cfg", "config";
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interrupts = <GIC_SPI 167 IRQ_TYPE_EDGE_RISING>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
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bus-range = <0x0 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges = <0x82000000 0 0xfa500000 0x0 0xfa500000 0 0x00300000>;
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clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_B>, <&clkc CLKID_PCIE_CML_EN1>;
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clock-names = "general", "pclk", "port";
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resets = <&reset RESET_PCIE_B>, <&reset RESET_PCIE_APB>;
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reset-names = "port", "apb";
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num-lanes = <1>;
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phys = <&pcie_phy>;
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phy-names = "pcie";
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status = "disabled";
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};
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usb: usb@ffe09080 {
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compatible = "amlogic,meson-axg-usb-ctrl";
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reg = <0x0 0xffe09080 0x0 0x20>;
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@ -229,9 +282,19 @@
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tx-fifo-depth = <2048>;
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resets = <&reset RESET_ETHERNET>;
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reset-names = "stmmaceth";
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power-domains = <&pwrc PWRC_AXG_ETHERNET_MEM_ID>;
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status = "disabled";
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};
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pcie_phy: phy@ff644000 {
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compatible = "amlogic,axg-pcie-phy";
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reg = <0x0 0xff644000 0x0 0x1c>;
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resets = <&reset RESET_PCIE_PHY>;
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phys = <&mipi_pcie_analog_dphy>;
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phy-names = "analog";
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#phy-cells = <0>;
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};
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pdm: audio-controller@ff632000 {
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compatible = "amlogic,axg-pdm";
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reg = <0x0 0xff632000 0x0 0x34>;
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@ -1159,6 +1222,52 @@
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clocks = <&xtal>;
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clock-names = "xtal";
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};
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pwrc: power-controller {
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compatible = "amlogic,meson-axg-pwrc";
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#power-domain-cells = <1>;
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amlogic,ao-sysctrl = <&sysctrl_AO>;
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resets = <&reset RESET_VIU>,
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<&reset RESET_VENC>,
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<&reset RESET_VCBUS>,
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<&reset RESET_VENCL>,
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<&reset RESET_VID_LOCK>;
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reset-names = "viu", "venc", "vcbus",
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"vencl", "vid_lock";
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clocks = <&clkc CLKID_VPU>,
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<&clkc CLKID_VAPB>;
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clock-names = "vpu", "vapb";
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/*
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* VPU clocking is provided by two identical clock paths
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* VPU_0 and VPU_1 muxed to a single clock by a glitch
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* free mux to safely change frequency while running.
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* Same for VAPB but with a final gate after the glitch free mux.
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*/
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assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
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<&clkc CLKID_VPU_0>,
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<&clkc CLKID_VPU>, /* Glitch free mux */
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<&clkc CLKID_VAPB_0_SEL>,
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<&clkc CLKID_VAPB_0>,
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<&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
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assigned-clock-parents = <&clkc CLKID_FCLK_DIV4>,
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<0>, /* Do Nothing */
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<&clkc CLKID_VPU_0>,
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<&clkc CLKID_FCLK_DIV4>,
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<0>, /* Do Nothing */
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<&clkc CLKID_VAPB_0>;
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assigned-clock-rates = <0>, /* Do Nothing */
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<250000000>,
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<0>, /* Do Nothing */
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<0>, /* Do Nothing */
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<250000000>,
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<0>; /* Do Nothing */
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};
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mipi_pcie_analog_dphy: phy {
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compatible = "amlogic,axg-mipi-pcie-analog-phy";
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#phy-cells = <0>;
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status = "disabled";
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};
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};
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};
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@ -1171,6 +1280,19 @@
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#mbox-cells = <1>;
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};
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mipi_dphy: phy@ff640000 {
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compatible = "amlogic,axg-mipi-dphy";
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reg = <0x0 0xff640000 0x0 0x100>;
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clocks = <&clkc CLKID_MIPI_DSI_PHY>;
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clock-names = "pclk";
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resets = <&reset RESET_MIPI_PHY>;
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reset-names = "phy";
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phys = <&mipi_pcie_analog_dphy>;
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phy-names = "analog";
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#phy-cells = <0>;
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status = "disabled";
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};
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audio: bus@ff642000 {
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compatible = "simple-bus";
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reg = <0x0 0xff642000 0x0 0x2000>;
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@ -2183,6 +2183,12 @@
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amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
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};
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watchdog: wdt@f0d0 {
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compatible = "amlogic,meson-gxbb-wdt";
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reg = <0x0 0xf0d0 0x0 0x10>;
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clocks = <&xtal>;
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};
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spicc0: spi@13000 {
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compatible = "amlogic,meson-g12a-spicc";
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reg = <0x0 0x13000 0x0 0x44>;
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@ -63,6 +63,10 @@
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pinctrl-names = "default";
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};
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&ir {
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linux,rc-map-name = "rc-khamsin";
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};
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/* This is connected to the Bluetooth module: */
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&uart_A {
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status = "okay";
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@ -97,8 +97,7 @@
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pinctrl-names = "default";
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rtc: rtc@51 {
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/* has to be enabled manually when a battery is connected: */
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status = "disabled";
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status = "okay";
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compatible = "haoyu,hym8563";
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reg = <0x51>;
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#clock-cells = <0>;
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@ -84,7 +84,6 @@
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regulator-always-on;
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};
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vcck: regulator-vcck {
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compatible = "regulator-fixed";
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regulator-name = "VCCK";
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@ -124,7 +123,6 @@
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regulator-always-on;
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};
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vddio_card: regulator-vddio-card {
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compatible = "regulator-gpio";
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regulator-name = "VDDIO_CARD";
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@ -195,7 +193,6 @@
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};
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};
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&aiu {
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status = "okay";
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};
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@ -207,7 +204,6 @@
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hdmi-phandle = <&hdmi_tx>;
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};
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ðmac {
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status = "okay";
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};
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@ -228,8 +228,7 @@
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pinctrl-names = "default";
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rtc: rtc@51 {
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/* has to be enabled manually when a battery is connected: */
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status = "disabled";
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status = "okay";
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compatible = "haoyu,hym8563";
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reg = <0x51>;
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#clock-cells = <0>;
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@ -341,7 +340,7 @@
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#size-cells = <1>;
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compatible = "winbond,w25q16", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <3000000>;
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spi-max-frequency = <104000000>;
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};
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};
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|
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@ -42,11 +42,28 @@
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};
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};
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cpu0: cpu@0 {
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capacity-dmips-mhz = <1024>;
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};
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cpu1: cpu@1 {
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capacity-dmips-mhz = <1024>;
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};
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cpu2: cpu@2 {
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capacity-dmips-mhz = <1024>;
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};
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cpu3: cpu@3 {
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capacity-dmips-mhz = <1024>;
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};
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cpu4: cpu@100 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x100>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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next-level-cache = <&l2>;
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clocks = <&scpi_dvfs 1>;
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#cooling-cells = <2>;
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@ -57,6 +74,7 @@
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compatible = "arm,cortex-a53";
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reg = <0x0 0x101>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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next-level-cache = <&l2>;
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clocks = <&scpi_dvfs 1>;
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#cooling-cells = <2>;
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|
@ -67,6 +85,7 @@
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compatible = "arm,cortex-a53";
|
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reg = <0x0 0x102>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
|
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next-level-cache = <&l2>;
|
||||
clocks = <&scpi_dvfs 1>;
|
||||
#cooling-cells = <2>;
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||||
|
|
@ -77,6 +96,7 @@
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|||
compatible = "arm,cortex-a53";
|
||||
reg = <0x0 0x103>;
|
||||
enable-method = "psci";
|
||||
capacity-dmips-mhz = <1024>;
|
||||
next-level-cache = <&l2>;
|
||||
clocks = <&scpi_dvfs 1>;
|
||||
#cooling-cells = <2>;
|
||||
|
|
|
|||
|
|
@ -6,6 +6,7 @@
|
|||
*/
|
||||
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/gpio/meson-g12a-gpio.h>
|
||||
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
|
||||
|
||||
|
|
@ -13,6 +14,8 @@
|
|||
aliases {
|
||||
serial0 = &uart_AO;
|
||||
ethernet0 = ðmac;
|
||||
rtc0 = &rtc;
|
||||
rtc1 = &vrtc;
|
||||
};
|
||||
|
||||
chosen {
|
||||
|
|
@ -40,14 +43,16 @@
|
|||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led-white {
|
||||
label = "vim3:white:sys";
|
||||
white {
|
||||
color = <LED_COLOR_ID_WHITE>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
led-red {
|
||||
label = "vim3:red";
|
||||
red {
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_STATUS;
|
||||
gpios = <&gpio_expander 5 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
|
@ -330,7 +335,7 @@
|
|||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
rtc@51 {
|
||||
rtc: rtc@51 {
|
||||
compatible = "haoyu,hym8563";
|
||||
reg = <0x51>;
|
||||
#clock-cells = <0>;
|
||||
|
|
|
|||
|
|
@ -130,7 +130,7 @@
|
|||
opp-microvolt = <790000>;
|
||||
};
|
||||
|
||||
opp-1512000000 {
|
||||
opp-1500000000 {
|
||||
opp-hz = /bits/ 64 <1500000000>;
|
||||
opp-microvolt = <800000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -72,5 +72,30 @@
|
|||
#define CLKID_PCIE_CML_EN1 80
|
||||
#define CLKID_MIPI_ENABLE 81
|
||||
#define CLKID_GEN_CLK 84
|
||||
#define CLKID_VPU_0_SEL 92
|
||||
#define CLKID_VPU_0 93
|
||||
#define CLKID_VPU_1_SEL 95
|
||||
#define CLKID_VPU_1 96
|
||||
#define CLKID_VPU 97
|
||||
#define CLKID_VAPB_0_SEL 99
|
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#define CLKID_VAPB_0 100
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#define CLKID_VAPB_1_SEL 102
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#define CLKID_VAPB_1 103
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#define CLKID_VAPB_SEL 104
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#define CLKID_VAPB 105
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#define CLKID_VCLK 106
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#define CLKID_VCLK2 107
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#define CLKID_VCLK_DIV1 122
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#define CLKID_VCLK_DIV2 123
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#define CLKID_VCLK_DIV4 124
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#define CLKID_VCLK_DIV6 125
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#define CLKID_VCLK_DIV12 126
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#define CLKID_VCLK2_DIV1 127
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#define CLKID_VCLK2_DIV2 128
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#define CLKID_VCLK2_DIV4 129
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#define CLKID_VCLK2_DIV6 130
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#define CLKID_VCLK2_DIV12 131
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#define CLKID_CTS_ENCL 133
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#define CLKID_VDIN_MEAS 136
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#endif /* __AXG_CLKC_H */
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||||
|
|
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|||
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Reference in New Issue