irqchip/xilinx: Switch to GENERIC_IRQ_MULTI_HANDLER
Register the Xilinx driver as the root interrupt controller using the GENERIC_IRQ_MULTI_HANDLER API, instead of the arch-specific hack. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Stefan Asserhall <stefan.asserhall@xilinx.com> [maz: repainted commit message] Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/e6c6595a81f662bf839cee3109d0fa58a596ea47.1646380284.git.michal.simek@xilinx.com
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@ -45,6 +45,8 @@ config MICROBLAZE
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select SET_FS
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select ZONE_DMA
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select TRACE_IRQFLAGS_SUPPORT
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select GENERIC_IRQ_MULTI_HANDLER
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select HANDLE_DOMAIN_IRQ
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# Endianness selection
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choice
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@ -11,7 +11,4 @@
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struct pt_regs;
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extern void do_IRQ(struct pt_regs *regs);
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/* should be defined in each interrupt controller driver */
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extern unsigned int xintc_get_irq(void);
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#endif /* _ASM_MICROBLAZE_IRQ_H */
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@ -20,27 +20,13 @@
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#include <linux/irqchip.h>
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#include <linux/of_irq.h>
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static u32 concurrent_irq;
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void __irq_entry do_IRQ(struct pt_regs *regs)
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{
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unsigned int irq;
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struct pt_regs *old_regs = set_irq_regs(regs);
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trace_hardirqs_off();
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irq_enter();
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irq = xintc_get_irq();
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next_irq:
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BUG_ON(!irq);
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generic_handle_irq(irq);
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irq = xintc_get_irq();
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if (irq != -1U) {
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pr_debug("next irq: %d\n", irq);
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++concurrent_irq;
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goto next_irq;
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}
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handle_arch_irq(regs);
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irq_exit();
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set_irq_regs(old_regs);
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trace_hardirqs_on();
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@ -32,6 +32,8 @@
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#define MER_ME (1<<0)
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#define MER_HIE (1<<1)
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#define SPURIOUS_IRQ (-1U)
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static DEFINE_STATIC_KEY_FALSE(xintc_is_be);
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struct xintc_irq_chip {
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@ -110,20 +112,6 @@ static struct irq_chip intc_dev = {
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.irq_mask_ack = intc_mask_ack,
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};
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unsigned int xintc_get_irq(void)
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{
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unsigned int irq = -1;
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u32 hwirq;
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hwirq = xintc_read(primary_intc, IVR);
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if (hwirq != -1U)
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irq = irq_find_mapping(primary_intc->root_domain, hwirq);
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pr_debug("irq-xilinx: hwirq=%d, irq=%d\n", hwirq, irq);
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return irq;
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}
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static int xintc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
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{
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struct xintc_irq_chip *irqc = d->host_data;
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@ -164,6 +152,19 @@ static void xil_intc_irq_handler(struct irq_desc *desc)
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chained_irq_exit(chip, desc);
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}
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static void xil_intc_handle_irq(struct pt_regs *regs)
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{
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u32 hwirq;
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do {
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hwirq = xintc_read(primary_intc, IVR);
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if (unlikely(hwirq == SPURIOUS_IRQ))
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break;
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generic_handle_domain_irq(primary_intc->root_domain, hwirq);
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} while (true);
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}
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static int __init xilinx_intc_of_init(struct device_node *intc,
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struct device_node *parent)
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{
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@ -233,6 +234,7 @@ static int __init xilinx_intc_of_init(struct device_node *intc,
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} else {
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primary_intc = irqc;
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irq_set_default_host(primary_intc->root_domain);
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set_handle_irq(xil_intc_handle_irq);
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}
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return 0;
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