scsi: be2iscsi: Use num_cons field in Rx CQE
FW runs out of buffer if buffers are not posted back soon. ASYNC Rx CQE indicates that FW has consumed 8 RQEs. Use it to post back buffers instead of waiting for buffers to be processed and freed by driver. Signed-off-by: Jitendra Bhivare <jitendra.bhivare@broadcom.com> Reviewed-by: Tomas Henzl <thenzl@redhat.com> Reviewed-by: Chris Leech <cleech@redhat.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -1467,7 +1467,8 @@ beiscsi_hdl_put_handle(struct hd_async_context *pasync_ctx,
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static struct hd_async_handle *
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beiscsi_hdl_get_handle(struct beiscsi_conn *beiscsi_conn,
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struct hd_async_context *pasync_ctx,
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struct i_t_dpdu_cqe *pdpdu_cqe)
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struct i_t_dpdu_cqe *pdpdu_cqe,
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u8 *header)
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{
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struct beiscsi_hba *phba = beiscsi_conn->phba;
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struct hd_async_handle *pasync_handle;
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@ -1515,6 +1516,7 @@ beiscsi_hdl_get_handle(struct beiscsi_conn *beiscsi_conn,
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switch (code) {
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case UNSOL_HDR_NOTIFY:
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pasync_handle = pasync_ctx->async_entry[ci].header;
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*header = 1;
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break;
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case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
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error = 1;
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@ -1547,6 +1549,7 @@ beiscsi_hdl_get_handle(struct beiscsi_conn *beiscsi_conn,
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/* FW has stale address - attempt continuing by dropping */
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}
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list_del_init(&pasync_handle->link);
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/**
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* Each CID is associated with unique CRI.
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* ASYNC_CRI_FROM_CID mapping and CRI_FROM_CID are totaly different.
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@ -1554,11 +1557,6 @@ beiscsi_hdl_get_handle(struct beiscsi_conn *beiscsi_conn,
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pasync_handle->cri = BE_GET_ASYNC_CRI_FROM_CID(cid);
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pasync_handle->is_final = final;
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pasync_handle->buffer_len = dpl;
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/* empty the slot */
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if (pasync_handle->is_header)
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pasync_ctx->async_entry[ci].header = NULL;
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else
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pasync_ctx->async_entry[ci].data = NULL;
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/**
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* DEF PDU header and data buffers with errors should be simply
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@ -1708,85 +1706,53 @@ drop_pdu:
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static void
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beiscsi_hdq_post_handles(struct beiscsi_hba *phba,
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u8 header, u8 ulp_num)
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u8 header, u8 ulp_num, u16 nbuf)
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{
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struct hd_async_handle *pasync_handle, *tmp, **slot;
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struct hd_async_handle *pasync_handle;
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struct hd_async_context *pasync_ctx;
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struct hwi_controller *phwi_ctrlr;
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struct list_head *hfree_list;
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struct phys_addr *pasync_sge;
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u32 ring_id, doorbell = 0;
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u32 doorbell_offset;
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u16 prod = 0, cons;
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u16 index;
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u16 prod, pi;
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phwi_ctrlr = phba->phwi_ctrlr;
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pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
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if (header) {
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cons = pasync_ctx->async_header.free_entries;
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hfree_list = &pasync_ctx->async_header.free_list;
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pasync_sge = pasync_ctx->async_header.ring_base;
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pi = pasync_ctx->async_header.pi;
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ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id;
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doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num].
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doorbell_offset;
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} else {
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cons = pasync_ctx->async_data.free_entries;
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hfree_list = &pasync_ctx->async_data.free_list;
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pasync_sge = pasync_ctx->async_data.ring_base;
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pi = pasync_ctx->async_data.pi;
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ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id;
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doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num].
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doorbell_offset;
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}
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/* number of entries posted must be in multiples of 8 */
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if (cons % 8)
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return;
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list_for_each_entry_safe(pasync_handle, tmp, hfree_list, link) {
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list_del_init(&pasync_handle->link);
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pasync_handle->is_final = 0;
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pasync_handle->buffer_len = 0;
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/* handles can be consumed out of order, use index in handle */
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index = pasync_handle->index;
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for (prod = 0; prod < nbuf; prod++) {
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if (header)
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pasync_handle = pasync_ctx->async_entry[pi].header;
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else
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pasync_handle = pasync_ctx->async_entry[pi].data;
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WARN_ON(pasync_handle->is_header != header);
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if (header)
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slot = &pasync_ctx->async_entry[index].header;
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else
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slot = &pasync_ctx->async_entry[index].data;
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/**
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* The slot just tracks handle's hold and release, so
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* overwriting at the same index won't do any harm but
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* needs to be caught.
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*/
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if (*slot != NULL) {
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beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
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"BM_%d : async PDU %s slot at %u not empty\n",
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header ? "header" : "data", index);
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WARN_ON(pasync_handle->index != pi);
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/* setup the ring only once */
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if (nbuf == pasync_ctx->num_entries) {
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/* note hi is lo */
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pasync_sge[pi].hi = pasync_handle->pa.u.a32.address_lo;
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pasync_sge[pi].lo = pasync_handle->pa.u.a32.address_hi;
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}
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/**
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* We use same freed index as in completion to post so this
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* operation is not required for refills. Its required only
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* for ring creation.
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*/
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if (header)
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pasync_sge = pasync_ctx->async_header.ring_base;
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else
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pasync_sge = pasync_ctx->async_data.ring_base;
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pasync_sge += index;
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/* if its a refill then address is same; hi is lo */
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WARN_ON(pasync_sge->hi &&
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pasync_sge->hi != pasync_handle->pa.u.a32.address_lo);
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WARN_ON(pasync_sge->lo &&
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pasync_sge->lo != pasync_handle->pa.u.a32.address_hi);
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pasync_sge->hi = pasync_handle->pa.u.a32.address_lo;
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pasync_sge->lo = pasync_handle->pa.u.a32.address_hi;
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*slot = pasync_handle;
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if (++prod == cons)
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break;
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if (++pi == pasync_ctx->num_entries)
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pi = 0;
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}
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if (header)
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pasync_ctx->async_header.free_entries -= prod;
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pasync_ctx->async_header.pi = pi;
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else
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pasync_ctx->async_data.free_entries -= prod;
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pasync_ctx->async_data.pi = pi;
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doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
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doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
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@ -1803,20 +1769,26 @@ beiscsi_hdq_process_compl(struct beiscsi_conn *beiscsi_conn,
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struct hd_async_handle *pasync_handle = NULL;
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struct hd_async_context *pasync_ctx;
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struct hwi_controller *phwi_ctrlr;
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u8 ulp_num, consumed, header = 0;
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u16 cid_cri;
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u8 ulp_num;
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phwi_ctrlr = phba->phwi_ctrlr;
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cid_cri = BE_GET_CRI_FROM_CID(beiscsi_conn->beiscsi_conn_cid);
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ulp_num = BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr, cid_cri);
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pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
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pasync_handle = beiscsi_hdl_get_handle(beiscsi_conn, pasync_ctx,
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pdpdu_cqe);
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if (!pasync_handle)
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return;
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beiscsi_hdl_gather_pdu(beiscsi_conn, pasync_ctx, pasync_handle);
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beiscsi_hdq_post_handles(phba, pasync_handle->is_header, ulp_num);
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pdpdu_cqe, &header);
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if (is_chip_be2_be3r(phba))
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consumed = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
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num_cons, pdpdu_cqe);
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else
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consumed = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
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num_cons, pdpdu_cqe);
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if (pasync_handle)
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beiscsi_hdl_gather_pdu(beiscsi_conn, pasync_ctx, pasync_handle);
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/* num_cons indicates number of 8 RQEs consumed */
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if (consumed)
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beiscsi_hdq_post_handles(phba, header, ulp_num, 8 * consumed);
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}
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void beiscsi_process_mcc_cq(struct beiscsi_hba *phba)
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@ -2775,6 +2747,7 @@ static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
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"BM_%d : No Virtual address for ULP : %d\n",
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ulp_num);
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pasync_ctx->async_header.pi = 0;
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pasync_ctx->async_header.buffer_size = p->defpdu_hdr_sz;
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pasync_ctx->async_header.va_base =
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mem_descr->mem_array[0].virtual_address;
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@ -2883,6 +2856,7 @@ static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
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ulp_num);
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idx = 0;
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pasync_ctx->async_data.pi = 0;
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pasync_ctx->async_data.buffer_size = p->defpdu_data_sz;
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pasync_ctx->async_data.va_base =
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mem_descr->mem_array[idx].virtual_address;
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@ -2913,11 +2887,12 @@ static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
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list_add_tail(&pasync_header_h->link,
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&pasync_ctx->async_header.
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free_list);
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pasync_ctx->async_entry[index].header =
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pasync_header_h;
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pasync_header_h++;
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pasync_ctx->async_header.free_entries++;
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INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
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wq.list);
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pasync_ctx->async_entry[index].header = NULL;
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pasync_data_h->cri = -1;
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pasync_data_h->is_header = 0;
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@ -2954,9 +2929,10 @@ static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
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list_add_tail(&pasync_data_h->link,
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&pasync_ctx->async_data.
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free_list);
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pasync_ctx->async_entry[index].data =
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pasync_data_h;
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pasync_data_h++;
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pasync_ctx->async_data.free_entries++;
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pasync_ctx->async_entry[index].data = NULL;
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}
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}
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}
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@ -3734,6 +3710,7 @@ static int hwi_init_port(struct beiscsi_hba *phba)
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unsigned int def_pdu_ring_sz;
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struct be_ctrl_info *ctrl = &phba->ctrl;
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int status, ulp_num;
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u16 nbufs;
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phwi_ctrlr = phba->phwi_ctrlr;
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phwi_context = phwi_ctrlr->phwi_ctxt;
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for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
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if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
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def_pdu_ring_sz =
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BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
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sizeof(struct phys_addr);
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nbufs = phwi_context->pasync_ctx[ulp_num]->num_entries;
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def_pdu_ring_sz = nbufs * sizeof(struct phys_addr);
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status = beiscsi_create_def_hdr(phba, phwi_context,
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phwi_ctrlr,
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* let EP know about it.
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*/
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beiscsi_hdq_post_handles(phba, BEISCSI_DEFQ_HDR,
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ulp_num);
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ulp_num, nbufs);
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beiscsi_hdq_post_handles(phba, BEISCSI_DEFQ_DATA,
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ulp_num);
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ulp_num, nbufs);
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}
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}
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@ -634,6 +634,7 @@ struct hd_async_buf_context {
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* They are posted back to FW in groups of 8.
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*/
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struct list_head free_list;
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u16 pi;
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};
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/**
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