ARM: Orion: Fix WDT compile for Dove and MV78xx0
Commit 0fa1f0609a
(ARM: Orion: Fix
Virtual/Physical mixup with watchdog) broke the Dove & MV78xx0
build. Although these two SoC don't use the watchdog, the shared
platform code still needs to build. Add the necessary defines.
Cc: stable@vger.kernel.org
Reported-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -50,5 +50,6 @@
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#define POWER_MANAGEMENT (BRIDGE_VIRT_BASE | 0x011c)
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#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
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#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300)
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#endif
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@ -78,6 +78,7 @@
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/* North-South Bridge */
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#define BRIDGE_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x20000)
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#define BRIDGE_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x20000)
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/* Cryptographic Engine */
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#define DOVE_CRYPT_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x30000)
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@ -31,5 +31,6 @@
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#define IRQ_MASK_HIGH_OFF 0x0014
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#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
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#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300)
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#endif
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@ -42,6 +42,7 @@
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#define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000
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#define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000
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#define MV78XX0_CORE_REGS_VIRT_BASE 0xfe400000
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#define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000
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#define MV78XX0_CORE_REGS_SIZE SZ_16K
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#define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20))
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@ -59,6 +60,7 @@
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* Core-specific peripheral registers.
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*/
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#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE)
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#define BRIDGE_PHYS_BASE (MV78XX0_CORE_REGS_PHYS_BASE)
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/*
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* Register Map
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