Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next
Jeff Kirsher says: ==================== This series contains updates to igb and ixgbe. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
1d9c5a04d5
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@ -60,8 +60,8 @@
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#include "igb.h"
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#define MAJ 4
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#define MIN 0
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#define BUILD 17
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#define MIN 1
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#define BUILD 2
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#define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
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__stringify(BUILD) "-k"
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char igb_driver_name[] = "igb";
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@ -122,6 +122,7 @@ static void igb_remove(struct pci_dev *pdev);
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static int igb_sw_init(struct igb_adapter *);
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static int igb_open(struct net_device *);
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static int igb_close(struct net_device *);
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static void igb_configure(struct igb_adapter *);
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static void igb_configure_tx(struct igb_adapter *);
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static void igb_configure_rx(struct igb_adapter *);
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static void igb_clean_all_tx_rings(struct igb_adapter *);
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@ -831,17 +832,18 @@ static int igb_request_msix(struct igb_adapter *adapter)
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{
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struct net_device *netdev = adapter->netdev;
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struct e1000_hw *hw = &adapter->hw;
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int i, err = 0, vector = 0;
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int i, err = 0, vector = 0, free_vector = 0;
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err = request_irq(adapter->msix_entries[vector].vector,
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igb_msix_other, 0, netdev->name, adapter);
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if (err)
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goto out;
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vector++;
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goto err_out;
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for (i = 0; i < adapter->num_q_vectors; i++) {
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struct igb_q_vector *q_vector = adapter->q_vector[i];
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vector++;
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q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
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if (q_vector->rx.ring && q_vector->tx.ring)
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@ -860,13 +862,22 @@ static int igb_request_msix(struct igb_adapter *adapter)
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igb_msix_ring, 0, q_vector->name,
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q_vector);
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if (err)
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goto out;
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vector++;
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goto err_free;
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}
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igb_configure_msix(adapter);
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return 0;
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out:
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err_free:
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/* free already assigned IRQs */
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free_irq(adapter->msix_entries[free_vector++].vector, adapter);
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vector--;
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for (i = 0; i < vector; i++) {
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free_irq(adapter->msix_entries[free_vector++].vector,
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adapter->q_vector[i]);
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}
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err_out:
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return err;
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}
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@ -948,11 +959,14 @@ static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
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* Attempt to configure interrupts using the best available
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* capabilities of the hardware and kernel.
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**/
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static void igb_set_interrupt_capability(struct igb_adapter *adapter)
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static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
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{
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int err;
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int numvecs, i;
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if (!msix)
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goto msi_only;
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/* Number of supported queues. */
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adapter->num_rx_queues = adapter->rss_queues;
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if (adapter->vfs_allocated_count)
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@ -1199,12 +1213,12 @@ err_out:
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*
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* This function initializes the interrupts and allocates all of the queues.
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**/
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static int igb_init_interrupt_scheme(struct igb_adapter *adapter)
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static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
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{
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struct pci_dev *pdev = adapter->pdev;
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int err;
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igb_set_interrupt_capability(adapter);
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igb_set_interrupt_capability(adapter, msix);
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err = igb_alloc_q_vectors(adapter);
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if (err) {
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@ -1240,20 +1254,15 @@ static int igb_request_irq(struct igb_adapter *adapter)
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/* fall back to MSI */
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igb_free_all_tx_resources(adapter);
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igb_free_all_rx_resources(adapter);
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igb_clear_interrupt_scheme(adapter);
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if (!pci_enable_msi(pdev))
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adapter->flags |= IGB_FLAG_HAS_MSI;
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adapter->num_tx_queues = 1;
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adapter->num_rx_queues = 1;
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adapter->num_q_vectors = 1;
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err = igb_alloc_q_vectors(adapter);
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if (err) {
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dev_err(&pdev->dev,
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"Unable to allocate memory for vectors\n");
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err = igb_init_interrupt_scheme(adapter, false);
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if (err)
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goto request_done;
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}
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igb_setup_all_tx_resources(adapter);
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igb_setup_all_rx_resources(adapter);
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igb_configure(adapter);
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}
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igb_assign_vector(adapter->q_vector[0], 0);
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@ -2444,7 +2453,7 @@ static int igb_sw_init(struct igb_adapter *adapter)
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GFP_ATOMIC);
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/* This call may decrease the number of queues */
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if (igb_init_interrupt_scheme(adapter)) {
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if (igb_init_interrupt_scheme(adapter, true)) {
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dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
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return -ENOMEM;
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}
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@ -6818,7 +6827,7 @@ static int igb_resume(struct device *dev)
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pci_enable_wake(pdev, PCI_D3hot, 0);
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pci_enable_wake(pdev, PCI_D3cold, 0);
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if (igb_init_interrupt_scheme(adapter)) {
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if (igb_init_interrupt_scheme(adapter, true)) {
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dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
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return -ENOMEM;
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}
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@ -1078,7 +1078,7 @@ mac_reset_top:
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hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr);
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/* Add the SAN MAC address to the RAR only if it's a valid address */
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if (ixgbe_validate_mac_addr(hw->mac.san_addr) == 0) {
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if (is_valid_ether_addr(hw->mac.san_addr)) {
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hw->mac.ops.set_rar(hw, hw->mac.num_rar_entries - 1,
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hw->mac.san_addr, 0, IXGBE_RAH_AV);
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@ -1782,29 +1782,6 @@ s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw)
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return status;
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}
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/**
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* ixgbe_validate_mac_addr - Validate MAC address
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* @mac_addr: pointer to MAC address.
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*
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* Tests a MAC address to ensure it is a valid Individual Address
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**/
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s32 ixgbe_validate_mac_addr(u8 *mac_addr)
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{
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s32 status = 0;
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/* Make sure it is not a multicast address */
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if (IXGBE_IS_MULTICAST(mac_addr))
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status = IXGBE_ERR_INVALID_MAC_ADDR;
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/* Not a broadcast address */
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else if (IXGBE_IS_BROADCAST(mac_addr))
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status = IXGBE_ERR_INVALID_MAC_ADDR;
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/* Reject the zero address */
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else if (is_zero_ether_addr(mac_addr))
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status = IXGBE_ERR_INVALID_MAC_ADDR;
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return status;
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}
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/**
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* ixgbe_set_rar_generic - Set Rx address register
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* @hw: pointer to hardware structure
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@ -1909,8 +1886,7 @@ s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw)
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* to the permanent address.
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* Otherwise, use the permanent address from the eeprom.
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*/
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if (ixgbe_validate_mac_addr(hw->mac.addr) ==
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IXGBE_ERR_INVALID_MAC_ADDR) {
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if (!is_valid_ether_addr(hw->mac.addr)) {
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/* Get the MAC address from the RAR0 for later reference */
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hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
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@ -81,7 +81,6 @@ s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
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s32 ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);
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void ixgbe_fc_autoneg(struct ixgbe_hw *hw);
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s32 ixgbe_validate_mac_addr(u8 *mac_addr);
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s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u16 mask);
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void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u16 mask);
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s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);
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@ -4467,6 +4467,7 @@ static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
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struct ixgbe_hw *hw = &adapter->hw;
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struct pci_dev *pdev = adapter->pdev;
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unsigned int rss;
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u32 fwsm;
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#ifdef CONFIG_IXGBE_DCB
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int j;
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struct tc_configuration *tc;
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adapter->max_q_vectors = MAX_Q_VECTORS_82598;
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break;
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case ixgbe_mac_X540:
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adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
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fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM);
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if (fwsm & IXGBE_FWSM_TS_ENABLED)
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adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
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case ixgbe_mac_82599EB:
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adapter->max_q_vectors = MAX_Q_VECTORS_82599;
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adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
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memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
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memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
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if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
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if (!is_valid_ether_addr(netdev->perm_addr)) {
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e_dev_err("invalid MAC address\n");
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err = -EIO;
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goto err_sw_init;
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@ -1834,15 +1834,6 @@ enum {
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/* Number of 100 microseconds we wait for PCI Express master disable */
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#define IXGBE_PCI_MASTER_DISABLE_TIMEOUT 800
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/* Check whether address is multicast. This is little-endian specific check.*/
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#define IXGBE_IS_MULTICAST(Address) \
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(bool)(((u8 *)(Address))[0] & ((u8)0x01))
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/* Check whether an address is broadcast. */
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#define IXGBE_IS_BROADCAST(Address) \
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((((u8 *)(Address))[0] == ((u8)0xff)) && \
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(((u8 *)(Address))[1] == ((u8)0xff)))
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/* RAH */
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#define IXGBE_RAH_VIND_MASK 0x003C0000
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#define IXGBE_RAH_VIND_SHIFT 18
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@ -1963,6 +1954,8 @@ enum {
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#define IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP 0x01000000
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#define IXGBE_MRQC_L3L4TXSWEN 0x00008000
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#define IXGBE_FWSM_TS_ENABLED 0x1
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/* Queue Drop Enable */
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#define IXGBE_QDE_ENABLE 0x00000001
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#define IXGBE_QDE_IDX_MASK 0x00007F00
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@ -152,7 +152,7 @@ mac_reset_top:
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hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr);
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/* Add the SAN MAC address to the RAR only if it's a valid address */
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if (ixgbe_validate_mac_addr(hw->mac.san_addr) == 0) {
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if (is_valid_ether_addr(hw->mac.san_addr)) {
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hw->mac.ops.set_rar(hw, hw->mac.num_rar_entries - 1,
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hw->mac.san_addr, 0, IXGBE_RAH_AV);
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